ARM: SoC fixes for v5.16, part 2
There are only a few devicetree fixes this time: - one outdated devicetree property that slipped into the newly added ExynosAutov9 support - three changes to Broadcom SoCs that had incorrect number values for interrupts or irqchips. In the MAINTAINERS file, Nishanth Menon gets listed for TI K3 SoCs, while Taichi Sugaya and Takao Orito take ownership of the Socionext Milbeaut platform. All other changes are for SoC specific drivers, fixing: - A missing NULL pointer check in the mediatek memory driver - An integer overflow issue in the Arm smccc firwmare interface - A false-positive fortify-source check - Error handling fixes for optee and smci - Incorrect message format in one SCMI call -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmGfraEACgkQmmx57+YA GNkj/g//QjXBksfNpCxGlghRga3pUPEVowij08spYeEIKYpkCnzyns4pLJUYFafX PlMB32NnObhJ7QO8/V1sUgdlm/1rhDw99AEcdj4l4o3OCcczc8Mnf3mVIJmPhJUX Rdu/Rwk8ajTt3msHud2PPZtHVYGQTCDQQOgAWjA3ZjlKad69H0s6jYeBdTvcBcge GmdUIxsHcw/aCcNQZ5LB4RdcGrh+9IwhqXVaDQvMUNC+BVeSKz49/EUPfOTsNH4b zVDiGo8DmG0Y4eZww/KB2g4qxc3fewF+IacnrPFyjb0ft9Szk8r/0HSFVpz2N8TM tWpo5hEKh/V9cgQn+vxDjujEbghyRm06mAPgxiiKtSLBp2ASG2io0o6LcQnToK7Q t27nGembpSRKi/I743Xpt3AjM47LBB45j0Dmdp5oWy3FJAuWa7mlCIvMcfVWDgpf aDzmjiMn7bzyHHXMDlDo3AdHOJrnKBaPylMjWXUkiiNiFhmGZ6787o3hN0yIc+Ck jwyIm+5Tp8agpgMIqI0cpn7e9QeNc2F8jJPmKdDmEN5Ny9xQKCpxzc2CbBWLNZnu bOLhpbKxRDVgXm46eLhTwJypgZWli/2GCFpfjXdDI8lOB5Sq6uf6P0eJfDkJBv7k upj309dHgl60KP6jJI7foIoY6WVxjWOAZXgslco//leH8fdj5M4= =veH6 -----END PGP SIGNATURE----- Merge tag 'arm-fixes-5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC fixes from Arnd Bergmann: "There are only a few devicetree fixes this time: - one outdated devicetree property that slipped into the newly added ExynosAutov9 support - three changes to Broadcom SoCs that had incorrect number values for interrupts or irqchips. In the MAINTAINERS file, Nishanth Menon gets listed for TI K3 SoCs, while Taichi Sugaya and Takao Orito take ownership of the Socionext Milbeaut platform. All other changes are for SoC specific drivers, fixing: - A missing NULL pointer check in the mediatek memory driver - An integer overflow issue in the Arm smccc firwmare interface - A false-positive fortify-source check - Error handling fixes for optee and smci - Incorrect message format in one SCMI call" * tag 'arm-fixes-5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: memory: mtk-smi: Fix a null dereference for the ostd arm64: dts: exynos: drop samsung,ufs-shareability-reg-offset in ExynosAutov9 MAINTAINERS: Update maintainer entry for keystone platforms MAINTAINERS: Add entry to MAINTAINERS for Milbeaut firmware: smccc: Fix check for ARCH_SOC_ID not implemented ARM: socfpga: Fix crash with CONFIG_FORTIRY_SOURCE firmware: arm_scmi: Fix type error assignment in voltage protocol firmware: arm_scmi: Fix type error in sensor protocol firmware: arm_scmi: pm: Propagate return value to caller firmware: arm_scmi: Fix base agent discover response optee: fix kfree NULL pointer ARM: dts: bcm2711: Fix PCIe interrupts ARM: dts: BCM5301X: Add interrupt properties to GPIO node ARM: dts: BCM5301X: Fix I2C controller interrupt firmware: arm_scmi: Fix null de-reference on error path
This commit is contained in:
commit
6ef9d23121
15
MAINTAINERS
15
MAINTAINERS
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@ -2263,6 +2263,15 @@ L: linux-iio@vger.kernel.org
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S: Maintained
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F: drivers/counter/microchip-tcb-capture.c
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ARM/MILBEAUT ARCHITECTURE
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M: Taichi Sugaya <sugaya.taichi@socionext.com>
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M: Takao Orito <orito.takao@socionext.com>
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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S: Maintained
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F: arch/arm/boot/dts/milbeaut*
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F: arch/arm/mach-milbeaut/
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N: milbeaut
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ARM/MIOA701 MACHINE SUPPORT
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M: Robert Jarzmik <robert.jarzmik@free.fr>
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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@ -2729,10 +2738,11 @@ S: Maintained
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F: drivers/memory/*emif*
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ARM/TEXAS INSTRUMENT KEYSTONE ARCHITECTURE
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M: Nishanth Menon <nm@ti.com>
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M: Santosh Shilimkar <ssantosh@kernel.org>
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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S: Maintained
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone.git
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
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F: arch/arm/boot/dts/keystone-*
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F: arch/arm/mach-keystone/
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@ -19031,11 +19041,12 @@ F: drivers/mmc/host/tifm_sd.c
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F: include/linux/tifm.h
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TI KEYSTONE MULTICORE NAVIGATOR DRIVERS
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M: Nishanth Menon <nm@ti.com>
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M: Santosh Shilimkar <ssantosh@kernel.org>
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L: linux-kernel@vger.kernel.org
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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S: Maintained
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone.git
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
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F: drivers/soc/ti/*
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TI LM49xxx FAMILY ASoC CODEC DRIVERS
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@ -506,11 +506,17 @@
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#address-cells = <3>;
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#interrupt-cells = <1>;
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#size-cells = <2>;
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interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
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interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "pcie", "msi";
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interrupt-map-mask = <0x0 0x0 0x0 0x7>;
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interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143
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IRQ_TYPE_LEVEL_HIGH>,
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<0 0 0 2 &gicv2 GIC_SPI 144
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IRQ_TYPE_LEVEL_HIGH>,
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<0 0 0 3 &gicv2 GIC_SPI 145
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IRQ_TYPE_LEVEL_HIGH>,
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<0 0 0 4 &gicv2 GIC_SPI 146
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IRQ_TYPE_LEVEL_HIGH>;
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msi-controller;
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msi-parent = <&pcie0>;
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@ -242,6 +242,8 @@
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pcie0: pcie@12000 {
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@ -408,7 +410,7 @@
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i2c0: i2c@18009000 {
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compatible = "brcm,iproc-i2c";
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reg = <0x18009000 0x50>;
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interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clock-frequency = <100000>;
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@ -33,7 +33,7 @@ extern void __iomem *sdr_ctl_base_addr;
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u32 socfpga_sdram_self_refresh(u32 sdr_base);
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extern unsigned int socfpga_sdram_self_refresh_sz;
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extern char secondary_trampoline, secondary_trampoline_end;
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extern char secondary_trampoline[], secondary_trampoline_end[];
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extern unsigned long socfpga_cpu1start_addr;
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@ -20,14 +20,14 @@
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static int socfpga_boot_secondary(unsigned int cpu, struct task_struct *idle)
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{
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int trampoline_size = &secondary_trampoline_end - &secondary_trampoline;
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int trampoline_size = secondary_trampoline_end - secondary_trampoline;
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if (socfpga_cpu1start_addr) {
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/* This will put CPU #1 into reset. */
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writel(RSTMGR_MPUMODRST_CPU1,
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rst_manager_base_addr + SOCFPGA_RSTMGR_MODMPURST);
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memcpy(phys_to_virt(0), &secondary_trampoline, trampoline_size);
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memcpy(phys_to_virt(0), secondary_trampoline, trampoline_size);
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writel(__pa_symbol(secondary_startup),
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sys_manager_base_addr + (socfpga_cpu1start_addr & 0x000000ff));
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@ -45,12 +45,12 @@ static int socfpga_boot_secondary(unsigned int cpu, struct task_struct *idle)
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static int socfpga_a10_boot_secondary(unsigned int cpu, struct task_struct *idle)
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{
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int trampoline_size = &secondary_trampoline_end - &secondary_trampoline;
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int trampoline_size = secondary_trampoline_end - secondary_trampoline;
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if (socfpga_cpu1start_addr) {
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writel(RSTMGR_MPUMODRST_CPU1, rst_manager_base_addr +
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SOCFPGA_A10_RSTMGR_MODMPURST);
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memcpy(phys_to_virt(0), &secondary_trampoline, trampoline_size);
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memcpy(phys_to_virt(0), secondary_trampoline, trampoline_size);
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writel(__pa_symbol(secondary_startup),
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sys_manager_base_addr + (socfpga_cpu1start_addr & 0x00000fff));
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@ -296,8 +296,7 @@
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pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>;
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phys = <&ufs_0_phy>;
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phy-names = "ufs-phy";
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samsung,sysreg = <&syscon_fsys2>;
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samsung,ufs-shareability-reg-offset = <0x710>;
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samsung,sysreg = <&syscon_fsys2 0x710>;
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status = "disabled";
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};
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};
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@ -34,6 +34,12 @@ struct scmi_msg_resp_base_attributes {
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__le16 reserved;
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};
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struct scmi_msg_resp_base_discover_agent {
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__le32 agent_id;
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u8 name[SCMI_MAX_STR_SIZE];
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};
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struct scmi_msg_base_error_notify {
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__le32 event_control;
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#define BASE_TP_NOTIFY_ALL BIT(0)
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int id, char *name)
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{
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int ret;
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struct scmi_msg_resp_base_discover_agent *agent_info;
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struct scmi_xfer *t;
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ret = ph->xops->xfer_get_init(ph, BASE_DISCOVER_AGENT,
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sizeof(__le32), SCMI_MAX_STR_SIZE, &t);
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sizeof(__le32), sizeof(*agent_info), &t);
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if (ret)
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return ret;
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put_unaligned_le32(id, t->tx.buf);
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ret = ph->xops->do_xfer(ph, t);
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if (!ret)
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strlcpy(name, t->rx.buf, SCMI_MAX_STR_SIZE);
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if (!ret) {
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agent_info = t->rx.buf;
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strlcpy(name, agent_info->name, SCMI_MAX_STR_SIZE);
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}
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ph->xops->xfer_put(ph, t);
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@ -138,9 +138,7 @@ static int scmi_pm_domain_probe(struct scmi_device *sdev)
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scmi_pd_data->domains = domains;
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scmi_pd_data->num_domains = num_domains;
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of_genpd_add_provider_onecell(np, scmi_pd_data);
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return 0;
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return of_genpd_add_provider_onecell(np, scmi_pd_data);
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}
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static const struct scmi_device_id scmi_id_table[] = {
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@ -637,7 +637,7 @@ static int scmi_sensor_config_get(const struct scmi_protocol_handle *ph,
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if (ret)
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return ret;
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put_unaligned_le32(cpu_to_le32(sensor_id), t->tx.buf);
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put_unaligned_le32(sensor_id, t->tx.buf);
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ret = ph->xops->do_xfer(ph, t);
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if (!ret) {
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struct sensors_info *si = ph->get_priv(ph);
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@ -82,7 +82,8 @@ static bool scmi_vio_have_vq_rx(struct virtio_device *vdev)
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}
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static int scmi_vio_feed_vq_rx(struct scmi_vio_channel *vioch,
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struct scmi_vio_msg *msg)
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struct scmi_vio_msg *msg,
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struct device *dev)
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{
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struct scatterlist sg_in;
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int rc;
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@ -94,8 +95,7 @@ static int scmi_vio_feed_vq_rx(struct scmi_vio_channel *vioch,
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rc = virtqueue_add_inbuf(vioch->vqueue, &sg_in, 1, msg, GFP_ATOMIC);
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if (rc)
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dev_err_once(vioch->cinfo->dev,
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"failed to add to virtqueue (%d)\n", rc);
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dev_err_once(dev, "failed to add to virtqueue (%d)\n", rc);
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else
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virtqueue_kick(vioch->vqueue);
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struct scmi_vio_msg *msg)
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{
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if (vioch->is_rx) {
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scmi_vio_feed_vq_rx(vioch, msg);
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scmi_vio_feed_vq_rx(vioch, msg, vioch->cinfo->dev);
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} else {
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/* Here IRQs are assumed to be already disabled by the caller */
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spin_lock(&vioch->lock);
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@ -269,7 +269,7 @@ static int virtio_chan_setup(struct scmi_chan_info *cinfo, struct device *dev,
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list_add_tail(&msg->list, &vioch->free_list);
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spin_unlock_irqrestore(&vioch->lock, flags);
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} else {
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scmi_vio_feed_vq_rx(vioch, msg);
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scmi_vio_feed_vq_rx(vioch, msg, cinfo->dev);
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}
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}
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@ -156,7 +156,7 @@ static int scmi_voltage_descriptors_get(const struct scmi_protocol_handle *ph,
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int cnt;
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cmd->domain_id = cpu_to_le32(v->id);
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cmd->level_index = desc_index;
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cmd->level_index = cpu_to_le32(desc_index);
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ret = ph->xops->do_xfer(ph, tl);
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if (ret)
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break;
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@ -50,7 +50,7 @@ static int __init smccc_soc_init(void)
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arm_smccc_1_1_invoke(ARM_SMCCC_ARCH_FEATURES_FUNC_ID,
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ARM_SMCCC_ARCH_SOC_ID, &res);
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if (res.a0 == SMCCC_RET_NOT_SUPPORTED) {
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if ((int)res.a0 == SMCCC_RET_NOT_SUPPORTED) {
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pr_info("ARCH_SOC_ID not implemented, skipping ....\n");
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return 0;
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}
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@ -241,7 +241,7 @@ static void mtk_smi_larb_config_port_gen2_general(struct device *dev)
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{
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struct mtk_smi_larb *larb = dev_get_drvdata(dev);
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u32 reg, flags_general = larb->larb_gen->flags_general;
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const u8 *larbostd = larb->larb_gen->ostd[larb->larbid];
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const u8 *larbostd = larb->larb_gen->ostd ? larb->larb_gen->ostd[larb->larbid] : NULL;
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int i;
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if (BIT(larb->larbid) & larb->larb_gen->larb_direct_to_common_mask)
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@ -810,10 +810,9 @@ static int optee_ffa_probe(struct ffa_device *ffa_dev)
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return -EINVAL;
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optee = kzalloc(sizeof(*optee), GFP_KERNEL);
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if (!optee) {
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rc = -ENOMEM;
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goto err;
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}
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if (!optee)
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return -ENOMEM;
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optee->pool = optee_ffa_config_dyn_shm();
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if (IS_ERR(optee->pool)) {
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rc = PTR_ERR(optee->pool);
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