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mmc: mediatek: support 24bits segment size 

MSDC IP which support 64G DRAM will support 24bits BDMA buffer length,
so add support it.

Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This commit is contained in:
Chaotian Jing 2019-08-22 14:47:41 +08:00 committed by Ulf Hansson
parent da6e0f7024
commit 6ef042bd00
1 changed files with 13 additions and 3 deletions
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16
drivers/mmc/host/mtk-sd.c
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@ -328,6 +328,7 @@ struct mt_bdma_desc {
u32 ptr;
u32 bd_data_len;
#define BDMA_DESC_BUFLEN (0xffff) /* bit0 ~ bit15 */
#define BDMA_DESC_BUFLEN_EXT (0xffffff) /* bit0 ~ bit23 */
};
struct msdc_dma {
@ -641,8 +642,14 @@ static inline void msdc_dma_setup(struct msdc_host *host, struct msdc_dma *dma,
bd[j].bd_info |= (upper_32_bits(dma_address) & 0xf)
<< 28;
}
bd[j].bd_data_len &= ~BDMA_DESC_BUFLEN;
bd[j].bd_data_len |= (dma_len & BDMA_DESC_BUFLEN);
if (host->dev_comp->support_64g) {
bd[j].bd_data_len &= ~BDMA_DESC_BUFLEN_EXT;
bd[j].bd_data_len |= (dma_len & BDMA_DESC_BUFLEN_EXT);
} else {
bd[j].bd_data_len &= ~BDMA_DESC_BUFLEN;
bd[j].bd_data_len |= (dma_len & BDMA_DESC_BUFLEN);
}
if (j == data->sg_count - 1) /* the last bd */
bd[j].bd_info |= BDMA_DESC_EOL;
@ -2277,7 +2284,10 @@ static int msdc_drv_probe(struct platform_device *pdev)
mmc->caps |= MMC_CAP_ERASE | MMC_CAP_CMD23;
/* MMC core transfer sizes tunable parameters */
mmc->max_segs = MAX_BD_NUM;
mmc->max_seg_size = BDMA_DESC_BUFLEN;
if (host->dev_comp->support_64g)
mmc->max_seg_size = BDMA_DESC_BUFLEN_EXT;
else
mmc->max_seg_size = BDMA_DESC_BUFLEN;
mmc->max_blk_size = 2048;
mmc->max_req_size = 512 * 1024;
mmc->max_blk_count = mmc->max_req_size / 512;