iio: adc: xilinx-xadc: Correct temperature offset/scale for UltraScale
commite2bd8c28b9
upstream. The driver was previously using offset and scale values for the temperature sensor readings which were only valid for 7-series devices. Add per-device-type values for offset and scale and set them appropriately for each device type. Note that the values used for the UltraScale family are for UltraScale+ (i.e. the SYSMONE4 primitive) using the internal reference, as that seems to be the most common configuration and the device tree values Xilinx's device tree generator produces don't seem to give us anything to tell us which configuration is used. However, the differences within the UltraScale family seem fairly minor and it's closer than using the 7-series values instead in any case. Fixes:c2b7720a79
("iio: xilinx-xadc: Add basic support for Ultrascale System Monitor") Signed-off-by: Robert Hancock <robert.hancock@calian.com> Acked-by: O'Griofa, Conall <conall.ogriofa@amd.com> Tested-by: O'Griofa, Conall <conall.ogriofa@amd.com> Link: https://lore.kernel.org/r/20230915001019.2862964-3-robert.hancock@calian.com Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -456,6 +456,9 @@ static const struct xadc_ops xadc_zynq_ops = {
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.interrupt_handler = xadc_zynq_interrupt_handler,
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.interrupt_handler = xadc_zynq_interrupt_handler,
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.update_alarm = xadc_zynq_update_alarm,
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.update_alarm = xadc_zynq_update_alarm,
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.type = XADC_TYPE_S7,
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.type = XADC_TYPE_S7,
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/* Temp in C = (val * 503.975) / 2**bits - 273.15 */
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.temp_scale = 503975,
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.temp_offset = 273150,
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};
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};
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static const unsigned int xadc_axi_reg_offsets[] = {
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static const unsigned int xadc_axi_reg_offsets[] = {
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@ -566,6 +569,9 @@ static const struct xadc_ops xadc_7s_axi_ops = {
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.interrupt_handler = xadc_axi_interrupt_handler,
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.interrupt_handler = xadc_axi_interrupt_handler,
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.flags = XADC_FLAGS_BUFFERED | XADC_FLAGS_IRQ_OPTIONAL,
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.flags = XADC_FLAGS_BUFFERED | XADC_FLAGS_IRQ_OPTIONAL,
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.type = XADC_TYPE_S7,
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.type = XADC_TYPE_S7,
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/* Temp in C = (val * 503.975) / 2**bits - 273.15 */
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.temp_scale = 503975,
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.temp_offset = 273150,
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};
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};
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static const struct xadc_ops xadc_us_axi_ops = {
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static const struct xadc_ops xadc_us_axi_ops = {
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@ -577,6 +583,12 @@ static const struct xadc_ops xadc_us_axi_ops = {
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.interrupt_handler = xadc_axi_interrupt_handler,
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.interrupt_handler = xadc_axi_interrupt_handler,
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.flags = XADC_FLAGS_BUFFERED | XADC_FLAGS_IRQ_OPTIONAL,
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.flags = XADC_FLAGS_BUFFERED | XADC_FLAGS_IRQ_OPTIONAL,
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.type = XADC_TYPE_US,
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.type = XADC_TYPE_US,
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/**
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* Values below are for UltraScale+ (SYSMONE4) using internal reference.
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* See https://docs.xilinx.com/v/u/en-US/ug580-ultrascale-sysmon
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*/
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.temp_scale = 509314,
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.temp_offset = 280231,
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};
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};
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static int _xadc_update_adc_reg(struct xadc *xadc, unsigned int reg,
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static int _xadc_update_adc_reg(struct xadc *xadc, unsigned int reg,
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@ -948,8 +960,7 @@ static int xadc_read_raw(struct iio_dev *indio_dev,
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*val2 = bits;
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*val2 = bits;
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return IIO_VAL_FRACTIONAL_LOG2;
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return IIO_VAL_FRACTIONAL_LOG2;
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case IIO_TEMP:
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case IIO_TEMP:
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/* Temp in C = (val * 503.975) / 2**bits - 273.15 */
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*val = xadc->ops->temp_scale;
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*val = 503975;
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*val2 = bits;
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*val2 = bits;
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return IIO_VAL_FRACTIONAL_LOG2;
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return IIO_VAL_FRACTIONAL_LOG2;
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default:
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default:
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@ -957,7 +968,7 @@ static int xadc_read_raw(struct iio_dev *indio_dev,
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}
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}
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case IIO_CHAN_INFO_OFFSET:
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case IIO_CHAN_INFO_OFFSET:
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/* Only the temperature channel has an offset */
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/* Only the temperature channel has an offset */
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*val = -((273150 << bits) / 503975);
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*val = -((xadc->ops->temp_offset << bits) / xadc->ops->temp_scale);
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return IIO_VAL_INT;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SAMP_FREQ:
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case IIO_CHAN_INFO_SAMP_FREQ:
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ret = xadc_read_samplerate(xadc);
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ret = xadc_read_samplerate(xadc);
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@ -85,6 +85,8 @@ struct xadc_ops {
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unsigned int flags;
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unsigned int flags;
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enum xadc_type type;
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enum xadc_type type;
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int temp_scale;
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int temp_offset;
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};
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};
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static inline int _xadc_read_adc_reg(struct xadc *xadc, unsigned int reg,
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static inline int _xadc_read_adc_reg(struct xadc *xadc, unsigned int reg,
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