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ARM: dts: imx6sl: add "fsl,imx6q-uart" for uart compatible 

In order to enable the DMA for some uart port in imx6sl, we add the
"fsl,imx6q-uart" to the uart's compatible property.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This commit is contained in:
Huang Shijie 2013-07-08 17:14:19 +08:00 committed by Shawn Guo
parent 38918b7275
commit 6eb85f9196
1 changed files with 10 additions and 5 deletions
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15
arch/arm/boot/dts/imx6sl.dtsi
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@ -152,7 +152,8 @@
};
uart5: serial@02018000 {
compatible = "fsl,imx6sl-uart", "fsl,imx21-uart";
compatible = "fsl,imx6sl-uart",
"fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x02018000 0x4000>;
interrupts = <0 30 0x04>;
clocks = <&clks IMX6SL_CLK_UART>,
@ -162,7 +163,8 @@
};
uart1: serial@02020000 {
compatible = "fsl,imx6sl-uart", "fsl,imx21-uart";
compatible = "fsl,imx6sl-uart",
"fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x02020000 0x4000>;
interrupts = <0 26 0x04>;
clocks = <&clks IMX6SL_CLK_UART>,
@ -172,7 +174,8 @@
};
uart2: serial@02024000 {
compatible = "fsl,imx6sl-uart", "fsl,imx21-uart";
compatible = "fsl,imx6sl-uart",
"fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x02024000 0x4000>;
interrupts = <0 27 0x04>;
clocks = <&clks IMX6SL_CLK_UART>,
@ -209,7 +212,8 @@
};
uart3: serial@02034000 {
compatible = "fsl,imx6sl-uart", "fsl,imx21-uart";
compatible = "fsl,imx6sl-uart",
"fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x02034000 0x4000>;
interrupts = <0 28 0x04>;
clocks = <&clks IMX6SL_CLK_UART>,
@ -219,7 +223,8 @@
};
uart4: serial@02038000 {
compatible = "fsl,imx6sl-uart", "fsl,imx21-uart";
compatible = "fsl,imx6sl-uart",
"fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x02038000 0x4000>;
interrupts = <0 29 0x04>;
clocks = <&clks IMX6SL_CLK_UART>,