i40e: better error reporting for nvmupdate
Make sure we return EBUSY while finishing up a reset, and add a few bits for better debug messages. Change-ID: I23f6c28a8d96d7aa171abcc265737cec7826c292 Signed-off-by: Shannon Nelson <shannon.nelson@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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@ -1005,16 +1005,19 @@ static int i40e_get_eeprom(struct net_device *netdev,
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/* check for NVMUpdate access method */
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magic = hw->vendor_id | (hw->device_id << 16);
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if (eeprom->magic && eeprom->magic != magic) {
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struct i40e_nvm_access *cmd;
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int errno;
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struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom;
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int errno = 0;
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/* make sure it is the right magic for NVMUpdate */
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if ((eeprom->magic >> 16) != hw->device_id)
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return -EINVAL;
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errno = -EINVAL;
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else if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) ||
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test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state))
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errno = -EBUSY;
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else
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ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
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cmd = (struct i40e_nvm_access *)eeprom;
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ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
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if (ret_val && (hw->debug_mask & I40E_DEBUG_NVM))
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if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM))
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dev_info(&pf->pdev->dev,
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"NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n",
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ret_val, hw->aq.asq_last_status, errno,
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@ -1098,27 +1101,25 @@ static int i40e_set_eeprom(struct net_device *netdev,
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struct i40e_netdev_priv *np = netdev_priv(netdev);
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struct i40e_hw *hw = &np->vsi->back->hw;
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struct i40e_pf *pf = np->vsi->back;
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struct i40e_nvm_access *cmd;
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struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom;
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int ret_val = 0;
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int errno;
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int errno = 0;
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u32 magic;
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/* normal ethtool set_eeprom is not supported */
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magic = hw->vendor_id | (hw->device_id << 16);
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if (eeprom->magic == magic)
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return -EOPNOTSUPP;
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errno = -EOPNOTSUPP;
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/* check for NVMUpdate access method */
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if (!eeprom->magic || (eeprom->magic >> 16) != hw->device_id)
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return -EINVAL;
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else if (!eeprom->magic || (eeprom->magic >> 16) != hw->device_id)
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errno = -EINVAL;
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else if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) ||
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test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state))
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errno = -EBUSY;
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else
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ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
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if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) ||
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test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state))
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return -EBUSY;
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cmd = (struct i40e_nvm_access *)eeprom;
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ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
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if (ret_val && (hw->debug_mask & I40E_DEBUG_NVM))
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if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM))
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dev_info(&pf->pdev->dev,
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"NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n",
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ret_val, hw->aq.asq_last_status, errno,
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@ -3475,6 +3475,7 @@ static irqreturn_t i40e_intr(int irq, void *data)
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if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
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ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
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set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
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i40e_debug(&pf->hw, I40E_DEBUG_NVM, "AdminQ event\n");
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}
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if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
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@ -6332,7 +6333,9 @@ static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
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case i40e_aqc_opc_nvm_erase:
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case i40e_aqc_opc_nvm_update:
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case i40e_aqc_opc_oem_post_update:
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i40e_debug(&pf->hw, I40E_DEBUG_NVM, "ARQ NVM operation completed\n");
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i40e_debug(&pf->hw, I40E_DEBUG_NVM,
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"ARQ NVM operation 0x%04x completed\n",
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opcode);
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break;
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default:
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dev_info(&pf->pdev->dev,
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