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[SPARC64]: Call do_mathemu on illegal instruction traps too. 

To add this logic, put the VIS instruction check at the
vis_emul() call site instead of inside of vis_emul().

Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller 2006-11-19 14:38:25 -08:00
parent 042cf50cfd
commit 6e7726e16f
2 changed files with 15 additions and 9 deletions
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18
arch/sparc64/kernel/traps.c
View File

@ -2261,8 +2261,12 @@ void die_if_kernel(char *str, struct pt_regs *regs)
do_exit(SIGSEGV);
}
#define VIS_OPCODE_MASK ((0x3 << 30) | (0x3f << 19))
#define VIS_OPCODE_VAL ((0x2 << 30) | (0x36 << 19))
extern int handle_popc(u32 insn, struct pt_regs *regs);
extern int handle_ldf_stq(u32 insn, struct pt_regs *regs);
extern int vis_emul(struct pt_regs *, unsigned int);
void do_illegal_instruction(struct pt_regs *regs)
{
@ -2287,10 +2291,18 @@ void do_illegal_instruction(struct pt_regs *regs)
if (handle_ldf_stq(insn, regs))
return;
} else if (tlb_type == hypervisor) {
extern int vis_emul(struct pt_regs *, unsigned int);
if ((insn & VIS_OPCODE_MASK) == VIS_OPCODE_VAL) {
if (!vis_emul(regs, insn))
return;
} else {
struct fpustate *f = FPUSTATE;
if (!vis_emul(regs, insn))
return;
/* XXX maybe verify XFSR bits like
* XXX do_fpother() does?
*/
if (do_mathemu(regs, f))
return;
}
}
}
info.si_signo = SIGILL;

6
arch/sparc64/kernel/visemul.c
View File

@ -128,9 +128,6 @@
/* 001001100 - Permute bytes as specified by GSR.MASK */
#define BSHUFFLE_OPF 0x04c
#define VIS_OPCODE_MASK ((0x3 << 30) | (0x3f << 19))
#define VIS_OPCODE_VAL ((0x2 << 30) | (0x36 << 19))
#define VIS_OPF_SHIFT 5
#define VIS_OPF_MASK (0x1ff << VIS_OPF_SHIFT)
@ -810,9 +807,6 @@ int vis_emul(struct pt_regs *regs, unsigned int insn)
if (get_user(insn, (u32 __user *) pc))
return -EFAULT;
if ((insn & VIS_OPCODE_MASK) != VIS_OPCODE_VAL)
return -EINVAL;
opf = (insn & VIS_OPF_MASK) >> VIS_OPF_SHIFT;
switch (opf) {
default: