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MIPS: Cleanup the unused __arch_local_irq_restore() function 

In history, __arch_local_irq_restore() is only used by SMTC. However,
SMTC support has been removed since 3.16, this patch remove the unused
function.

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12159/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Huacai Chen 2016-01-21 21:09:47 +08:00 committed by Ralf Baechle
parent 503943e0e5
commit 6e52684467
2 changed files with 1 additions and 59 deletions
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30
arch/mips/include/asm/irqflags.h
View File

@ -84,41 +84,11 @@ static inline void arch_local_irq_restore(unsigned long flags)
: "memory"); : "memory");
} }
static inline void __arch_local_irq_restore(unsigned long flags)
{
__asm__ __volatile__(
" .set push \n"
" .set noreorder \n"
" .set noat \n"
#if defined(CONFIG_IRQ_MIPS_CPU)
/*
* Slow, but doesn't suffer from a relatively unlikely race
* condition we're having since days 1.
*/
" beqz %[flags], 1f \n"
" di \n"
" ei \n"
"1: \n"
#else
/*
* Fast, dangerous. Life is fun, life is good.
*/
" mfc0 $1, $12 \n"
" ins $1, %[flags], 0, 1 \n"
" mtc0 $1, $12 \n"
#endif
" " __stringify(__irq_disable_hazard) " \n"
" .set pop \n"
: [flags] "=r" (flags)
: "0" (flags)
: "memory");
}
#else #else
/* Functions that require preempt_{dis,en}able() are in mips-atomic.c */ /* Functions that require preempt_{dis,en}able() are in mips-atomic.c */
void arch_local_irq_disable(void); void arch_local_irq_disable(void);
unsigned long arch_local_irq_save(void); unsigned long arch_local_irq_save(void);
void arch_local_irq_restore(unsigned long flags); void arch_local_irq_restore(unsigned long flags);
void __arch_local_irq_restore(unsigned long flags);
#endif /* CONFIG_CPU_MIPSR2 || CONFIG_CPU_MIPSR6 */ #endif /* CONFIG_CPU_MIPSR2 || CONFIG_CPU_MIPSR6 */
static inline void arch_local_irq_enable(void) static inline void arch_local_irq_enable(void)

30
arch/mips/lib/mips-atomic.c
View File

@ -57,7 +57,6 @@ notrace void arch_local_irq_disable(void)
} }
EXPORT_SYMBOL(arch_local_irq_disable); EXPORT_SYMBOL(arch_local_irq_disable);
notrace unsigned long arch_local_irq_save(void) notrace unsigned long arch_local_irq_save(void)
{ {
unsigned long flags; unsigned long flags;
@ -111,31 +110,4 @@ notrace void arch_local_irq_restore(unsigned long flags)
} }
EXPORT_SYMBOL(arch_local_irq_restore); EXPORT_SYMBOL(arch_local_irq_restore);
#endif /* !CONFIG_CPU_MIPSR2 && !CONFIG_CPU_MIPSR6 */
notrace void __arch_local_irq_restore(unsigned long flags)
{
unsigned long __tmp1;
preempt_disable();
__asm__ __volatile__(
" .set push \n"
" .set noreorder \n"
" .set noat \n"
" mfc0 $1, $12 \n"
" andi %[flags], 1 \n"
" ori $1, 0x1f \n"
" xori $1, 0x1f \n"
" or %[flags], $1 \n"
" mtc0 %[flags], $12 \n"
" " __stringify(__irq_disable_hazard) " \n"
" .set pop \n"
: [flags] "=r" (__tmp1)
: "0" (flags)
: "memory");
preempt_enable();
}
EXPORT_SYMBOL(__arch_local_irq_restore);
#endif /* !CONFIG_CPU_MIPSR2 */