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ARM: at91: fix hanged boot due to early rtc-interrupt 

Make sure the RTC-interrupts are masked at boot by adding a new helper
function to be used at SOC-init.

This fixes hanged boot on all AT91 SOCs with an RTC (but RM9200), for
example, after a reset during an RTC-update or if an RTC-alarm goes off
after shutdown (e.g. when using RTC wakeup).

The RTC and RTT-peripherals are powered by backup power (VDDBU) (on all
AT91 SOCs but RM9200) and are not reset on wake-up, user, watchdog or
software reset. This means that their interrupts may be enabled during
early boot if, for example, they where not disabled during a previous
shutdown (e.g. due to a buggy driver or a non-clean shutdown such as a
user reset). Furthermore, an RTC or RTT-alarm may also be active.

The RTC and RTT-interrupts use the shared system-interrupt line, which
is also used by the PIT, and if an interrupt occurs before a handler
(e.g. RTC-driver) has been installed this leads to the system interrupt
being disabled and prevents the system from booting.

Note that when boot hangs due to an early RTC or RTT-interrupt, the only
way to get the system to start again is to remove the backup power (e.g.
battery) or to disable the interrupt manually from the bootloader. In
particular, a user reset is not sufficient.

Signed-off-by: Johan Hovold <jhovold@gmail.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: stable@vger.kernel.org # 3.11.x
This commit is contained in:
Johan Hovold 2013-10-16 11:56:14 +02:00 committed by Nicolas Ferre
parent 15c03dd485
commit 6de714c21a
11 changed files with 86 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/mach-at91/Makefile
View File

@ -2,7 +2,7 @@
# Makefile for the linux kernel.
#
obj-y := irq.o gpio.o setup.o
obj-y := irq.o gpio.o setup.o sysirq_mask.o
obj-m :=
obj-n :=
obj- :=

2
arch/arm/mach-at91/at91sam9g45.c
View File

@ -377,6 +377,8 @@ static void __init at91sam9g45_initialize(void)
arm_pm_idle = at91sam9_idle;
arm_pm_restart = at91sam9g45_restart;
at91_sysirq_mask_rtc(AT91SAM9G45_BASE_RTC);
/* Register GPIO subsystem */
at91_gpio_init(at91sam9g45_gpio, 5);
}

6
arch/arm/mach-at91/at91sam9n12.c
View File

@ -223,7 +223,13 @@ static void __init at91sam9n12_map_io(void)
at91_init_sram(0, AT91SAM9N12_SRAM_BASE, AT91SAM9N12_SRAM_SIZE);
}
static void __init at91sam9n12_initialize(void)
{
at91_sysirq_mask_rtc(AT91SAM9N12_BASE_RTC);
}
AT91_SOC_START(at91sam9n12)
.map_io = at91sam9n12_map_io,
.register_clocks = at91sam9n12_register_clocks,
.init = at91sam9n12_initialize,
AT91_SOC_END

2
arch/arm/mach-at91/at91sam9rl.c
View File

@ -294,6 +294,8 @@ static void __init at91sam9rl_initialize(void)
arm_pm_idle = at91sam9_idle;
arm_pm_restart = at91sam9_alt_restart;
at91_sysirq_mask_rtc(AT91SAM9RL_BASE_RTC);
/* Register GPIO subsystem */
at91_gpio_init(at91sam9rl_gpio, 4);
}

6
arch/arm/mach-at91/at91sam9x5.c
View File

@ -322,6 +322,11 @@ static void __init at91sam9x5_map_io(void)
at91_init_sram(0, AT91SAM9X5_SRAM_BASE, AT91SAM9X5_SRAM_SIZE);
}
static void __init at91sam9x5_initialize(void)
{
at91_sysirq_mask_rtc(AT91SAM9X5_BASE_RTC);
}
/* --------------------------------------------------------------------
* Interrupt initialization
* -------------------------------------------------------------------- */
@ -329,4 +334,5 @@ static void __init at91sam9x5_map_io(void)
AT91_SOC_START(at91sam9x5)
.map_io = at91sam9x5_map_io,
.register_clocks = at91sam9x5_register_clocks,
.init = at91sam9x5_initialize,
AT91_SOC_END

1
arch/arm/mach-at91/generic.h
View File

@ -34,6 +34,7 @@ extern int __init at91_aic_of_init(struct device_node *node,
struct device_node *parent);
extern int __init at91_aic5_of_init(struct device_node *node,
struct device_node *parent);
extern void __init at91_sysirq_mask_rtc(u32 rtc_base);
/* Timer */

5
arch/arm/mach-at91/include/mach/at91sam9n12.h
View File

@ -48,6 +48,11 @@
#define AT91SAM9N12_BASE_USART2 0xf8024000
#define AT91SAM9N12_BASE_USART3 0xf8028000
/*
* System Peripherals
*/
#define AT91SAM9N12_BASE_RTC 0xfffffeb0
/*
* Internal Memory.
*/

5
arch/arm/mach-at91/include/mach/at91sam9x5.h
View File

@ -54,6 +54,11 @@
#define AT91SAM9X5_BASE_USART1 0xf8020000
#define AT91SAM9X5_BASE_USART2 0xf8024000
/*
* System Peripherals
*/
#define AT91SAM9X5_BASE_RTC 0xfffffeb0
/*
* Internal Memory.
*/

5
arch/arm/mach-at91/include/mach/sama5d3.h
View File

@ -72,6 +72,11 @@
#define SAMA5D3_BASE_USART2 0xf8020000
#define SAMA5D3_BASE_USART3 0xf8024000
/*
* System Peripherals
*/
#define SAMA5D3_BASE_RTC 0xfffffeb0
/*
* Internal Memory
*/

6
arch/arm/mach-at91/sama5d3.c
View File

@ -371,7 +371,13 @@ static void __init sama5d3_map_io(void)
at91_init_sram(0, SAMA5D3_SRAM_BASE, SAMA5D3_SRAM_SIZE);
}
static void __init sama5d3_initialize(void)
{
at91_sysirq_mask_rtc(SAMA5D3_BASE_RTC);
}
AT91_SOC_START(sama5d3)
.map_io = sama5d3_map_io,
.register_clocks = sama5d3_register_clocks,
.init = sama5d3_initialize,
AT91_SOC_END

47
arch/arm/mach-at91/sysirq_mask.c Normal file
View File

@ -0,0 +1,47 @@
/*
* sysirq_mask.c - System-interrupt masking
*
* Copyright (C) 2013 Johan Hovold <jhovold@gmail.com>
*
* Functions to disable system interrupts from backup-powered peripherals.
*
* The RTC and RTT-peripherals are generally powered by backup power (VDDBU)
* and are not reset on wake-up, user, watchdog or software reset. This means
* that their interrupts may be enabled during early boot (e.g. after a user
* reset).
*
* As the RTC and RTT share the system-interrupt line with the PIT, an
* interrupt occurring before a handler has been installed would lead to the
* system interrupt being disabled and prevent the system from booting.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <linux/io.h>
#include "generic.h"
#define AT91_RTC_IDR 0x24 /* Interrupt Disable Register */
#define AT91_RTC_IMR 0x28 /* Interrupt Mask Register */
void __init at91_sysirq_mask_rtc(u32 rtc_base)
{
void __iomem *base;
u32 mask;
base = ioremap(rtc_base, 64);
if (!base)
return;
mask = readl_relaxed(base + AT91_RTC_IMR);
if (mask) {
pr_info("AT91: Disabling rtc irq\n");
writel_relaxed(mask, base + AT91_RTC_IDR);
(void)readl_relaxed(base + AT91_RTC_IMR); /* flush */
}
iounmap(base);
}