OMAP2/3: gpmc-onenand: correct use of async timings
Use async timings when sync timings are not requested. Also ensure that OneNAND is in async mode when async timings are used. Signed-off-by: Adrian Hunter <adrian.hunter@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -31,6 +31,8 @@ static struct platform_device gpmc_onenand_device = {
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static int omap2_onenand_set_async_mode(int cs, void __iomem *onenand_base)
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{
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struct gpmc_timings t;
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u32 reg;
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int err;
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const int t_cer = 15;
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const int t_avdp = 12;
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@ -43,6 +45,11 @@ static int omap2_onenand_set_async_mode(int cs, void __iomem *onenand_base)
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const int t_wpl = 40;
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const int t_wph = 30;
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/* Ensure sync read and sync write are disabled */
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reg = readw(onenand_base + ONENAND_REG_SYS_CFG1);
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reg &= ~ONENAND_SYS_CFG1_SYNC_READ & ~ONENAND_SYS_CFG1_SYNC_WRITE;
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writew(reg, onenand_base + ONENAND_REG_SYS_CFG1);
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memset(&t, 0, sizeof(t));
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t.sync_clk = 0;
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t.cs_on = 0;
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@ -74,7 +81,16 @@ static int omap2_onenand_set_async_mode(int cs, void __iomem *onenand_base)
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GPMC_CONFIG1_DEVICESIZE_16 |
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GPMC_CONFIG1_MUXADDDATA);
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return gpmc_cs_set_timings(cs, &t);
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err = gpmc_cs_set_timings(cs, &t);
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if (err)
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return err;
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/* Ensure sync read and sync write are disabled */
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reg = readw(onenand_base + ONENAND_REG_SYS_CFG1);
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reg &= ~ONENAND_SYS_CFG1_SYNC_READ & ~ONENAND_SYS_CFG1_SYNC_WRITE;
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writew(reg, onenand_base + ONENAND_REG_SYS_CFG1);
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return 0;
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}
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static void set_onenand_cfg(void __iomem *onenand_base, int latency,
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@ -124,7 +140,8 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg,
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} else if (cfg->flags & ONENAND_SYNC_READWRITE) {
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sync_read = 1;
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sync_write = 1;
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}
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} else
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return omap2_onenand_set_async_mode(cs, onenand_base);
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if (!freq) {
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/* Very first call freq is not known */
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