dt-bindings: pinctrl: qcom: Add SC7180 pinctrl binding
Add the binding for the TLMM pinctrl block found in the SC7180 platform Signed-off-by: Jitendra Sharma <shajit@codeaurora.org> Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> [rnayak: Fix some copy-paste issues, sort and fix functions] Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20190806060536.18094-1-rnayak@codeaurora.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Jitendra Sharma
Linus Walleij
parent
8df92d676c
commit
6d2db2965b
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Qualcomm Technologies, Inc. SC7180 TLMM block
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This binding describes the Top Level Mode Multiplexer block found in the
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SC7180 platform.
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- compatible:
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Usage: required
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Value type: <string>
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Definition: must be "qcom,sc7180-pinctrl"
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- reg:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: the base address and size of the north, south and west
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TLMM tiles
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- reg-names:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: names for the cells of reg, must contain "north", "south"
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and "west".
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- interrupts:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: should specify the TLMM summary IRQ.
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- interrupt-controller:
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Usage: required
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Value type: <none>
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Definition: identifies this node as an interrupt controller
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- #interrupt-cells:
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Usage: required
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Value type: <u32>
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Definition: must be 2. Specifying the pin number and flags, as defined
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in <dt-bindings/interrupt-controller/irq.h>
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- gpio-controller:
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Usage: required
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Value type: <none>
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Definition: identifies this node as a gpio controller
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- #gpio-cells:
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Usage: required
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Value type: <u32>
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Definition: must be 2. Specifying the pin number and flags, as defined
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in <dt-bindings/gpio/gpio.h>
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- gpio-ranges:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: see ../gpio/gpio.txt
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- gpio-reserved-ranges:
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Usage: optional
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Value type: <prop-encoded-array>
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Definition: see ../gpio/gpio.txt
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Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
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a general description of GPIO and interrupt bindings.
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Please refer to pinctrl-bindings.txt in this directory for details of the
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common pinctrl bindings used by client devices, including the meaning of the
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phrase "pin configuration node".
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The pin configuration nodes act as a container for an arbitrary number of
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subnodes. Each of these subnodes represents some desired configuration for a
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pin, a group, or a list of pins or groups. This configuration can include the
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mux function to select on those pin(s)/group(s), and various pin configuration
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parameters, such as pull-up, drive strength, etc.
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PIN CONFIGURATION NODES:
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The name of each subnode is not important; all subnodes should be enumerated
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and processed purely based on their content.
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Each subnode only affects those parameters that are explicitly listed. In
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other words, a subnode that lists a mux function but no pin configuration
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parameters implies no information about any pin configuration parameters.
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Similarly, a pin subnode that describes a pullup parameter implies no
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information about e.g. the mux function.
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The following generic properties as defined in pinctrl-bindings.txt are valid
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to specify in a pin configuration subnode:
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- pins:
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Usage: required
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Value type: <string-array>
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Definition: List of gpio pins affected by the properties specified in
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this subnode.
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Valid pins are:
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gpio0-gpio118
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Supports mux, bias and drive-strength
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sdc1_clk, sdc1_cmd, sdc1_data sdc2_clk, sdc2_cmd,
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sdc2_data sdc1_rclk
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Supports bias and drive-strength
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ufs_reset
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Supports bias and drive-strength
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- function:
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Usage: required
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Value type: <string>
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Definition: Specify the alternative function to be configured for the
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specified pins. Functions are only valid for gpio pins.
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Valid values are:
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adsp_ext, agera_pll, aoss_cti, atest_char, atest_char0,
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atest_char1, atest_char2, atest_char3, atest_tsens,
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atest_tsens2, atest_usb1, atest_usb10, atest_usb11,
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atest_usb12, atest_usb13, atest_usb2, atest_usb20,
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atest_usb21, atest_usb22, atest_usb23, audio_ref,
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btfm_slimbus, cam_mclk, cci_async, cci_i2c, cci_timer0,
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cci_timer1, cci_timer2, cci_timer3, cci_timer4,
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cri_trng, dbg_out, ddr_bist, ddr_pxi0, ddr_pxi1,
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ddr_pxi2, ddr_pxi3, dp_hot, edp_lcd, gcc_gp1, gcc_gp2,
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gcc_gp3, gpio, gp_pdm0, gp_pdm1, gp_pdm2, gps_tx,
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jitter_bist, ldo_en, ldo_update, lpass_ext, mdp_vsync,
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mdp_vsync0, mdp_vsync1, mdp_vsync2, mdp_vsync3, mi2s_0,
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mi2s_1, mi2s_2, mss_lte, m_voc, pa_indicator, phase_flag,
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PLL_BIST, pll_bypassnl, pll_reset, prng_rosc, qdss,
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qdss_cti, qlink_enable, qlink_request, qspi_clk, qspi_cs,
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qspi_data, qup00, qup01, qup02, qup03, qup04, qup05,
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qup10, qup11, qup12, qup13, qup14, qup15, sdc1_tb,
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sdc2_tb, sd_write, sp_cmu, tgu_ch0, tgu_ch1, tgu_ch2,
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tgu_ch3, tsense_pwm1, tsense_pwm2, uim1, uim2, uim_batt,
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usb_phy, vfr_1, _V_GPIO, _V_PPS_IN, _V_PPS_OUT,
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vsense_trigger, wlan1_adc0, wlan1_adc1, wlan2_adc0,
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wlan2_adc1,
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- bias-disable:
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Usage: optional
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Value type: <none>
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Definition: The specified pins should be configured as no pull.
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- bias-pull-down:
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Usage: optional
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Value type: <none>
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Definition: The specified pins should be configured as pull down.
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- bias-pull-up:
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Usage: optional
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Value type: <none>
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Definition: The specified pins should be configured as pull up.
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- output-high:
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Usage: optional
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Value type: <none>
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Definition: The specified pins are configured in output mode, driven
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high.
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Not valid for sdc pins.
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- output-low:
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Usage: optional
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Value type: <none>
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Definition: The specified pins are configured in output mode, driven
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low.
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Not valid for sdc pins.
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- drive-strength:
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Usage: optional
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Value type: <u32>
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Definition: Selects the drive strength for the specified pins, in mA.
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Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16
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Example:
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tlmm: pinctrl@3500000 {
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compatible = "qcom,sc7180-pinctrl";
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reg = <0x3500000 0x300000>,
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<0x3900000 0x300000>,
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<0x3D00000 0x300000>;
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reg-names = "west", "north", "south";
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interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&tlmm 0 0 119>;
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gpio-reserved-ranges = <0 4>, <106 4>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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