sparc32: sun4m interrupt mask cleanup
Here is an updated version of a patch I wrote 6 years ago http://marc.info/?l=linux-sparc&m=103939103607617&w=2 that simplifies interrupt mask lookup. It's main purpose is to add VME bus support but it's really a cleanup of the mask code. Signed-off-by: Robert Reif <reif@earthlink.net> Signed-off-by: David S. Miller <davem@davemloft.net>
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Robert Reif
David S. Miller
parent
5ec877083c
commit
6cf4a9243a
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@ -71,8 +71,9 @@ struct sun4m_irq_global __iomem *sun4m_irq_global;
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#define SUN4M_INT_MASKALL 0x80000000 /* mask all interrupts */
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#define SUN4M_INT_MODULE_ERR 0x40000000 /* module error */
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#define SUN4M_INT_M2S_WRITE 0x20000000 /* write buffer error */
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#define SUN4M_INT_ECC 0x10000000 /* ecc memory error */
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#define SUN4M_INT_M2S_WRITE_ERR 0x20000000 /* write buffer error */
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#define SUN4M_INT_ECC_ERR 0x10000000 /* ecc memory error */
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#define SUN4M_INT_VME_ERR 0x08000000 /* vme async error */
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#define SUN4M_INT_FLOPPY 0x00400000 /* floppy disk */
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#define SUN4M_INT_MODULE 0x00200000 /* module interrupt */
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#define SUN4M_INT_VIDEO 0x00100000 /* onboard video */
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@ -83,10 +84,22 @@ struct sun4m_irq_global __iomem *sun4m_irq_global;
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#define SUN4M_INT_SERIAL 0x00008000 /* serial ports */
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#define SUN4M_INT_KBDMS 0x00004000 /* keyboard/mouse */
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#define SUN4M_INT_SBUSBITS 0x00003F80 /* sbus int bits */
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#define SUN4M_INT_VMEBITS 0x0000007F /* vme int bits */
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#define SUN4M_INT_ERROR (SUN4M_INT_MODULE_ERR | \
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SUN4M_INT_M2S_WRITE_ERR | \
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SUN4M_INT_ECC_ERR | \
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SUN4M_INT_VME_ERR)
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#define SUN4M_INT_SBUS(x) (1 << (x+7))
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#define SUN4M_INT_VME(x) (1 << (x))
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/* Interrupt levels used by OBP */
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#define OBP_INT_LEVEL_SOFT 0x10
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#define OBP_INT_LEVEL_ONBOARD 0x20
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#define OBP_INT_LEVEL_SBUS 0x30
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#define OBP_INT_LEVEL_VME 0x40
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/* Interrupt level assignment on sun4m:
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*
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* level source
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@ -140,59 +153,57 @@ struct sun4m_irq_global __iomem *sun4m_irq_global;
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* power: 0x22 onboard power device (XXX unknown mask bit XXX)
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*/
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/* These tables only apply for interrupts greater than 15..
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*
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* any intr value below 0x10 is considered to be a soft-int
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* this may be useful or it may not.. but that's how I've done it.
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* and it won't clash with what OBP is telling us about devices.
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*
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* take an encoded intr value and lookup if it's valid
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* then get the mask bits that match from irq_mask
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*
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* P3: Translation from irq 0x0d to mask 0x2000 is for MrCoffee.
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*/
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static unsigned char irq_xlate[32] = {
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/* 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, a, b, c, d, e, f */
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0, 0, 0, 0, 1, 0, 2, 0, 3, 0, 4, 5, 6, 14, 0, 7,
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0, 0, 8, 9, 0, 10, 0, 11, 0, 12, 0, 13, 0, 14, 0, 0
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};
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static unsigned long irq_mask[] = {
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0, /* illegal index */
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SUN4M_INT_SCSI, /* 1 irq 4 */
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SUN4M_INT_ETHERNET, /* 2 irq 6 */
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SUN4M_INT_VIDEO, /* 3 irq 8 */
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SUN4M_INT_REALTIME, /* 4 irq 10 */
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SUN4M_INT_FLOPPY, /* 5 irq 11 */
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(SUN4M_INT_SERIAL | SUN4M_INT_KBDMS), /* 6 irq 12 */
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SUN4M_INT_MODULE_ERR, /* 7 irq 15 */
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SUN4M_INT_SBUS(0), /* 8 irq 2 */
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SUN4M_INT_SBUS(1), /* 9 irq 3 */
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SUN4M_INT_SBUS(2), /* 10 irq 5 */
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SUN4M_INT_SBUS(3), /* 11 irq 7 */
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SUN4M_INT_SBUS(4), /* 12 irq 9 */
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SUN4M_INT_SBUS(5), /* 13 irq 11 */
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SUN4M_INT_SBUS(6) /* 14 irq 13 */
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static unsigned long irq_mask[0x50] = {
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/* SMP */
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0, SUN4M_SOFT_INT(1),
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SUN4M_SOFT_INT(2), SUN4M_SOFT_INT(3),
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SUN4M_SOFT_INT(4), SUN4M_SOFT_INT(5),
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SUN4M_SOFT_INT(6), SUN4M_SOFT_INT(7),
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SUN4M_SOFT_INT(8), SUN4M_SOFT_INT(9),
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SUN4M_SOFT_INT(10), SUN4M_SOFT_INT(11),
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SUN4M_SOFT_INT(12), SUN4M_SOFT_INT(13),
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SUN4M_SOFT_INT(14), SUN4M_SOFT_INT(15),
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/* soft */
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0, SUN4M_SOFT_INT(1),
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SUN4M_SOFT_INT(2), SUN4M_SOFT_INT(3),
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SUN4M_SOFT_INT(4), SUN4M_SOFT_INT(5),
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SUN4M_SOFT_INT(6), SUN4M_SOFT_INT(7),
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SUN4M_SOFT_INT(8), SUN4M_SOFT_INT(9),
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SUN4M_SOFT_INT(10), SUN4M_SOFT_INT(11),
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SUN4M_SOFT_INT(12), SUN4M_SOFT_INT(13),
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SUN4M_SOFT_INT(14), SUN4M_SOFT_INT(15),
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/* onboard */
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0, 0, 0, 0,
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SUN4M_INT_SCSI, 0, SUN4M_INT_ETHERNET, 0,
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SUN4M_INT_VIDEO, SUN4M_INT_MODULE,
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SUN4M_INT_REALTIME, SUN4M_INT_FLOPPY,
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(SUN4M_INT_SERIAL | SUN4M_INT_KBDMS),
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SUN4M_INT_AUDIO, 0, SUN4M_INT_MODULE_ERR,
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/* sbus */
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0, 0, SUN4M_INT_SBUS(0), SUN4M_INT_SBUS(1),
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0, SUN4M_INT_SBUS(2), 0, SUN4M_INT_SBUS(3),
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0, SUN4M_INT_SBUS(4), 0, SUN4M_INT_SBUS(5),
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0, SUN4M_INT_SBUS(6), 0, 0,
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/* vme */
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0, 0, SUN4M_INT_VME(0), SUN4M_INT_VME(1),
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0, SUN4M_INT_VME(2), 0, SUN4M_INT_VME(3),
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0, SUN4M_INT_VME(4), 0, SUN4M_INT_VME(5),
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0, SUN4M_INT_VME(6), 0, 0
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};
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static unsigned long sun4m_get_irqmask(unsigned int irq)
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{
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unsigned long mask;
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if (irq > 0x20) {
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/* OBIO/SBUS interrupts */
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irq &= 0x1f;
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mask = irq_mask[irq_xlate[irq]];
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if (!mask)
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printk("sun4m_get_irqmask: IRQ%d has no valid mask!\n",irq);
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} else {
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/* Soft Interrupts will come here.
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* Currently there is no way to trigger them but I'm sure
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* something could be cooked up.
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*/
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irq &= 0xf;
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mask = SUN4M_SOFT_INT(irq);
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}
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if (irq < 0x50)
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mask = irq_mask[irq];
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else
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mask = 0;
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if (!mask)
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printk(KERN_ERR "sun4m_get_irqmask: IRQ%d has no valid mask!\n",
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irq);
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return mask;
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}
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@ -247,10 +258,10 @@ static unsigned long cpu_pil_to_imask[16] = {
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/*9*/ SUN4M_INT_SBUS(4) | SUN4M_INT_VME(4) | SUN4M_INT_MODULE_ERR,
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/*10*/ SUN4M_INT_REALTIME,
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/*11*/ SUN4M_INT_SBUS(5) | SUN4M_INT_VME(5) | SUN4M_INT_FLOPPY,
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/*12*/ SUN4M_INT_SERIAL | SUN4M_INT_KBDMS,
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/*13*/ SUN4M_INT_AUDIO,
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/*12*/ SUN4M_INT_SERIAL | SUN4M_INT_KBDMS,
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/*13*/ SUN4M_INT_SBUS(6) | SUN4M_INT_VME(6) | SUN4M_INT_AUDIO,
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/*14*/ SUN4M_INT_E14,
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/*15*/ 0x00000000
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/*15*/ SUN4M_INT_ERROR
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};
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/* We assume the caller has disabled local interrupts when these are called,
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@ -304,8 +315,7 @@ struct sun4m_timer_global {
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static struct sun4m_timer_global __iomem *timers_global;
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#define OBIO_INTR 0x20
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#define TIMER_IRQ (OBIO_INTR | 10)
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#define TIMER_IRQ (OBP_INT_LEVEL_ONBOARD | 10)
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unsigned int lvl14_resolution = (((1000000/HZ) + 1) << 10);
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@ -314,6 +324,33 @@ static void sun4m_clear_clock_irq(void)
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sbus_readl(&timers_global->l10_limit);
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}
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void sun4m_nmi(struct pt_regs *regs)
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{
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unsigned long afsr, afar, si;
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printk(KERN_ERR "Aieee: sun4m NMI received!\n");
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/* XXX HyperSparc hack XXX */
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__asm__ __volatile__("mov 0x500, %%g1\n\t"
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"lda [%%g1] 0x4, %0\n\t"
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"mov 0x600, %%g1\n\t"
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"lda [%%g1] 0x4, %1\n\t" :
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"=r" (afsr), "=r" (afar));
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printk(KERN_ERR "afsr=%08lx afar=%08lx\n", afsr, afar);
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si = sbus_readl(&sun4m_irq_global->pending);
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printk(KERN_ERR "si=%08lx\n", si);
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if (si & SUN4M_INT_MODULE_ERR)
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printk(KERN_ERR "Module async error\n");
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if (si & SUN4M_INT_M2S_WRITE_ERR)
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printk(KERN_ERR "MBus/SBus async error\n");
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if (si & SUN4M_INT_ECC_ERR)
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printk(KERN_ERR "ECC memory error\n");
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if (si & SUN4M_INT_VME_ERR)
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printk(KERN_ERR "VME async error\n");
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printk(KERN_ERR "you lose buddy boy...\n");
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show_regs(regs);
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prom_halt();
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}
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/* Exported for sun4m_smp.c */
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void sun4m_clear_profile_irq(int cpu)
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{
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@ -43,23 +43,6 @@ void syscall_trace_exit(struct pt_regs *regs)
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{
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}
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void sun4m_nmi(struct pt_regs *regs)
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{
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unsigned long afsr, afar;
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printk("Aieee: sun4m NMI received!\n");
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/* XXX HyperSparc hack XXX */
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__asm__ __volatile__("mov 0x500, %%g1\n\t"
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"lda [%%g1] 0x4, %0\n\t"
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"mov 0x600, %%g1\n\t"
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"lda [%%g1] 0x4, %1\n\t" :
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"=r" (afsr), "=r" (afar));
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printk("afsr=%08lx afar=%08lx\n", afsr, afar);
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printk("you lose buddy boy...\n");
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show_regs(regs);
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prom_halt();
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}
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void sun4d_nmi(struct pt_regs *regs)
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{
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printk("Aieee: sun4d NMI received!\n");
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