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e1000e: do not toggle LANPHYPC value bit when PHY reset is blocked 

When PHY reset is intentionally blocked on 82577/8/9, do not toggle the
LANPHYPC value bit (essentially performing a hard power reset of the
device) otherwise the PHY can be put into an unknown state.

Cleanup whitespace in the same function.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
Bruce Allan 2011-02-25 06:25:18 +00:00 committed by Jeff Kirsher
parent 1effb45cca
commit 6cc7aaed70
1 changed files with 4 additions and 4 deletions
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2
drivers/net/e1000e/ich8lan.c
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@ -307,7 +307,7 @@ static s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw)
* the interconnect to PCIe mode. * the interconnect to PCIe mode.
*/ */
fwsm = er32(FWSM); fwsm = er32(FWSM);
if (!(fwsm & E1000_ICH_FWSM_FW_VALID)) { if (!(fwsm & E1000_ICH_FWSM_FW_VALID) && !e1000_check_reset_block(hw)) {
ctrl = er32(CTRL); ctrl = er32(CTRL);
ctrl |= E1000_CTRL_LANPHYPC_OVERRIDE; ctrl |= E1000_CTRL_LANPHYPC_OVERRIDE;
ctrl &= ~E1000_CTRL_LANPHYPC_VALUE; ctrl &= ~E1000_CTRL_LANPHYPC_VALUE;