From 546c830c90beb7d3e398007715fd1b631c6c060a Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Sat, 1 Jun 2013 16:40:11 +0200 Subject: [PATCH 1/6] ARM: at91: fix at91_extern_irq usage for non-dt boards Since 4b68520dc0ec96153bc0d87bca5ffba508edfcf ARM: at91: add AIC5 support we allocate the at91_extern_irq. This patch makes it static and stores the non-dt extern irq in the soc structure. It is then possible to use a at91_get_extern_irq() function to get the value for outside of the irq driver. It is useful for passing its value to at91_aic_init(). Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD Acked-by: Ludovic Desroches [nicolas.ferre@atmel.com: rework commit message] Signed-off-by: Nicolas Ferre --- arch/arm/mach-at91/at91rm9200.c | 8 ++++---- arch/arm/mach-at91/at91sam9260.c | 4 ++-- arch/arm/mach-at91/at91sam9261.c | 4 ++-- arch/arm/mach-at91/at91sam9263.c | 2 +- arch/arm/mach-at91/at91sam9g45.c | 2 +- arch/arm/mach-at91/at91sam9rl.c | 2 +- arch/arm/mach-at91/at91x40.c | 7 +++---- arch/arm/mach-at91/generic.h | 2 +- arch/arm/mach-at91/irq.c | 9 ++++++++- arch/arm/mach-at91/pm.c | 2 +- arch/arm/mach-at91/setup.c | 2 +- arch/arm/mach-at91/soc.h | 1 + 12 files changed, 26 insertions(+), 19 deletions(-) diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c index d193a409bc45..9eb574397ee1 100644 --- a/arch/arm/mach-at91/at91rm9200.c +++ b/arch/arm/mach-at91/at91rm9200.c @@ -332,10 +332,6 @@ static void __init at91rm9200_initialize(void) { arm_pm_idle = at91rm9200_idle; arm_pm_restart = at91rm9200_restart; - at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1) - | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3) - | (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5) - | (1 << AT91RM9200_ID_IRQ6); /* Initialize GPIO subsystem */ at91_gpio_init(at91rm9200_gpio, @@ -388,6 +384,10 @@ static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = { AT91_SOC_START(at91rm9200) .map_io = at91rm9200_map_io, .default_irq_priority = at91rm9200_default_irq_priority, + .extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1) + | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3) + | (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5) + | (1 << AT91RM9200_ID_IRQ6), .ioremap_registers = at91rm9200_ioremap_registers, .register_clocks = at91rm9200_register_clocks, .init = at91rm9200_initialize, diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c index a8ce24538da6..5de6074b4f4f 100644 --- a/arch/arm/mach-at91/at91sam9260.c +++ b/arch/arm/mach-at91/at91sam9260.c @@ -348,8 +348,6 @@ static void __init at91sam9260_initialize(void) { arm_pm_idle = at91sam9_idle; arm_pm_restart = at91sam9_alt_restart; - at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) - | (1 << AT91SAM9260_ID_IRQ2); /* Register GPIO subsystem */ at91_gpio_init(at91sam9260_gpio, 3); @@ -400,6 +398,8 @@ static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = { AT91_SOC_START(at91sam9260) .map_io = at91sam9260_map_io, .default_irq_priority = at91sam9260_default_irq_priority, + .extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) + | (1 << AT91SAM9260_ID_IRQ2), .ioremap_registers = at91sam9260_ioremap_registers, .register_clocks = at91sam9260_register_clocks, .init = at91sam9260_initialize, diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c index 25efb5ac30f1..0e0793241ab7 100644 --- a/arch/arm/mach-at91/at91sam9261.c +++ b/arch/arm/mach-at91/at91sam9261.c @@ -290,8 +290,6 @@ static void __init at91sam9261_initialize(void) { arm_pm_idle = at91sam9_idle; arm_pm_restart = at91sam9_alt_restart; - at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1) - | (1 << AT91SAM9261_ID_IRQ2); /* Register GPIO subsystem */ at91_gpio_init(at91sam9261_gpio, 3); @@ -342,6 +340,8 @@ static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = { AT91_SOC_START(at91sam9261) .map_io = at91sam9261_map_io, .default_irq_priority = at91sam9261_default_irq_priority, + .extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1) + | (1 << AT91SAM9261_ID_IRQ2), .ioremap_registers = at91sam9261_ioremap_registers, .register_clocks = at91sam9261_register_clocks, .init = at91sam9261_initialize, diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c index f44ffd2105a7..6ce7d1850893 100644 --- a/arch/arm/mach-at91/at91sam9263.c +++ b/arch/arm/mach-at91/at91sam9263.c @@ -327,7 +327,6 @@ static void __init at91sam9263_initialize(void) { arm_pm_idle = at91sam9_idle; arm_pm_restart = at91sam9_alt_restart; - at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1); /* Register GPIO subsystem */ at91_gpio_init(at91sam9263_gpio, 5); @@ -378,6 +377,7 @@ static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = { AT91_SOC_START(at91sam9263) .map_io = at91sam9263_map_io, .default_irq_priority = at91sam9263_default_irq_priority, + .extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1), .ioremap_registers = at91sam9263_ioremap_registers, .register_clocks = at91sam9263_register_clocks, .init = at91sam9263_initialize, diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c index 8b7fce067652..fda502691686 100644 --- a/arch/arm/mach-at91/at91sam9g45.c +++ b/arch/arm/mach-at91/at91sam9g45.c @@ -374,7 +374,6 @@ static void __init at91sam9g45_initialize(void) { arm_pm_idle = at91sam9_idle; arm_pm_restart = at91sam9g45_restart; - at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0); /* Register GPIO subsystem */ at91_gpio_init(at91sam9g45_gpio, 5); @@ -425,6 +424,7 @@ static unsigned int at91sam9g45_default_irq_priority[NR_AIC_IRQS] __initdata = { AT91_SOC_START(at91sam9g45) .map_io = at91sam9g45_map_io, .default_irq_priority = at91sam9g45_default_irq_priority, + .extern_irq = (1 << AT91SAM9G45_ID_IRQ0), .ioremap_registers = at91sam9g45_ioremap_registers, .register_clocks = at91sam9g45_register_clocks, .init = at91sam9g45_initialize, diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c index f77fae5591bc..d4ec0d9a9872 100644 --- a/arch/arm/mach-at91/at91sam9rl.c +++ b/arch/arm/mach-at91/at91sam9rl.c @@ -293,7 +293,6 @@ static void __init at91sam9rl_initialize(void) { arm_pm_idle = at91sam9_idle; arm_pm_restart = at91sam9_alt_restart; - at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0); /* Register GPIO subsystem */ at91_gpio_init(at91sam9rl_gpio, 4); @@ -344,6 +343,7 @@ static unsigned int at91sam9rl_default_irq_priority[NR_AIC_IRQS] __initdata = { AT91_SOC_START(at91sam9rl) .map_io = at91sam9rl_map_io, .default_irq_priority = at91sam9rl_default_irq_priority, + .extern_irq = (1 << AT91SAM9RL_ID_IRQ0), .ioremap_registers = at91sam9rl_ioremap_registers, .register_clocks = at91sam9rl_register_clocks, .init = at91sam9rl_initialize, diff --git a/arch/arm/mach-at91/at91x40.c b/arch/arm/mach-at91/at91x40.c index 19ca79396905..bad94b84a46f 100644 --- a/arch/arm/mach-at91/at91x40.c +++ b/arch/arm/mach-at91/at91x40.c @@ -55,8 +55,6 @@ static void at91x40_idle(void) void __init at91x40_initialize(unsigned long main_clock) { arm_pm_idle = at91x40_idle; - at91_extern_irq = (1 << AT91X40_ID_IRQ0) | (1 << AT91X40_ID_IRQ1) - | (1 << AT91X40_ID_IRQ2); } /* @@ -86,9 +84,10 @@ static unsigned int at91x40_default_irq_priority[NR_AIC_IRQS] __initdata = { void __init at91x40_init_interrupts(unsigned int priority[NR_AIC_IRQS]) { + u32 extern_irq = (1 << AT91X40_ID_IRQ0) | (1 << AT91X40_ID_IRQ1) + | (1 << AT91X40_ID_IRQ2); if (!priority) priority = at91x40_default_irq_priority; - at91_aic_init(priority, at91_extern_irq); + at91_aic_init(priority, extern_irq); } - diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h index 78ab06548658..f6de36aefe85 100644 --- a/arch/arm/mach-at91/generic.h +++ b/arch/arm/mach-at91/generic.h @@ -85,4 +85,4 @@ extern void __init at91_gpio_irq_setup(void); extern int __init at91_gpio_of_irq_setup(struct device_node *node, struct device_node *parent); -extern int at91_extern_irq; +extern u32 at91_get_extern_irq(void); diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c index e0ca59171022..3d192c5aee66 100644 --- a/arch/arm/mach-at91/irq.c +++ b/arch/arm/mach-at91/irq.c @@ -232,7 +232,14 @@ static void __maybe_unused at91_aic5_eoi(struct irq_data *d) at91_aic_write(AT91_AIC5_EOICR, 0); } -unsigned long *at91_extern_irq; +static unsigned long *at91_extern_irq; + +u32 at91_get_extern_irq(void) +{ + if (!at91_extern_irq) + return 0; + return *at91_extern_irq; +} #define is_extern_irq(hwirq) test_bit(hwirq, at91_extern_irq) diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 530db304ec5e..15afb5d9271f 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -212,7 +212,7 @@ static int at91_pm_enter(suspend_state_t state) (at91_pmc_read(AT91_PMC_PCSR) | (1 << AT91_ID_FIQ) | (1 << AT91_ID_SYS) - | (at91_extern_irq)) + | (at91_get_extern_irq())) & at91_aic_read(AT91_AIC_IMR), state); diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c index 942dc00f1227..b17fbcf4d9e8 100644 --- a/arch/arm/mach-at91/setup.c +++ b/arch/arm/mach-at91/setup.c @@ -48,7 +48,7 @@ void __init at91_init_irq_default(void) void __init at91_init_interrupts(unsigned int *priority) { /* Initialize the AIC interrupt controller */ - at91_aic_init(priority, at91_extern_irq); + at91_aic_init(priority, at91_boot_soc.extern_irq); /* Enable GPIO interrupts */ at91_gpio_irq_setup(); diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h index 43a225f9e713..a1e1482c6da8 100644 --- a/arch/arm/mach-at91/soc.h +++ b/arch/arm/mach-at91/soc.h @@ -6,6 +6,7 @@ struct at91_init_soc { int builtin; + u32 extern_irq; unsigned int *default_irq_priority; void (*map_io)(void); void (*ioremap_registers)(void); From a008dad702a55b27720760ab0f8a129dde49fb6e Mon Sep 17 00:00:00 2001 From: Daniel Lezcano Date: Fri, 21 Jun 2013 14:36:59 +0200 Subject: [PATCH 2/6] ARM: at91: cpuidle: Fix target_residency The following commit: commit 7e348b9012522fa0efd854d20d210d5e57fcedd1 Author: Robert Lee Date: Tue Mar 20 15:22:43 2012 -0500 ARM: at91: Consolidate time keeping and irq enable Enable core cpuidle timekeeping and irq enabling and remove that handling from this code. introduced an additional zero to the state1 (suspend) target residency. With a periodic tick, the cpu never enters the state1 with both 10000 and 100000. With a tickless system, it enters to state1 much more often with the initial value, roughly x7 more. Fix it by setting the value to 10ms again. Signed-off-by: Daniel Lezcano [nicola.ferre@atmel.com: add precisions given by Daniel to commit message] Signed-off-by: Nicolas Ferre --- arch/arm/mach-at91/cpuidle.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-at91/cpuidle.c b/arch/arm/mach-at91/cpuidle.c index 69f9e3bbf4e5..4ec6a6d9b9be 100644 --- a/arch/arm/mach-at91/cpuidle.c +++ b/arch/arm/mach-at91/cpuidle.c @@ -51,7 +51,7 @@ static struct cpuidle_driver at91_idle_driver = { .states[1] = { .enter = at91_enter_idle, .exit_latency = 10, - .target_residency = 100000, + .target_residency = 10000, .flags = CPUIDLE_FLAG_TIME_VALID, .name = "RAM_SR", .desc = "WFI and DDR Self Refresh", From ed4a2af5fcfe0d324aaceffdaa9ea2f08f7ef2c6 Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Mon, 24 Jun 2013 10:20:55 +0200 Subject: [PATCH 3/6] ARM: at91/PMC: sama5d3 family doesn't have a PLLB Signed-off-by: Nicolas Ferre Acked-by: Ludovic Desroches --- arch/arm/mach-at91/clock.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c index da841885d01c..085a79dfaf76 100644 --- a/arch/arm/mach-at91/clock.c +++ b/arch/arm/mach-at91/clock.c @@ -75,7 +75,8 @@ EXPORT_SYMBOL_GPL(at91_pmc_base); #define cpu_has_pllb() (!(cpu_is_at91sam9rl() \ || cpu_is_at91sam9g45() \ || cpu_is_at91sam9x5() \ - || cpu_is_at91sam9n12())) + || cpu_is_at91sam9n12() \ + || cpu_is_sama5d3())) #define cpu_has_upll() (cpu_is_at91sam9g45() \ || cpu_is_at91sam9x5() \ From 7319ee0495b7a0c7aee69beb580cd293d5e21ef4 Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Mon, 24 Jun 2013 10:21:40 +0200 Subject: [PATCH 4/6] ARM: at91/PMC: at91sam9n12 family has a PLLB Signed-off-by: Nicolas Ferre Acked-by: Bo Shen --- arch/arm/mach-at91/clock.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c index 085a79dfaf76..978de42e041a 100644 --- a/arch/arm/mach-at91/clock.c +++ b/arch/arm/mach-at91/clock.c @@ -75,7 +75,6 @@ EXPORT_SYMBOL_GPL(at91_pmc_base); #define cpu_has_pllb() (!(cpu_is_at91sam9rl() \ || cpu_is_at91sam9g45() \ || cpu_is_at91sam9x5() \ - || cpu_is_at91sam9n12() \ || cpu_is_sama5d3())) #define cpu_has_upll() (cpu_is_at91sam9g45() \ From d04e5b694e996e7cbbe3748924a259a647c3456d Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Mon, 24 Jun 2013 18:07:34 +0200 Subject: [PATCH 5/6] ARM: at91/PMC: fix at91sam9n12 USB FS init at91sam9n12 has Full-speed only USB. So we should add it to the list in at91_pllb_usbfs_clock_init() function. Moreover, at91sam9n12 has an unusual PMC in the sense that it has a PLLB but also has a USB clock register. Signed-off-by: Nicolas Ferre Tested-by: Bo Shen --- arch/arm/mach-at91/clock.c | 25 ++++++++++++++++++---- arch/arm/mach-at91/include/mach/at91_pmc.h | 3 +++ 2 files changed, 24 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c index 978de42e041a..661111fd76ac 100644 --- a/arch/arm/mach-at91/clock.c +++ b/arch/arm/mach-at91/clock.c @@ -489,7 +489,7 @@ static int at91_clk_show(struct seq_file *s, void *unused) seq_printf(s, "UCKR = %8x\n", uckr); } seq_printf(s, "MCKR = %8x\n", at91_pmc_read(AT91_PMC_MCKR)); - if (cpu_has_upll()) + if (cpu_has_upll() || cpu_is_at91sam9n12()) seq_printf(s, "USB = %8x\n", at91_pmc_read(AT91_PMC_USB)); seq_printf(s, "SR = %8x\n", sr); @@ -614,6 +614,8 @@ static u32 __init at91_usb_rate(struct clk *pll, u32 freq, u32 reg) { if (pll == &pllb && (reg & AT91_PMC_USB96M)) return freq / 2; + else if (pll == &utmi_clk || cpu_is_at91sam9n12()) + return freq / (1 + ((reg & AT91_PMC_OHCIUSBDIV) >> 8)); else return freq; } @@ -683,6 +685,8 @@ static struct clk *const standard_pmc_clocks[] __initconst = { /* PLLB generated USB full speed clock init */ static void __init at91_pllb_usbfs_clock_init(unsigned long main_clock) { + unsigned int reg; + /* * USB clock init: choose 48 MHz PLLB value, * disable 48MHz clock during usb peripheral suspend. @@ -691,22 +695,35 @@ static void __init at91_pllb_usbfs_clock_init(unsigned long main_clock) */ uhpck.parent = &pllb; - at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) | AT91_PMC_USB96M; + reg = at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2); pllb.rate_hz = at91_pll_rate(&pllb, main_clock, at91_pllb_usb_init); if (cpu_is_at91rm9200()) { + reg = at91_pllb_usb_init |= AT91_PMC_USB96M; uhpck.pmc_mask = AT91RM9200_PMC_UHP; udpck.pmc_mask = AT91RM9200_PMC_UDP; at91_pmc_write(AT91_PMC_SCER, AT91RM9200_PMC_MCKUDP); } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || cpu_is_at91sam9263() || cpu_is_at91sam9g20() || cpu_is_at91sam9g10()) { + reg = at91_pllb_usb_init |= AT91_PMC_USB96M; + uhpck.pmc_mask = AT91SAM926x_PMC_UHP; + udpck.pmc_mask = AT91SAM926x_PMC_UDP; + } else if (cpu_is_at91sam9n12()) { + /* Divider for USB clock is in USB clock register for 9n12 */ + reg = AT91_PMC_USBS_PLLB; + + /* For PLLB output 96M, set usb divider 2 (USBDIV + 1) */ + reg |= AT91_PMC_OHCIUSBDIV_2; + at91_pmc_write(AT91_PMC_USB, reg); + + /* Still setup masks */ uhpck.pmc_mask = AT91SAM926x_PMC_UHP; udpck.pmc_mask = AT91SAM926x_PMC_UDP; } at91_pmc_write(AT91_CKGR_PLLBR, 0); - udpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init); - uhpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init); + udpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, reg); + uhpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, reg); } /* UPLL generated USB full speed clock init */ diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h index 2bd7f51b0b82..c604cc69acb5 100644 --- a/arch/arm/mach-at91/include/mach/at91_pmc.h +++ b/arch/arm/mach-at91/include/mach/at91_pmc.h @@ -130,7 +130,10 @@ extern void __iomem *at91_pmc_base; #define AT91_PMC_USBS (0x1 << 0) /* USB OHCI Input clock selection */ #define AT91_PMC_USBS_PLLA (0 << 0) #define AT91_PMC_USBS_UPLL (1 << 0) +#define AT91_PMC_USBS_PLLB (1 << 0) /* [AT91SAMN12 only] */ #define AT91_PMC_OHCIUSBDIV (0xF << 8) /* Divider for USB OHCI Clock */ +#define AT91_PMC_OHCIUSBDIV_1 (0x0 << 8) +#define AT91_PMC_OHCIUSBDIV_2 (0x1 << 8) #define AT91_PMC_SMD 0x3c /* Soft Modem Clock Register [some SAM9 only] */ #define AT91_PMC_SMDS (0x1 << 0) /* SMD input clock selection */ From bd2da9ca138e446824a7542b381aed442fef4caa Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Mon, 24 Jun 2013 18:09:25 +0200 Subject: [PATCH 6/6] ARM: at91/PMC: use at91_usb_rate() for UTMI PLL We are using this function, now that we have introduced the support for UTMI clock for computing the USB host rate. Signed-off-by: Nicolas Ferre Tested-by: Bo Shen --- arch/arm/mach-at91/clock.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c index 661111fd76ac..6b2630a92f71 100644 --- a/arch/arm/mach-at91/clock.c +++ b/arch/arm/mach-at91/clock.c @@ -742,8 +742,7 @@ static void __init at91_upll_usbfs_clock_init(unsigned long main_clock) /* Now set uhpck values */ uhpck.parent = &utmi_clk; uhpck.pmc_mask = AT91SAM926x_PMC_UHP; - uhpck.rate_hz = utmi_clk.rate_hz; - uhpck.rate_hz /= 1 + ((at91_pmc_read(AT91_PMC_USB) & AT91_PMC_OHCIUSBDIV) >> 8); + uhpck.rate_hz = at91_usb_rate(&utmi_clk, utmi_clk.rate_hz, usbr); } static int __init at91_pmc_init(unsigned long main_clock)