s390/pci: add s390_iommu_aperture kernel parameter
Some applications map the same memory area for DMA multiple times while also mapping significant amounts of memory. With our current DMA code these applications will run out of DMA addresses after mapping half of the available memory because the number of DMA mappings is constrained by the number of concurrently active DMA addresses we support which in turn is limited by the minimum of hardware constraints and high_memory. Limiting the number of active DMA addresses to high_memory is only a heuristic to save memory used by the iommu_bitmap and DMA page tables however. This was added under the assumption that it rarely makes sense to DMA map more than system memory. To accommodate special applications which insist on double mapping, which works on other platforms, allow specifying a factor of how many times installed memory is available as DMA address space. Use 0 as a special value to apply no constraints beyond what hardware dictates at the expense of significantly more memory use. Reviewed-by: Matthew Rosato <mjrosato@linux.ibm.com> Reviewed-by: Pierre Morel <pmorel@linux.ibm.com> Signed-off-by: Niklas Schnelle <schnelle@linux.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
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@ -4982,6 +4982,18 @@
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an IOTLB flush. Default is lazy flushing before reuse,
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which is faster.
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s390_iommu_aperture= [KNL,S390]
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Specifies the size of the per device DMA address space
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accessible through the DMA and IOMMU APIs as a decimal
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factor of the size of main memory.
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The default is 1 meaning that one can concurrently use
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as many DMA addresses as physical memory is installed,
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if supported by hardware, and thus map all of memory
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once. With a value of 2 one can map all of memory twice
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and so on. As a special case a factor of 0 imposes no
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restrictions other than those given by hardware at the
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cost of significant additional memory use for tables.
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sa1100ir [NET]
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See drivers/net/irda/sa1100_ir.c.
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@ -18,6 +18,8 @@
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static struct kmem_cache *dma_region_table_cache;
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static struct kmem_cache *dma_page_table_cache;
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static int s390_iommu_strict;
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static u64 s390_iommu_aperture;
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static u32 s390_iommu_aperture_factor = 1;
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static int zpci_refresh_global(struct zpci_dev *zdev)
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{
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@ -565,15 +567,19 @@ int zpci_dma_init_device(struct zpci_dev *zdev)
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/*
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* Restrict the iommu bitmap size to the minimum of the following:
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* - main memory size
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* - s390_iommu_aperture which defaults to high_memory
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* - 3-level pagetable address limit minus start_dma offset
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* - DMA address range allowed by the hardware (clp query pci fn)
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*
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* Also set zdev->end_dma to the actual end address of the usable
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* range, instead of the theoretical maximum as reported by hardware.
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*
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* This limits the number of concurrently usable DMA mappings since
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* for each DMA mapped memory address we need a DMA address including
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* extra DMA addresses for multiple mappings of the same memory address.
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*/
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zdev->start_dma = PAGE_ALIGN(zdev->start_dma);
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zdev->iommu_size = min3((u64) high_memory,
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zdev->iommu_size = min3(s390_iommu_aperture,
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ZPCI_TABLE_SIZE_RT - zdev->start_dma,
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zdev->end_dma - zdev->start_dma + 1);
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zdev->end_dma = zdev->start_dma + zdev->iommu_size - 1;
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@ -660,6 +666,12 @@ static int __init dma_alloc_cpu_table_caches(void)
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int __init zpci_dma_init(void)
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{
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s390_iommu_aperture = (u64)high_memory;
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if (!s390_iommu_aperture_factor)
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s390_iommu_aperture = ULONG_MAX;
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else
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s390_iommu_aperture *= s390_iommu_aperture_factor;
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return dma_alloc_cpu_table_caches();
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}
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@ -692,3 +704,12 @@ static int __init s390_iommu_setup(char *str)
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}
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__setup("s390_iommu=", s390_iommu_setup);
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static int __init s390_iommu_aperture_setup(char *str)
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{
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if (kstrtou32(str, 10, &s390_iommu_aperture_factor))
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s390_iommu_aperture_factor = 1;
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return 1;
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}
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__setup("s390_iommu_aperture=", s390_iommu_aperture_setup);
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