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ARM: meson: enable L2 cache 

This enables the L2 cache controller available in Amlogic SoCs.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Carlo Caione <carlo@caione.org>
This commit is contained in:
Beniamino Galvani 2014-11-18 15:25:41 +01:00 committed by Carlo Caione
parent a25a6772db
commit 6a4ccd9a8e
2 changed files with 3 additions and 0 deletions
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1
arch/arm/mach-meson/Kconfig
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@ -2,6 +2,7 @@ menuconfig ARCH_MESON
bool "Amlogic Meson SoCs" if ARCH_MULTI_V7
select GENERIC_IRQ_CHIP
select ARM_GIC
select CACHE_L2X0
if ARCH_MESON

2
arch/arm/mach-meson/meson.c
View File

@ -24,4 +24,6 @@ static const char * const meson_common_board_compat[] = {
DT_MACHINE_START(MESON, "Amlogic Meson platform")
.dt_compat = meson_common_board_compat,
.l2c_aux_val = 0,
.l2c_aux_mask = ~0,
MACHINE_END