drm/radeon/kms: support for audio on Evergreen
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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@ -3069,6 +3069,12 @@ static int evergreen_startup(struct radeon_device *rdev)
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if (r)
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if (r)
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return r;
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return r;
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r = r600_audio_init(rdev);
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if (r) {
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DRM_ERROR("radeon: audio init failed\n");
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return r;
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}
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return 0;
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return 0;
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}
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}
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@ -3100,12 +3106,19 @@ int evergreen_resume(struct radeon_device *rdev)
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return r;
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return r;
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}
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}
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r = r600_audio_init(rdev);
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if (r) {
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DRM_ERROR("radeon: audio resume failed\n");
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return r;
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}
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return r;
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return r;
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}
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}
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int evergreen_suspend(struct radeon_device *rdev)
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int evergreen_suspend(struct radeon_device *rdev)
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{
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{
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r600_audio_fini(rdev);
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/* FIXME: we should wait for ring to be empty */
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/* FIXME: we should wait for ring to be empty */
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r700_cp_stop(rdev);
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r700_cp_stop(rdev);
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rdev->cp.ready = false;
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rdev->cp.ready = false;
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@ -3225,6 +3238,7 @@ int evergreen_init(struct radeon_device *rdev)
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void evergreen_fini(struct radeon_device *rdev)
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void evergreen_fini(struct radeon_device *rdev)
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{
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{
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r600_audio_fini(rdev);
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r600_blit_fini(rdev);
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r600_blit_fini(rdev);
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r700_cp_fini(rdev);
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r700_cp_fini(rdev);
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r600_irq_fini(rdev);
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r600_irq_fini(rdev);
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@ -35,6 +35,14 @@
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#define EVERGREEN_P1PLL_SS_CNTL 0x414
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#define EVERGREEN_P1PLL_SS_CNTL 0x414
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#define EVERGREEN_P2PLL_SS_CNTL 0x454
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#define EVERGREEN_P2PLL_SS_CNTL 0x454
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# define EVERGREEN_PxPLL_SS_EN (1 << 12)
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# define EVERGREEN_PxPLL_SS_EN (1 << 12)
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#define EVERGREEN_AUDIO_PLL1_MUL 0x5b0
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#define EVERGREEN_AUDIO_PLL1_DIV 0x5b4
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#define EVERGREEN_AUDIO_PLL1_UNK 0x5bc
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#define EVERGREEN_AUDIO_ENABLE 0x5e78
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#define EVERGREEN_AUDIO_VENDOR_ID 0x5ec0
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/* GRPH blocks at 0x6800, 0x7400, 0x10000, 0x10c00, 0x11800, 0x12400 */
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/* GRPH blocks at 0x6800, 0x7400, 0x10000, 0x10c00, 0x11800, 0x12400 */
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#define EVERGREEN_GRPH_ENABLE 0x6800
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#define EVERGREEN_GRPH_ENABLE 0x6800
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#define EVERGREEN_GRPH_CONTROL 0x6804
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#define EVERGREEN_GRPH_CONTROL 0x6804
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@ -36,7 +36,7 @@
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*/
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*/
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static int r600_audio_chipset_supported(struct radeon_device *rdev)
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static int r600_audio_chipset_supported(struct radeon_device *rdev)
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{
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{
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return (rdev->family >= CHIP_R600 && !ASIC_IS_DCE4(rdev))
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return (rdev->family >= CHIP_R600 && !ASIC_IS_DCE5(rdev))
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|| rdev->family == CHIP_RS600
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|| rdev->family == CHIP_RS600
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|| rdev->family == CHIP_RS690
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|| rdev->family == CHIP_RS690
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|| rdev->family == CHIP_RS740;
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|| rdev->family == CHIP_RS740;
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@ -161,8 +161,18 @@ static void r600_audio_update_hdmi(unsigned long param)
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*/
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*/
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static void r600_audio_engine_enable(struct radeon_device *rdev, bool enable)
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static void r600_audio_engine_enable(struct radeon_device *rdev, bool enable)
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{
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{
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u32 value = 0;
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DRM_INFO("%s audio support\n", enable ? "Enabling" : "Disabling");
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DRM_INFO("%s audio support\n", enable ? "Enabling" : "Disabling");
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WREG32_P(R600_AUDIO_ENABLE, enable ? 0x81000000 : 0x0, ~0x81000000);
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if (ASIC_IS_DCE4(rdev)) {
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if (enable) {
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value |= 0x81000000; /* Required to enable audio */
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value |= 0x0e1000f0; /* fglrx sets that too */
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}
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WREG32(EVERGREEN_AUDIO_ENABLE, value);
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} else {
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WREG32_P(R600_AUDIO_ENABLE,
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enable ? 0x81000000 : 0x0, ~0x81000000);
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}
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rdev->audio_enabled = enable;
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rdev->audio_enabled = enable;
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}
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}
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@ -249,7 +259,13 @@ void r600_audio_set_clock(struct drm_encoder *encoder, int clock)
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}
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}
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if (ASIC_IS_DCE4(rdev)) {
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if (ASIC_IS_DCE4(rdev)) {
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/* TODO */
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/* TODO: other PLLs? */
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WREG32(EVERGREEN_AUDIO_PLL1_MUL, base_rate * 10);
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WREG32(EVERGREEN_AUDIO_PLL1_DIV, clock * 10);
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WREG32(EVERGREEN_AUDIO_PLL1_UNK, 0x00000071);
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/* Some magic trigger or src sel? */
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WREG32_P(0x5ac, 0x01, ~0x77);
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} else {
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} else {
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switch (dig->dig_encoder) {
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switch (dig->dig_encoder) {
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case 0:
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case 0:
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