iommu/arm-smmu: Remove ACPICA workarounds
Now that the kernel headers have synced with the relevant upstream ACPICA updates, it's time to clean up the temporary local definitions. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
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@ -413,15 +413,6 @@
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#define MSI_IOVA_BASE 0x8000000
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#define MSI_IOVA_LENGTH 0x100000
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/* Until ACPICA headers cover IORT rev. C */
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#ifndef ACPI_IORT_SMMU_HISILICON_HI161X
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#define ACPI_IORT_SMMU_HISILICON_HI161X 0x1
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#endif
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#ifndef ACPI_IORT_SMMU_V3_CAVIUM_CN99XX
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#define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x2
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#endif
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static bool disable_bypass;
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module_param_named(disable_bypass, disable_bypass, bool, S_IRUGO);
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MODULE_PARM_DESC(disable_bypass,
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@ -2665,7 +2656,7 @@ static void acpi_smmu_get_options(u32 model, struct arm_smmu_device *smmu)
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case ACPI_IORT_SMMU_V3_CAVIUM_CN99XX:
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smmu->options |= ARM_SMMU_OPT_PAGE0_REGS_ONLY;
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break;
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case ACPI_IORT_SMMU_HISILICON_HI161X:
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case ACPI_IORT_SMMU_V3_HISILICON_HI161X:
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smmu->options |= ARM_SMMU_OPT_SKIP_PREFETCH;
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break;
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}
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@ -119,14 +119,6 @@ enum arm_smmu_implementation {
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CAVIUM_SMMUV2,
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};
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/* Until ACPICA headers cover IORT rev. C */
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#ifndef ACPI_IORT_SMMU_CORELINK_MMU401
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#define ACPI_IORT_SMMU_CORELINK_MMU401 0x4
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#endif
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#ifndef ACPI_IORT_SMMU_CAVIUM_THUNDERX
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#define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x5
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#endif
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struct arm_smmu_s2cr {
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struct iommu_group *group;
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int count;
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