[POWERPC] fsl_msi: few (mostly cosmetic) fixes
This patch fixes few cosmetic issues, also removes unused function, makes some functions static and reduces #ifdef count. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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@ -36,12 +36,6 @@ static inline u32 fsl_msi_read(u32 __iomem *base, unsigned int reg)
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return in_be32(base + (reg >> 2));
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}
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static inline void fsl_msi_write(u32 __iomem *base,
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unsigned int reg, u32 value)
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{
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out_be32(base + (reg >> 2), value);
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}
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/*
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* We do not need this actually. The MSIR register has been read once
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* in the cascade interrupt. So, this MSI interrupt has been acked
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@ -64,7 +58,7 @@ static int fsl_msi_host_map(struct irq_host *h, unsigned int virq,
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get_irq_desc(virq)->status |= IRQ_TYPE_EDGE_FALLING;
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set_irq_chip_and_handler(virq, chip, handle_edge_irq);
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set_irq_chip_and_handler(virq, chip, handle_edge_irq);
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return 0;
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}
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@ -73,10 +67,11 @@ static struct irq_host_ops fsl_msi_host_ops = {
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.map = fsl_msi_host_map,
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};
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irq_hw_number_t fsl_msi_alloc_hwirqs(struct fsl_msi *msi, int num)
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static irq_hw_number_t fsl_msi_alloc_hwirqs(struct fsl_msi *msi, int num)
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{
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unsigned long flags;
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int offset, order = get_count_order(num);
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int order = get_count_order(num);
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int offset;
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spin_lock_irqsave(&msi->bitmap_lock, flags);
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@ -91,7 +86,7 @@ irq_hw_number_t fsl_msi_alloc_hwirqs(struct fsl_msi *msi, int num)
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return offset;
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}
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void fsl_msi_free_hwirqs(struct fsl_msi *msi, int offset, int num)
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static void fsl_msi_free_hwirqs(struct fsl_msi *msi, int offset, int num)
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{
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unsigned long flags;
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int order = get_count_order(num);
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@ -106,7 +101,8 @@ void fsl_msi_free_hwirqs(struct fsl_msi *msi, int offset, int num)
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static int fsl_msi_free_dt_hwirqs(struct fsl_msi *msi)
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{
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int i, len;
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int i;
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int len;
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const u32 *p;
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bitmap_allocate_region(msi->fsl_msi_bitmap, 0,
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@ -138,9 +134,8 @@ static int fsl_msi_free_dt_hwirqs(struct fsl_msi *msi)
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static int fsl_msi_init_allocator(struct fsl_msi *msi_data)
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{
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int rc, size;
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size = BITS_TO_LONGS(NR_MSI_IRQS) * sizeof(u32);
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int rc;
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int size = BITS_TO_LONGS(NR_MSI_IRQS) * sizeof(u32);
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msi_data->fsl_msi_bitmap = kzalloc(size, GFP_KERNEL);
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@ -238,7 +233,7 @@ out_free:
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return rc;
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}
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void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
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static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
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{
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unsigned int cascade_irq;
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struct fsl_msi *msi_data = fsl_msi;
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@ -260,7 +255,7 @@ void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
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if (unlikely(desc->status & IRQ_INPROGRESS))
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goto unlock;
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msir_index = (int)(desc->handler_data);
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msir_index = (int)desc->handler_data;
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if (msir_index >= NR_MSI_REG)
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cascade_irq = NO_IRQ;
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@ -280,12 +275,12 @@ void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
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intr_index = ffs(msir_value) - 1;
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cascade_irq = irq_linear_revmap(msi_data->irqhost,
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(msir_index * IRQS_PER_MSI_REG +
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intr_index + have_shift));
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msir_index * IRQS_PER_MSI_REG +
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intr_index + have_shift);
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if (cascade_irq != NO_IRQ)
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generic_handle_irq(cascade_irq);
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have_shift += (intr_index + 1);
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msir_value = (msir_value >> (intr_index + 1));
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have_shift += intr_index + 1;
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msir_value = msir_value >> (intr_index + 1);
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}
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desc->status &= ~IRQ_INPROGRESS;
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@ -311,7 +306,7 @@ static int __devinit fsl_of_msi_probe(struct of_device *dev,
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int rc;
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int virt_msir;
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const u32 *p;
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struct fsl_msi_feature *tmp_data;
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struct fsl_msi_feature *features = match->data;
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printk(KERN_DEBUG "Setting up Freescale MSI support\n");
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@ -348,14 +343,12 @@ static int __devinit fsl_of_msi_probe(struct of_device *dev,
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goto error_out;
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}
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tmp_data = (struct fsl_msi_feature *)match->data;
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msi->feature = tmp_data->fsl_pic_ip;
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msi->feature = features->fsl_pic_ip;
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msi->irqhost->host_data = msi;
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msi->msi_addr_hi = 0x0;
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msi->msi_addr_lo = res.start + tmp_data->msiir_offset;
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msi->msi_addr_lo = res.start + features->msiir_offset;
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rc = fsl_msi_init_allocator(msi);
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if (rc) {
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@ -106,15 +106,15 @@ void __init setup_pci_cmd(struct pci_controller *hose)
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}
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}
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#ifdef CONFIG_PCI_MSI
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void __init setup_pci_pcsrbar(struct pci_controller *hose)
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static void __init setup_pci_pcsrbar(struct pci_controller *hose)
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{
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#ifdef CONFIG_PCI_MSI
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phys_addr_t immr_base;
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immr_base = get_immrbase();
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early_write_config_dword(hose, 0, 0, PCI_BASE_ADDRESS_0, immr_base);
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}
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#endif
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}
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static int fsl_pcie_bus_fixup;
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@ -222,9 +222,7 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary)
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setup_pci_atmu(hose, &rsrc);
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/* Setup PEXCSRBAR */
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#ifdef CONFIG_PCI_MSI
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setup_pci_pcsrbar(hose);
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#endif
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return 0;
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}
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