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e1000e: Add Support for 38.4MHZ frequency 

Add support for 38.4MHz frequency is required for PTP
on CannonLake. SYSTIM frequency adjustment attributes for TIMINCA are
get/set dependent on the hardware clock frequency for a different
types of adapters. 38.4MHz frequency supported by CannonLake
and active once time synchronisation mechanism was enabled
Changed abbreviation from Hz to HZ to be compliant checkpatch code style

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Reviewed-by: Raanan Avargil <raanan.avargil@intel.com>
Reviewed-by: Dima Ruinskiy <dima.ruinskiy@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
Sasha Neftin 2017-04-06 10:27:03 +03:00 committed by Jeff Kirsher
parent c8744f44ae
commit 68fe1d5da5
2 changed files with 46 additions and 27 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

24
drivers/net/ethernet/intel/e1000e/e1000.h
View File

@ -379,18 +379,22 @@ s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca);
* INCVALUE_n into the TIMINCA register allowing 32+8+(24-INCVALUE_SHIFT_n) * INCVALUE_n into the TIMINCA register allowing 32+8+(24-INCVALUE_SHIFT_n)
* bits to count nanoseconds leaving the rest for fractional nonseconds. * bits to count nanoseconds leaving the rest for fractional nonseconds.
*/ */
#define INCVALUE_96MHz 125 #define INCVALUE_96MHZ 125
#define INCVALUE_SHIFT_96MHz 17 #define INCVALUE_SHIFT_96MHZ 17
#define INCPERIOD_SHIFT_96MHz 2 #define INCPERIOD_SHIFT_96MHZ 2
#define INCPERIOD_96MHz (12 >> INCPERIOD_SHIFT_96MHz) #define INCPERIOD_96MHZ (12 >> INCPERIOD_SHIFT_96MHZ)
#define INCVALUE_25MHz 40 #define INCVALUE_25MHZ 40
#define INCVALUE_SHIFT_25MHz 18 #define INCVALUE_SHIFT_25MHZ 18
#define INCPERIOD_25MHz 1 #define INCPERIOD_25MHZ 1
#define INCVALUE_24MHz 125 #define INCVALUE_24MHZ 125
#define INCVALUE_SHIFT_24MHz 14 #define INCVALUE_SHIFT_24MHZ 14
#define INCPERIOD_24MHz 3 #define INCPERIOD_24MHZ 3
#define INCVALUE_38400KHZ 26
#define INCVALUE_SHIFT_38400KHZ 19
#define INCPERIOD_38400KHZ 1
/* Another drawback of scaling the incvalue by a large factor is the /* Another drawback of scaling the incvalue by a large factor is the
* 64-bit SYSTIM register overflows more quickly. This is dealt with * 64-bit SYSTIM register overflows more quickly. This is dealt with

49
drivers/net/ethernet/intel/e1000e/netdev.c
View File

@ -3509,42 +3509,57 @@ s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
switch (hw->mac.type) { switch (hw->mac.type) {
case e1000_pch2lan: case e1000_pch2lan:
/* Stable 96MHz frequency */ /* Stable 96MHz frequency */
incperiod = INCPERIOD_96MHz; incperiod = INCPERIOD_96MHZ;
incvalue = INCVALUE_96MHz; incvalue = INCVALUE_96MHZ;
shift = INCVALUE_SHIFT_96MHz; shift = INCVALUE_SHIFT_96MHZ;
adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHz; adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;
break; break;
case e1000_pch_lpt: case e1000_pch_lpt:
if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) { if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
/* Stable 96MHz frequency */ /* Stable 96MHz frequency */
incperiod = INCPERIOD_96MHz; incperiod = INCPERIOD_96MHZ;
incvalue = INCVALUE_96MHz; incvalue = INCVALUE_96MHZ;
shift = INCVALUE_SHIFT_96MHz; shift = INCVALUE_SHIFT_96MHZ;
adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHz; adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;
} else { } else {
/* Stable 25MHz frequency */ /* Stable 25MHz frequency */
incperiod = INCPERIOD_25MHz; incperiod = INCPERIOD_25MHZ;
incvalue = INCVALUE_25MHz; incvalue = INCVALUE_25MHZ;
shift = INCVALUE_SHIFT_25MHz; shift = INCVALUE_SHIFT_25MHZ;
adapter->cc.shift = shift; adapter->cc.shift = shift;
} }
break; break;
case e1000_pch_spt: case e1000_pch_spt:
if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) { if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
/* Stable 24MHz frequency */ /* Stable 24MHz frequency */
incperiod = INCPERIOD_24MHz; incperiod = INCPERIOD_24MHZ;
incvalue = INCVALUE_24MHz; incvalue = INCVALUE_24MHZ;
shift = INCVALUE_SHIFT_24MHz; shift = INCVALUE_SHIFT_24MHZ;
adapter->cc.shift = shift; adapter->cc.shift = shift;
break; break;
} }
return -EINVAL; return -EINVAL;
case e1000_pch_cnp:
if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
/* Stable 24MHz frequency */
incperiod = INCPERIOD_24MHZ;
incvalue = INCVALUE_24MHZ;
shift = INCVALUE_SHIFT_24MHZ;
adapter->cc.shift = shift;
} else {
/* Stable 38400KHz frequency */
incperiod = INCPERIOD_38400KHZ;
incvalue = INCVALUE_38400KHZ;
shift = INCVALUE_SHIFT_38400KHZ;
adapter->cc.shift = shift;
}
break;
case e1000_82574: case e1000_82574:
case e1000_82583: case e1000_82583:
/* Stable 25MHz frequency */ /* Stable 25MHz frequency */
incperiod = INCPERIOD_25MHz; incperiod = INCPERIOD_25MHZ;
incvalue = INCVALUE_25MHz; incvalue = INCVALUE_25MHZ;
shift = INCVALUE_SHIFT_25MHz; shift = INCVALUE_SHIFT_25MHZ;
adapter->cc.shift = shift; adapter->cc.shift = shift;
break; break;
default: default: