hollalinux
/
linux-sg2042
mirror of https://github.com/sophgo/linux-riscv.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Merge branch 'next/cleanup-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup 

From Kukjin Kim:
"Mostly it is using common macro to define resources and clean up useless codes."

* 'next/cleanup-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (34 commits)
  ARM: S3C24XX: Use common macro to define resources on mach-qt2410.c
  ARM: S3C24XX: Use common macro to define resources on mach-osiris.c
  ARM: EXYNOS: Adapt to cpuidle core time keeping and irq enable
  ARM: S5PV210: Use common macro to define resources on mach-smdkv210.c
  ARM: S5PV210: Use common macro to define resources on dev-audio.c
  ARM: S5PC100: Use common macro to define resources on dev-audio.c
  ARM: S5P64X0: Use common macro to define resources on dev-audio.c
  ARM: S3C64XX: Use common macro to define resources on mach-smdk6410.c
  ARM: S3C64XX: Use common macro to define resources on mach-real6410.c
  ARM: S3C64XX: Use common macro to define resources on mach-mini6410.c
  ARM: S3C64XX: Use common macro to define resources on mach-crag6410.c
  ARM: S3C64XX: Use common macro to define resources on mach-anw6410.c
  ARM: S3C64XX: Use common macro to define resources on dev-uart.c
  ARM: S3C64XX: Use common macro to define resources on dev-audio.c
  ARM: S3C24XX: Use common macro to define resources on simtec-nor.c
  ARM: S3C24XX: Use common macro to define resources on mach-vr1000.c
  ARM: S3C24XX: Use common macro to define resources on mach-tct_hammer.c
  ARM: S3C24XX: Use common macro to define resources on mach-rx1950.c
  ARM: S3C24XX: Use common macro to define resources on mach-otom.c
  ARM: S3C24XX: Use common macro to define resources on mach-nexcoder.c
  ...
This commit is contained in:
Olof Johansson 2012-05-12 22:17:15 -07:00
parent 243e095446 2870f53524
commit 68f4c319d6
39 changed files with 214 additions and 1026 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

53
arch/arm/mach-exynos/cpuidle.c
View File

@ -20,6 +20,7 @@
#include <asm/smp_scu.h>
#include <asm/suspend.h>
#include <asm/unified.h>
#include <asm/cpuidle.h>
#include <mach/regs-pmu.h>
#include <mach/pmu.h>
@ -34,22 +35,12 @@
#define S5P_CHECK_AFTR 0xFCBA0D10
static int exynos4_enter_idle(struct cpuidle_device *dev,
struct cpuidle_driver *drv,
int index);
static int exynos4_enter_lowpower(struct cpuidle_device *dev,
struct cpuidle_driver *drv,
int index);
static struct cpuidle_state exynos4_cpuidle_set[] __initdata = {
[0] = {
.enter = exynos4_enter_idle,
.exit_latency = 1,
.target_residency = 100000,
.flags = CPUIDLE_FLAG_TIME_VALID,
.name = "C0",
.desc = "ARM clock gating(WFI)",
},
[0] = ARM_CPUIDLE_WFI_STATE,
[1] = {
.enter = exynos4_enter_lowpower,
.exit_latency = 300,
@ -63,8 +54,9 @@ static struct cpuidle_state exynos4_cpuidle_set[] __initdata = {
static DEFINE_PER_CPU(struct cpuidle_device, exynos4_cpuidle_device);
static struct cpuidle_driver exynos4_idle_driver = {
.name = "exynos4_idle",
.owner = THIS_MODULE,
.name = "exynos4_idle",
.owner = THIS_MODULE,
.en_core_tk_irqen = 1,
};
/* Ext-GIC nIRQ/nFIQ is the only wakeup source in AFTR */
@ -103,13 +95,8 @@ static int exynos4_enter_core0_aftr(struct cpuidle_device *dev,
struct cpuidle_driver *drv,
int index)
{
struct timeval before, after;
int idle_time;
unsigned long tmp;
local_irq_disable();
do_gettimeofday(&before);
exynos4_set_wakeupmask();
/* Set value of power down register for aftr mode */
@ -150,34 +137,6 @@ static int exynos4_enter_core0_aftr(struct cpuidle_device *dev,
/* Clear wakeup state register */
__raw_writel(0x0, S5P_WAKEUP_STAT);
do_gettimeofday(&after);
local_irq_enable();
idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +
(after.tv_usec - before.tv_usec);
dev->last_residency = idle_time;
return index;
}
static int exynos4_enter_idle(struct cpuidle_device *dev,
struct cpuidle_driver *drv,
int index)
{
struct timeval before, after;
int idle_time;
local_irq_disable();
do_gettimeofday(&before);
cpu_do_idle();
do_gettimeofday(&after);
local_irq_enable();
idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +
(after.tv_usec - before.tv_usec);
dev->last_residency = idle_time;
return index;
}
@ -192,7 +151,7 @@ static int exynos4_enter_lowpower(struct cpuidle_device *dev,
new_index = drv->safe_state_index;
if (new_index == 0)
return exynos4_enter_idle(dev, drv, new_index);
return arm_cpuidle_simple_enter(dev, drv, new_index);
else
return exynos4_enter_core0_aftr(dev, drv, new_index);
}

12
arch/arm/mach-exynos/dev-ahci.c
View File

@ -236,16 +236,8 @@ static struct ahci_platform_data exynos4_ahci_pdata = {
};
static struct resource exynos4_ahci_resource[] = {
[0] = {
.start = EXYNOS4_PA_SATA,
.end = EXYNOS4_PA_SATA + SZ_64K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = EXYNOS4_IRQ_SATA,
.end = EXYNOS4_IRQ_SATA,
.flags = IORESOURCE_IRQ,
},
[0] = DEFINE_RES_MEM(EXYNOS4_PA_SATA, SZ_64K),
[1] = DEFINE_RES_IRQ(EXYNOS4_IRQ_SATA),
};
static u64 exynos4_ahci_dmamask = DMA_BIT_MASK(32);

156
arch/arm/mach-exynos/dev-audio.c
View File

@ -62,26 +62,10 @@ static struct s3c_audio_pdata i2sv5_pdata = {
};
static struct resource exynos4_i2s0_resource[] = {
[0] = {
.start = EXYNOS4_PA_I2S0,
.end = EXYNOS4_PA_I2S0 + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = DMACH_I2S0_TX,
.end = DMACH_I2S0_TX,
.flags = IORESOURCE_DMA,
},
[2] = {
.start = DMACH_I2S0_RX,
.end = DMACH_I2S0_RX,
.flags = IORESOURCE_DMA,
},
[3] = {
.start = DMACH_I2S0S_TX,
.end = DMACH_I2S0S_TX,
.flags = IORESOURCE_DMA,
},
[0] = DEFINE_RES_MEM(EXYNOS4_PA_I2S0, SZ_256),
[1] = DEFINE_RES_DMA(DMACH_I2S0_TX),
[2] = DEFINE_RES_DMA(DMACH_I2S0_RX),
[3] = DEFINE_RES_DMA(DMACH_I2S0S_TX),
};
struct platform_device exynos4_device_i2s0 = {
@ -110,21 +94,9 @@ static struct s3c_audio_pdata i2sv3_pdata = {
};
static struct resource exynos4_i2s1_resource[] = {
[0] = {
.start = EXYNOS4_PA_I2S1,
.end = EXYNOS4_PA_I2S1 + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = DMACH_I2S1_TX,
.end = DMACH_I2S1_TX,
.flags = IORESOURCE_DMA,
},
[2] = {
.start = DMACH_I2S1_RX,
.end = DMACH_I2S1_RX,
.flags = IORESOURCE_DMA,
},
[0] = DEFINE_RES_MEM(EXYNOS4_PA_I2S1, SZ_256),
[1] = DEFINE_RES_DMA(DMACH_I2S1_TX),
[2] = DEFINE_RES_DMA(DMACH_I2S1_RX),
};
struct platform_device exynos4_device_i2s1 = {
@ -138,21 +110,9 @@ struct platform_device exynos4_device_i2s1 = {
};
static struct resource exynos4_i2s2_resource[] = {
[0] = {
.start = EXYNOS4_PA_I2S2,
.end = EXYNOS4_PA_I2S2 + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = DMACH_I2S2_TX,
.end = DMACH_I2S2_TX,
.flags = IORESOURCE_DMA,
},
[2] = {
.start = DMACH_I2S2_RX,
.end = DMACH_I2S2_RX,
.flags = IORESOURCE_DMA,
},
[0] = DEFINE_RES_MEM(EXYNOS4_PA_I2S2, SZ_256),
[1] = DEFINE_RES_DMA(DMACH_I2S2_TX),
[2] = DEFINE_RES_DMA(DMACH_I2S2_RX),
};
struct platform_device exynos4_device_i2s2 = {
@ -192,21 +152,9 @@ static struct s3c_audio_pdata s3c_pcm_pdata = {
};
static struct resource exynos4_pcm0_resource[] = {
[0] = {
.start = EXYNOS4_PA_PCM0,
.end = EXYNOS4_PA_PCM0 + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = DMACH_PCM0_TX,
.end = DMACH_PCM0_TX,
.flags = IORESOURCE_DMA,
},
[2] = {
.start = DMACH_PCM0_RX,
.end = DMACH_PCM0_RX,
.flags = IORESOURCE_DMA,
},
[0] = DEFINE_RES_MEM(EXYNOS4_PA_PCM0, SZ_256),
[1] = DEFINE_RES_DMA(DMACH_PCM0_TX),
[2] = DEFINE_RES_DMA(DMACH_PCM0_RX),
};
struct platform_device exynos4_device_pcm0 = {
@ -220,21 +168,9 @@ struct platform_device exynos4_device_pcm0 = {
};
static struct resource exynos4_pcm1_resource[] = {
[0] = {
.start = EXYNOS4_PA_PCM1,
.end = EXYNOS4_PA_PCM1 + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = DMACH_PCM1_TX,
.end = DMACH_PCM1_TX,
.flags = IORESOURCE_DMA,
},
[2] = {
.start = DMACH_PCM1_RX,
.end = DMACH_PCM1_RX,
.flags = IORESOURCE_DMA,
},
[0] = DEFINE_RES_MEM(EXYNOS4_PA_PCM1, SZ_256),
[1] = DEFINE_RES_DMA(DMACH_PCM1_TX),
[2] = DEFINE_RES_DMA(DMACH_PCM1_RX),
};
struct platform_device exynos4_device_pcm1 = {
@ -248,21 +184,9 @@ struct platform_device exynos4_device_pcm1 = {
};
static struct resource exynos4_pcm2_resource[] = {
[0] = {
.start = EXYNOS4_PA_PCM2,
.end = EXYNOS4_PA_PCM2 + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = DMACH_PCM2_TX,
.end = DMACH_PCM2_TX,
.flags = IORESOURCE_DMA,
},
[2] = {
.start = DMACH_PCM2_RX,
.end = DMACH_PCM2_RX,
.flags = IORESOURCE_DMA,
},
[0] = DEFINE_RES_MEM(EXYNOS4_PA_PCM2, SZ_256),
[1] = DEFINE_RES_DMA(DMACH_PCM2_TX),
[2] = DEFINE_RES_DMA(DMACH_PCM2_RX),
};
struct platform_device exynos4_device_pcm2 = {
@ -283,31 +207,11 @@ static int exynos4_ac97_cfg_gpio(struct platform_device *pdev)
}
static struct resource exynos4_ac97_resource[] = {
[0] = {
.start = EXYNOS4_PA_AC97,
.end = EXYNOS4_PA_AC97 + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = DMACH_AC97_PCMOUT,
.end = DMACH_AC97_PCMOUT,
.flags = IORESOURCE_DMA,
},
[2] = {
.start = DMACH_AC97_PCMIN,
.end = DMACH_AC97_PCMIN,
.flags = IORESOURCE_DMA,
},
[3] = {
.start = DMACH_AC97_MICIN,
.end = DMACH_AC97_MICIN,
.flags = IORESOURCE_DMA,
},
[4] = {
.start = EXYNOS4_IRQ_AC97,
.end = EXYNOS4_IRQ_AC97,
.flags = IORESOURCE_IRQ,
},
[0] = DEFINE_RES_MEM(EXYNOS4_PA_AC97, SZ_256),
[1] = DEFINE_RES_DMA(DMACH_AC97_PCMOUT),
[2] = DEFINE_RES_DMA(DMACH_AC97_PCMIN),
[3] = DEFINE_RES_DMA(DMACH_AC97_MICIN),
[4] = DEFINE_RES_IRQ(EXYNOS4_IRQ_AC97),
};
static struct s3c_audio_pdata s3c_ac97_pdata = {
@ -338,16 +242,8 @@ static int exynos4_spdif_cfg_gpio(struct platform_device *pdev)
}
static struct resource exynos4_spdif_resource[] = {
[0] = {
.start = EXYNOS4_PA_SPDIF,
.end = EXYNOS4_PA_SPDIF + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = DMACH_SPDIF,
.end = DMACH_SPDIF,
.flags = IORESOURCE_DMA,
},
[0] = DEFINE_RES_MEM(EXYNOS4_PA_SPDIF, SZ_256),
[1] = DEFINE_RES_DMA(DMACH_SPDIF),
};
static struct s3c_audio_pdata samsung_spdif_pdata = {

16
arch/arm/mach-exynos/mach-armlex4210.c
View File

@ -77,7 +77,6 @@ static struct s3c2410_uartcfg armlex4210_uartcfgs[] __initdata = {
static struct s3c_sdhci_platdata armlex4210_hsmmc0_pdata __initdata = {
.cd_type = S3C_SDHCI_CD_PERMANENT,
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
#ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
.max_width = 8,
.host_caps = MMC_CAP_8_BIT_DATA,
@ -88,13 +87,11 @@ static struct s3c_sdhci_platdata armlex4210_hsmmc2_pdata __initdata = {
.cd_type = S3C_SDHCI_CD_GPIO,
.ext_cd_gpio = EXYNOS4_GPX2(5),
.ext_cd_gpio_invert = 1,
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
.max_width = 4,
};
static struct s3c_sdhci_platdata armlex4210_hsmmc3_pdata __initdata = {
.cd_type = S3C_SDHCI_CD_PERMANENT,
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
.max_width = 4,
};
@ -121,16 +118,9 @@ static void __init armlex4210_wlan_init(void)
}
static struct resource armlex4210_smsc911x_resources[] = {
[0] = {
.start = EXYNOS4_PA_SROM_BANK(3),
.end = EXYNOS4_PA_SROM_BANK(3) + SZ_64K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_EINT(27),
.end = IRQ_EINT(27),
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_HIGH,
},
[0] = DEFINE_RES_MEM(EXYNOS4_PA_SROM_BANK(3), SZ_64K),
[1] = DEFINE_RES_NAMED(IRQ_EINT(27), 1, NULL, IORESOURCE_IRQ \
| IRQF_TRIGGER_HIGH),
};
static struct smsc911x_platform_config smsc9215_config = {

3
arch/arm/mach-exynos/mach-nuri.c
View File

@ -114,7 +114,6 @@ static struct s3c_sdhci_platdata nuri_hsmmc0_data __initdata = {
MMC_CAP_ERASE),
.host_caps2 = MMC_CAP2_BROKEN_VOLTAGE,
.cd_type = S3C_SDHCI_CD_PERMANENT,
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
};
static struct regulator_consumer_supply emmc_supplies[] = {
@ -155,7 +154,6 @@ static struct s3c_sdhci_platdata nuri_hsmmc2_data __initdata = {
.ext_cd_gpio = EXYNOS4_GPX3(3), /* XEINT_27 */
.ext_cd_gpio_invert = 1,
.cd_type = S3C_SDHCI_CD_GPIO,
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
};
/* WLAN */
@ -164,7 +162,6 @@ static struct s3c_sdhci_platdata nuri_hsmmc3_data __initdata = {
.host_caps = MMC_CAP_4_BIT_DATA |
MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
.cd_type = S3C_SDHCI_CD_EXTERNAL,
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
};
static void __init nuri_sdhci_init(void)

2
arch/arm/mach-exynos/mach-origen.c
View File

@ -472,12 +472,10 @@ static struct i2c_board_info i2c0_devs[] __initdata = {
static struct s3c_sdhci_platdata origen_hsmmc0_pdata __initdata = {
.cd_type = S3C_SDHCI_CD_INTERNAL,
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
};
static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata = {
.cd_type = S3C_SDHCI_CD_INTERNAL,
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
};
/* USB EHCI */

2
arch/arm/mach-exynos/mach-smdk4x12.c
View File

@ -85,7 +85,6 @@ static struct s3c2410_uartcfg smdk4x12_uartcfgs[] __initdata = {
static struct s3c_sdhci_platdata smdk4x12_hsmmc2_pdata __initdata = {
.cd_type = S3C_SDHCI_CD_INTERNAL,
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
#ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
.max_width = 8,
.host_caps = MMC_CAP_8_BIT_DATA,
@ -94,7 +93,6 @@ static struct s3c_sdhci_platdata smdk4x12_hsmmc2_pdata __initdata = {
static struct s3c_sdhci_platdata smdk4x12_hsmmc3_pdata __initdata = {
.cd_type = S3C_SDHCI_CD_INTERNAL,
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
};
static struct regulator_consumer_supply max8997_buck1 =

17
arch/arm/mach-exynos/mach-smdkv310.c
View File

@ -93,7 +93,6 @@ static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = {
static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = {
.cd_type = S3C_SDHCI_CD_INTERNAL,
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
#ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
.max_width = 8,
.host_caps = MMC_CAP_8_BIT_DATA,
@ -104,12 +103,10 @@ static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = {
.cd_type = S3C_SDHCI_CD_GPIO,
.ext_cd_gpio = EXYNOS4_GPK0(2),
.ext_cd_gpio_invert = 1,
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
};
static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = {
.cd_type = S3C_SDHCI_CD_INTERNAL,
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
#ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
.max_width = 8,
.host_caps = MMC_CAP_8_BIT_DATA,
@ -120,7 +117,6 @@ static struct s3c_sdhci_platdata smdkv310_hsmmc3_pdata __initdata = {
.cd_type = S3C_SDHCI_CD_GPIO,
.ext_cd_gpio = EXYNOS4_GPK2(2),
.ext_cd_gpio_invert = 1,
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
};
static void lcd_lte480wv_set_power(struct plat_lcd_data *pd,
@ -183,16 +179,9 @@ static struct s3c_fb_platdata smdkv310_lcd0_pdata __initdata = {
};
static struct resource smdkv310_smsc911x_resources[] = {
[0] = {
.start = EXYNOS4_PA_SROM_BANK(1),
.end = EXYNOS4_PA_SROM_BANK(1) + SZ_64K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_EINT(5),
.end = IRQ_EINT(5),
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
},
[0] = DEFINE_RES_MEM(EXYNOS4_PA_SROM_BANK(1), SZ_64K),
[1] = DEFINE_RES_NAMED(IRQ_EINT(5), 1, NULL, IORESOURCE_IRQ \
| IRQF_TRIGGER_LOW),
};
static struct smsc911x_platform_config smsc9215_config = {

2
arch/arm/mach-exynos/mach-universal_c210.c
View File

@ -749,7 +749,6 @@ static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
.host_caps2 = MMC_CAP2_BROKEN_VOLTAGE,
.cd_type = S3C_SDHCI_CD_PERMANENT,
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
};
static struct regulator_consumer_supply mmc0_supplies[] = {
@ -789,7 +788,6 @@ static struct s3c_sdhci_platdata universal_hsmmc2_data __initdata = {
.ext_cd_gpio = EXYNOS4_GPX3(4), /* XEINT_28 */
.ext_cd_gpio_invert = 1,
.cd_type = S3C_SDHCI_CD_GPIO,
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
};
/* WiFi */

36
arch/arm/mach-s3c24xx/bast-ide.c
View File

@ -37,21 +37,9 @@ static struct pata_platform_info bast_ide_platdata = {
#define IDE_CS S3C2410_CS5
static struct resource bast_ide0_resource[] = {
[0] = {
.start = IDE_CS + BAST_PA_IDEPRI,
.end = IDE_CS + BAST_PA_IDEPRI + (8 * 0x20) - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IDE_CS + BAST_PA_IDEPRIAUX + (6 * 0x20) ,
.end = IDE_CS + BAST_PA_IDEPRIAUX + (7 * 0x20) - 1,
.flags = IORESOURCE_MEM,
},
[2] = {
.start = IRQ_IDE0,
.end = IRQ_IDE0,
.flags = IORESOURCE_IRQ,
},
[0] = DEFINE_RES_MEM(IDE_CS + BAST_PA_IDEPRI, 8 * 0x20),
[1] = DEFINE_RES_MEM(IDE_CS + BAST_PA_IDEPRIAUX + (6 * 0x20), 0x20),
[2] = DEFINE_RES_IRQ(IRQ_IDE0),
};
static struct platform_device bast_device_ide0 = {
@ -67,21 +55,9 @@ static struct platform_device bast_device_ide0 = {
};
static struct resource bast_ide1_resource[] = {
[0] = {
.start = IDE_CS + BAST_PA_IDESEC,
.end = IDE_CS + BAST_PA_IDESEC + (8 * 0x20) - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IDE_CS + BAST_PA_IDESECAUX + (6 * 0x20),
.end = IDE_CS + BAST_PA_IDESECAUX + (7 * 0x20) - 1,
.flags = IORESOURCE_MEM,
},
[2] = {
.start = IRQ_IDE1,
.end = IRQ_IDE1,
.flags = IORESOURCE_IRQ,
},
[0] = DEFINE_RES_MEM(IDE_CS + BAST_PA_IDESEC, 8 * 0x20),
[1] = DEFINE_RES_MEM(IDE_CS + BAST_PA_IDESECAUX + (6 * 0x20), 0x20),
[2] = DEFINE_RES_IRQ(IRQ_IDE1),
};
static struct platform_device bast_device_ide1 = {

9
arch/arm/mach-s3c24xx/mach-amlm5900.c
View File

@ -65,13 +65,8 @@
#include "common.h"
static struct resource amlm5900_nor_resource = {
.start = 0x00000000,
.end = 0x01000000 - 1,
.flags = IORESOURCE_MEM,
};
static struct resource amlm5900_nor_resource =
DEFINE_RES_MEM(0x00000000, SZ_16M);
static struct mtd_partition amlm5900_mtd_partitions[] = {
{

62
arch/arm/mach-s3c24xx/mach-anubis.c
View File

@ -235,19 +235,9 @@ static struct pata_platform_info anubis_ide_platdata = {
};
static struct resource anubis_ide0_resource[] = {
{
.start = S3C2410_CS3,
.end = S3C2410_CS3 + (8*32) - 1,
.flags = IORESOURCE_MEM,
}, {
.start = S3C2410_CS3 + (1<<26) + (6*32),
.end = S3C2410_CS3 + (1<<26) + (7*32) - 1,
.flags = IORESOURCE_MEM,
}, {
.start = IRQ_IDE0,
.end = IRQ_IDE0,
.flags = IORESOURCE_IRQ,
},
[0] = DEFINE_RES_MEM(S3C2410_CS3, 8 * 32),
[2] = DEFINE_RES_MEM(S3C2410_CS3 + (1 << 26) + (6 * 32), 32),
[3] = DEFINE_RES_IRQ(IRQ_IDE0),
};
static struct platform_device anubis_device_ide0 = {
@ -262,19 +252,9 @@ static struct platform_device anubis_device_ide0 = {
};
static struct resource anubis_ide1_resource[] = {
{
.start = S3C2410_CS4,
.end = S3C2410_CS4 + (8*32) - 1,
.flags = IORESOURCE_MEM,
}, {
.start = S3C2410_CS4 + (1<<26) + (6*32),
.end = S3C2410_CS4 + (1<<26) + (7*32) - 1,
.flags = IORESOURCE_MEM,
}, {
.start = IRQ_IDE0,
.end = IRQ_IDE0,
.flags = IORESOURCE_IRQ,
},
[0] = DEFINE_RES_MEM(S3C2410_CS4, 8 * 32),
[1] = DEFINE_RES_MEM(S3C2410_CS4 + (1 << 26) + (6 * 32), 32),
[2] = DEFINE_RES_IRQ(IRQ_IDE0),
};
static struct platform_device anubis_device_ide1 = {
@ -298,16 +278,8 @@ static struct ax_plat_data anubis_asix_platdata = {
};
static struct resource anubis_asix_resource[] = {
[0] = {
.start = S3C2410_CS5,
.end = S3C2410_CS5 + (0x20 * 0x20) -1,
.flags = IORESOURCE_MEM
},
[1] = {
.start = IRQ_ASIX,
.end = IRQ_ASIX,
.flags = IORESOURCE_IRQ
}
[0] = DEFINE_RES_MEM(S3C2410_CS5, 0x20 * 0x20),
[1] = DEFINE_RES_IRQ(IRQ_ASIX),
};
static struct platform_device anubis_device_asix = {
@ -323,21 +295,9 @@ static struct platform_device anubis_device_asix = {
/* SM501 */
static struct resource anubis_sm501_resource[] = {
[0] = {
.start = S3C2410_CS2,
.end = S3C2410_CS2 + SZ_8M,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = S3C2410_CS2 + SZ_64M - SZ_2M,
.end = S3C2410_CS2 + SZ_64M - 1,
.flags = IORESOURCE_MEM,
},
[2] = {
.start = IRQ_EINT0,
.end = IRQ_EINT0,
.flags = IORESOURCE_IRQ,
},
[0] = DEFINE_RES_MEM(S3C2410_CS2, SZ_8M),
[1] = DEFINE_RES_MEM(S3C2410_CS2 + SZ_64M - SZ_2M, SZ_2M),
[2] = DEFINE_RES_IRQ(IRQ_EINT0),
};
static struct sm501_initdata anubis_sm501_initdata = {

19
arch/arm/mach-s3c24xx/mach-at2440evb.c
View File

@ -118,21 +118,10 @@ static struct s3c2410_platform_nand __initdata at2440evb_nand_info = {
/* DM9000AEP 10/100 ethernet controller */
static struct resource at2440evb_dm9k_resource[] = {
[0] = {
.start = S3C2410_CS3,
.end = S3C2410_CS3 + 3,
.flags = IORESOURCE_MEM
},
[1] = {
.start = S3C2410_CS3 + 4,
.end = S3C2410_CS3 + 7,
.flags = IORESOURCE_MEM
},
[2] = {
.start = IRQ_EINT7,
.end = IRQ_EINT7,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
}
[0] = DEFINE_RES_MEM(S3C2410_CS3, 4),
[1] = DEFINE_RES_MEM(S3C2410_CS3 + 4, 4),
[2] = DEFINE_RES_NAMED(IRQ_EINT7, 1, NULL, IORESOURCE_IRQ \
| IORESOURCE_IRQ_HIGHEDGE),
};
static struct dm9000_plat_data at2440evb_dm9k_pdata = {

45
arch/arm/mach-s3c24xx/mach-bast.c
View File

@ -310,22 +310,10 @@ static struct s3c2410_platform_nand __initdata bast_nand_info = {
/* DM9000 */
static struct resource bast_dm9k_resource[] = {
[0] = {
.start = S3C2410_CS5 + BAST_PA_DM9000,
.end = S3C2410_CS5 + BAST_PA_DM9000 + 3,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = S3C2410_CS5 + BAST_PA_DM9000 + 0x40,
.end = S3C2410_CS5 + BAST_PA_DM9000 + 0x40 + 0x3f,
.flags = IORESOURCE_MEM,
},
[2] = {
.start = IRQ_DM9000,
.end = IRQ_DM9000,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
}
[0] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_DM9000, 4),
[1] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_DM9000 + 0x40, 0x40),
[2] = DEFINE_RES_NAMED(IRQ_DM9000 , 1, NULL, IORESOURCE_IRQ \
| IORESOURCE_IRQ_HIGHLEVEL),
};
/* for the moment we limit ourselves to 16bit IO until some
@ -400,21 +388,9 @@ static struct ax_plat_data bast_asix_platdata = {
};
static struct resource bast_asix_resource[] = {
[0] = {
.start = S3C2410_CS5 + BAST_PA_ASIXNET,
.end = S3C2410_CS5 + BAST_PA_ASIXNET + (0x18 * 0x20) - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = S3C2410_CS5 + BAST_PA_ASIXNET + (0x1f * 0x20),
.end = S3C2410_CS5 + BAST_PA_ASIXNET + (0x1f * 0x20),
.flags = IORESOURCE_MEM,
},
[2] = {
.start = IRQ_ASIX,
.end = IRQ_ASIX,
.flags = IORESOURCE_IRQ
}
[0] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_ASIXNET, 0x18 * 0x20),
[1] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_ASIXNET + (0x1f * 0x20), 1),
[2] = DEFINE_RES_IRQ(IRQ_ASIX),
};
static struct platform_device bast_device_asix = {
@ -430,11 +406,8 @@ static struct platform_device bast_device_asix = {
/* Asix AX88796 10/100 ethernet controller parallel port */
static struct resource bast_asixpp_resource[] = {
[0] = {
.start = S3C2410_CS5 + BAST_PA_ASIXNET + (0x18 * 0x20),
.end = S3C2410_CS5 + BAST_PA_ASIXNET + (0x1b * 0x20) - 1,
.flags = IORESOURCE_MEM,
}
[0] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_ASIXNET + (0x18 * 0x20), \
0x30 * 0x20),
};
static struct platform_device bast_device_axpp = {

7
arch/arm/mach-s3c24xx/mach-gta02.c
View File

@ -387,11 +387,8 @@ static struct physmap_flash_data gta02_nor_flash_data = {
.width = 2,
};
static struct resource gta02_nor_flash_resource = {
.start = GTA02_FLASH_BASE,
.end = GTA02_FLASH_BASE + GTA02_FLASH_SIZE - 1,
.flags = IORESOURCE_MEM,
};
static struct resource gta02_nor_flash_resource =
DEFINE_RES_MEM(GTA02_FLASH_BASE, GTA02_FLASH_SIZE);
static struct platform_device gta02_nor_flash = {
.name = "physmap-flash",

9
arch/arm/mach-s3c24xx/mach-h1940.c
View File

@ -253,13 +253,8 @@ static struct pda_power_pdata power_supply_info = {
};
static struct resource power_supply_resources[] = {
[0] = {
.name = "ac",
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE |
IORESOURCE_IRQ_HIGHEDGE,
.start = IRQ_EINT2,
.end = IRQ_EINT2,
},
[0] = DEFINE_RES_NAMED(IRQ_EINT2, 1, "ac", IORESOURCE_IRQ \
| IORESOURCE_IRQ_LOWEDGE | IORESOURCE_IRQ_HIGHEDGE),
};
static struct platform_device power_supply = {

19
arch/arm/mach-s3c24xx/mach-mini2440.c
View File

@ -292,21 +292,10 @@ static struct s3c2410_platform_nand mini2440_nand_info __initdata = {
/* DM9000AEP 10/100 ethernet controller */
static struct resource mini2440_dm9k_resource[] = {
[0] = {
.start = MACH_MINI2440_DM9K_BASE,
.end = MACH_MINI2440_DM9K_BASE + 3,
.flags = IORESOURCE_MEM
},
[1] = {
.start = MACH_MINI2440_DM9K_BASE + 4,
.end = MACH_MINI2440_DM9K_BASE + 7,
.flags = IORESOURCE_MEM
},
[2] = {
.start = IRQ_EINT7,
.end = IRQ_EINT7,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
}
[0] = DEFINE_RES_MEM(MACH_MINI2440_DM9K_BASE, 4),
[1] = DEFINE_RES_MEM(MACH_MINI2440_DM9K_BASE + 4, 4),
[2] = DEFINE_RES_NAMED(IRQ_EINT7, 1, NULL, IORESOURCE_IRQ \
| IORESOURCE_IRQ_HIGHEDGE),
};
/*

6
arch/arm/mach-s3c24xx/mach-nexcoder.c
View File

@ -84,11 +84,7 @@ static struct s3c2410_uartcfg nexcoder_uartcfgs[] __initdata = {
/* NOR Flash on NexVision NexCoder 2440 board */
static struct resource nexcoder_nor_resource[] = {
[0] = {
.start = S3C2410_CS0,
.end = S3C2410_CS0 + (8*1024*1024) - 1,
.flags = IORESOURCE_MEM,
}
[0] = DEFINE_RES_MEM(S3C2410_CS0, SZ_8M),
};
static struct map_info nexcoder_nor_map = {

12
arch/arm/mach-s3c24xx/mach-osiris.c
View File

@ -244,16 +244,8 @@ static struct s3c2410_platform_nand __initdata osiris_nand_info = {
/* PCMCIA control and configuration */
static struct resource osiris_pcmcia_resource[] = {
[0] = {
.start = 0x0f000000,
.end = 0x0f100000,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 0x0c000000,
.end = 0x0c100000,
.flags = IORESOURCE_MEM,
}
[0] = DEFINE_RES_MEM(0x0f000000, SZ_1M),
[1] = DEFINE_RES_MEM(0x0c000000, SZ_1M),
};
static struct platform_device osiris_pcmcia = {

6
arch/arm/mach-s3c24xx/mach-otom.c
View File

@ -77,11 +77,7 @@ static struct s3c2410_uartcfg otom11_uartcfgs[] __initdata = {
/* NOR Flash on NexVision OTOM board */
static struct resource otom_nor_resource[] = {
[0] = {
.start = S3C2410_CS0,
.end = S3C2410_CS0 + (4*1024*1024) - 1,
.flags = IORESOURCE_MEM,
}
[0] = DEFINE_RES_MEM(S3C2410_CS0, SZ_4M),
};
static struct platform_device otom_device_nor = {

12
arch/arm/mach-s3c24xx/mach-qt2410.c
View File

@ -180,16 +180,8 @@ static struct s3c2410fb_mach_info qt2410_fb_info __initdata = {
/* CS8900 */
static struct resource qt2410_cs89x0_resources[] = {
[0] = {
.start = 0x19000000,
.end = 0x19000000 + 16,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_EINT9,
.end = IRQ_EINT9,
.flags = IORESOURCE_IRQ,
},
[0] = DEFINE_RES_MEM(0x19000000, 17),
[1] = DEFINE_RES_IRQ(IRQ_EINT9),
};
static struct platform_device qt2410_cs89x0 = {

9
arch/arm/mach-s3c24xx/mach-rx1950.c
View File

@ -152,13 +152,8 @@ static struct pda_power_pdata power_supply_info = {
};
static struct resource power_supply_resources[] = {
[0] = {
.name = "ac",
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE |
IORESOURCE_IRQ_HIGHEDGE,
.start = IRQ_EINT2,
.end = IRQ_EINT2,
},
[0] = DEFINE_RES_NAMED(IRQ_EINT2, 1, "ac", IORESOURCE_IRQ \
| IORESOURCE_IRQ_LOWEDGE | IORESOURCE_IRQ_HIGHEDGE),
};
static struct platform_device power_supply = {

7
arch/arm/mach-s3c24xx/mach-tct_hammer.c
View File

@ -56,11 +56,8 @@
#include "common.h"
static struct resource tct_hammer_nor_resource = {
.start = 0x00000000,
.end = 0x01000000 - 1,
.flags = IORESOURCE_MEM,
};
static struct resource tct_hammer_nor_resource =
DEFINE_RES_MEM(0x00000000, SZ_16M);
static struct mtd_partition tct_hammer_mtd_partitions[] = {
{

39
arch/arm/mach-s3c24xx/mach-vr1000.c
View File

@ -187,40 +187,17 @@ static struct platform_device serial_device = {
/* DM9000 ethernet devices */
static struct resource vr1000_dm9k0_resource[] = {
[0] = {
.start = S3C2410_CS5 + VR1000_PA_DM9000,
.end = S3C2410_CS5 + VR1000_PA_DM9000 + 3,
.flags = IORESOURCE_MEM
},
[1] = {
.start = S3C2410_CS5 + VR1000_PA_DM9000 + 0x40,
.end = S3C2410_CS5 + VR1000_PA_DM9000 + 0x7f,
.flags = IORESOURCE_MEM
},
[2] = {
.start = IRQ_VR1000_DM9000A,
.end = IRQ_VR1000_DM9000A,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
}
[0] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000, 4),
[1] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0x40, 0x40),
[2] = DEFINE_RES_NAMED(IRQ_VR1000_DM9000A, 1, NULL, IORESOURCE_IRQ \
| IORESOURCE_IRQ_HIGHLEVEL),
};
static struct resource vr1000_dm9k1_resource[] = {
[0] = {
.start = S3C2410_CS5 + VR1000_PA_DM9000 + 0x80,
.end = S3C2410_CS5 + VR1000_PA_DM9000 + 0x83,
.flags = IORESOURCE_MEM
},
[1] = {
.start = S3C2410_CS5 + VR1000_PA_DM9000 + 0xC0,
.end = S3C2410_CS5 + VR1000_PA_DM9000 + 0xFF,
.flags = IORESOURCE_MEM
},
[2] = {
.start = IRQ_VR1000_DM9000N,
.end = IRQ_VR1000_DM9000N,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
}
[0] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0x80, 4),
[1] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0xC0, 0x40),
[2] = DEFINE_RES_NAMED(IRQ_VR1000_DM9000N, 1, NULL, IORESOURCE_IRQ \
| IORESOURCE_IRQ_HIGHLEVEL),
};
/* for the moment we limit ourselves to 16bit IO until some

6
arch/arm/mach-s3c24xx/simtec-nor.c
View File

@ -55,11 +55,7 @@ static struct physmap_flash_data simtec_nor_pdata = {
};
static struct resource simtec_nor_resource[] = {
[0] = {
.start = S3C2410_CS1 + 0x4000000,
.end = S3C2410_CS1 + 0x4000000 + SZ_8M - 1,
.flags = IORESOURCE_MEM,
}
[0] = DEFINE_RES_MEM(S3C2410_CS1 + 0x4000000, SZ_8M),
};
static struct platform_device simtec_device_nor = {

120
arch/arm/mach-s3c64xx/dev-audio.c
View File

@ -57,21 +57,9 @@ static int s3c64xx_i2s_cfg_gpio(struct platform_device *pdev)
}
static struct resource s3c64xx_iis0_resource[] = {
[0] = {
.start = S3C64XX_PA_IIS0,
.end = S3C64XX_PA_IIS0 + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = DMACH_I2S0_OUT,
.end = DMACH_I2S0_OUT,
.flags = IORESOURCE_DMA,
},
[2] = {
.start = DMACH_I2S0_IN,
.end = DMACH_I2S0_IN,
.flags = IORESOURCE_DMA,
},
[0] = DEFINE_RES_MEM(S3C64XX_PA_IIS0, SZ_256),
[1] = DEFINE_RES_DMA(DMACH_I2S0_OUT),
[2] = DEFINE_RES_DMA(DMACH_I2S0_IN),
};
static struct s3c_audio_pdata i2sv3_pdata = {
@ -95,21 +83,9 @@ struct platform_device s3c64xx_device_iis0 = {
EXPORT_SYMBOL(s3c64xx_device_iis0);
static struct resource s3c64xx_iis1_resource[] = {
[0] = {
.start = S3C64XX_PA_IIS1,
.end = S3C64XX_PA_IIS1 + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = DMACH_I2S1_OUT,
.end = DMACH_I2S1_OUT,
.flags = IORESOURCE_DMA,
},
[2] = {
.start = DMACH_I2S1_IN,
.end = DMACH_I2S1_IN,
.flags = IORESOURCE_DMA,
},
[0] = DEFINE_RES_MEM(S3C64XX_PA_IIS1, SZ_256),
[1] = DEFINE_RES_DMA(DMACH_I2S1_OUT),
[2] = DEFINE_RES_DMA(DMACH_I2S1_IN),
};
struct platform_device s3c64xx_device_iis1 = {
@ -124,21 +100,9 @@ struct platform_device s3c64xx_device_iis1 = {
EXPORT_SYMBOL(s3c64xx_device_iis1);
static struct resource s3c64xx_iisv4_resource[] = {
[0] = {
.start = S3C64XX_PA_IISV4,
.end = S3C64XX_PA_IISV4 + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = DMACH_HSI_I2SV40_TX,
.end = DMACH_HSI_I2SV40_TX,
.flags = IORESOURCE_DMA,
},
[2] = {
.start = DMACH_HSI_I2SV40_RX,
.end = DMACH_HSI_I2SV40_RX,
.flags = IORESOURCE_DMA,
},
[0] = DEFINE_RES_MEM(S3C64XX_PA_IISV4, SZ_256),
[1] = DEFINE_RES_DMA(DMACH_HSI_I2SV40_TX),
[2] = DEFINE_RES_DMA(DMACH_HSI_I2SV40_RX),
};
static struct s3c_audio_pdata i2sv4_pdata = {
@ -187,21 +151,9 @@ static int s3c64xx_pcm_cfg_gpio(struct platform_device *pdev)
}
static struct resource s3c64xx_pcm0_resource[] = {
[0] = {
.start = S3C64XX_PA_PCM0,
.end = S3C64XX_PA_PCM0 + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = DMACH_PCM0_TX,
.end = DMACH_PCM0_TX,
.flags = IORESOURCE_DMA,
},
[2] = {
.start = DMACH_PCM0_RX,
.end = DMACH_PCM0_RX,
.flags = IORESOURCE_DMA,
},
[0] = DEFINE_RES_MEM(S3C64XX_PA_PCM0, SZ_256),
[1] = DEFINE_RES_DMA(DMACH_PCM0_TX),
[2] = DEFINE_RES_DMA(DMACH_PCM0_RX),
};
static struct s3c_audio_pdata s3c_pcm0_pdata = {
@ -220,21 +172,9 @@ struct platform_device s3c64xx_device_pcm0 = {
EXPORT_SYMBOL(s3c64xx_device_pcm0);
static struct resource s3c64xx_pcm1_resource[] = {
[0] = {
.start = S3C64XX_PA_PCM1,
.end = S3C64XX_PA_PCM1 + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = DMACH_PCM1_TX,
.end = DMACH_PCM1_TX,
.flags = IORESOURCE_DMA,
},
[2] = {
.start = DMACH_PCM1_RX,
.end = DMACH_PCM1_RX,
.flags = IORESOURCE_DMA,
},
[0] = DEFINE_RES_MEM(S3C64XX_PA_PCM1, SZ_256),
[1] = DEFINE_RES_DMA(DMACH_PCM1_TX),
[2] = DEFINE_RES_DMA(DMACH_PCM1_RX),
};
static struct s3c_audio_pdata s3c_pcm1_pdata = {
@ -265,31 +205,11 @@ static int s3c64xx_ac97_cfg_gpe(struct platform_device *pdev)
}
static struct resource s3c64xx_ac97_resource[] = {
[0] = {
.start = S3C64XX_PA_AC97,
.end = S3C64XX_PA_AC97 + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = DMACH_AC97_PCMOUT,
.end = DMACH_AC97_PCMOUT,
.flags = IORESOURCE_DMA,
},
[2] = {
.start = DMACH_AC97_PCMIN,
.end = DMACH_AC97_PCMIN,
.flags = IORESOURCE_DMA,
},
[3] = {
.start = DMACH_AC97_MICIN,
.end = DMACH_AC97_MICIN,
.flags = IORESOURCE_DMA,
},
[4] = {
.start = IRQ_AC97,
.end = IRQ_AC97,
.flags = IORESOURCE_IRQ,
},
[0] = DEFINE_RES_MEM(S3C64XX_PA_AC97, SZ_256),
[1] = DEFINE_RES_DMA(DMACH_AC97_PCMOUT),
[2] = DEFINE_RES_DMA(DMACH_AC97_PCMIN),
[3] = DEFINE_RES_DMA(DMACH_AC97_MICIN),
[4] = DEFINE_RES_IRQ(IRQ_AC97),
};
static struct s3c_audio_pdata s3c_ac97_pdata;

48
arch/arm/mach-s3c64xx/dev-uart.c
View File

@ -31,55 +31,23 @@
/* 64xx uarts are closer together */
static struct resource s3c64xx_uart0_resource[] = {
[0] = {
.start = S3C_PA_UART0,
.end = S3C_PA_UART0 + 0x100,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_UART0,
.end = IRQ_UART0,
.flags = IORESOURCE_IRQ,
},
[0] = DEFINE_RES_MEM(S3C_PA_UART0, SZ_256),
[1] = DEFINE_RES_IRQ(IRQ_UART0),
};
static struct resource s3c64xx_uart1_resource[] = {
[0] = {
.start = S3C_PA_UART1,
.end = S3C_PA_UART1 + 0x100,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_UART1,
.end = IRQ_UART1,
.flags = IORESOURCE_IRQ,
},
[0] = DEFINE_RES_MEM(S3C_PA_UART1, SZ_256),
[1] = DEFINE_RES_IRQ(IRQ_UART1),
};
static struct resource s3c6xx_uart2_resource[] = {
[0] = {
.start = S3C_PA_UART2,
.end = S3C_PA_UART2 + 0x100,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_UART2,
.end = IRQ_UART2,
.flags = IORESOURCE_IRQ,
},
[0] = DEFINE_RES_MEM(S3C_PA_UART2, SZ_256),
[1] = DEFINE_RES_IRQ(IRQ_UART2),
};
static struct resource s3c64xx_uart3_resource[] = {
[0] = {
.start = S3C_PA_UART3,
.end = S3C_PA_UART3 + 0x100,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_UART3,
.end = IRQ_UART3,
.flags = IORESOURCE_IRQ,
},
[0] = DEFINE_RES_MEM(S3C_PA_UART3, SZ_256),
[1] = DEFINE_RES_IRQ(IRQ_UART3),
};

19
arch/arm/mach-s3c64xx/mach-anw6410.c
View File

@ -165,21 +165,10 @@ static void __init anw6410_dm9000_enable(void)
}
static struct resource anw6410_dm9000_resource[] = {
[0] = {
.start = ANW6410_PA_DM9000,
.end = ANW6410_PA_DM9000 + 3,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = ANW6410_PA_DM9000 + 4,
.end = ANW6410_PA_DM9000 + 4 + 500,
.flags = IORESOURCE_MEM,
},
[2] = {
.start = IRQ_EINT(15),
.end = IRQ_EINT(15),
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_HIGH,
},
[0] = DEFINE_RES_MEM(ANW6410_PA_DM9000, 4),
[1] = DEFINE_RES_MEM(ANW6410_PA_DM9000 + 4, 501),
[2] = DEFINE_RES_NAMED(IRQ_EINT(15), 1, NULL, IORESOURCE_IRQ \
| IRQF_TRIGGER_HIGH),
};
static struct dm9000_plat_data anw6410_dm9000_pdata = {

26
arch/arm/mach-s3c64xx/mach-crag6410.c
View File

@ -232,21 +232,10 @@ static struct platform_device crag6410_gpio_keydev = {
};
static struct resource crag6410_dm9k_resource[] = {
[0] = {
.start = S3C64XX_PA_XM0CSN5,
.end = S3C64XX_PA_XM0CSN5 + 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = S3C64XX_PA_XM0CSN5 + (1 << 8),
.end = S3C64XX_PA_XM0CSN5 + (1 << 8) + 1,
.flags = IORESOURCE_MEM,
},
[2] = {
.start = S3C_EINT(17),
.end = S3C_EINT(17),
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
},
[0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5, 2),
[1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5 + (1 << 8), 2),
[2] = DEFINE_RES_NAMED(S3C_EINT(17), 1, NULL, IORESOURCE_IRQ \
| IORESOURCE_IRQ_HIGHLEVEL),
};
static struct dm9000_plat_data mini6410_dm9k_pdata = {
@ -262,12 +251,7 @@ static struct platform_device crag6410_dm9k_device = {
};
static struct resource crag6410_mmgpio_resource[] = {
[0] = {
.name = "dat",
.start = S3C64XX_PA_XM0CSN4 + 1,
.end = S3C64XX_PA_XM0CSN4 + 1,
.flags = IORESOURCE_MEM,
},
[0] = DEFINE_RES_MEM_NAMED(S3C64XX_PA_XM0CSN4, 1, "dat"),
};
static struct platform_device crag6410_mmgpio = {

19
arch/arm/mach-s3c64xx/mach-mini6410.c
View File

@ -85,21 +85,10 @@ static struct s3c2410_uartcfg mini6410_uartcfgs[] __initdata = {
/* DM9000AEP 10/100 ethernet controller */
static struct resource mini6410_dm9k_resource[] = {
[0] = {
.start = S3C64XX_PA_XM0CSN1,
.end = S3C64XX_PA_XM0CSN1 + 1,
.flags = IORESOURCE_MEM
},
[1] = {
.start = S3C64XX_PA_XM0CSN1 + 4,
.end = S3C64XX_PA_XM0CSN1 + 5,
.flags = IORESOURCE_MEM
},
[2] = {
.start = S3C_EINT(7),
.end = S3C_EINT(7),
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL
}
[0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1, 2),
[1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1 + 4, 2),
[2] = DEFINE_RES_NAMED(S3C_EINT(7), 1, NULL, IORESOURCE_IRQ \
| IORESOURCE_IRQ_HIGHLEVEL),
};
static struct dm9000_plat_data mini6410_dm9k_pdata = {

19
arch/arm/mach-s3c64xx/mach-real6410.c
View File

@ -86,21 +86,10 @@ static struct s3c2410_uartcfg real6410_uartcfgs[] __initdata = {
/* DM9000AEP 10/100 ethernet controller */
static struct resource real6410_dm9k_resource[] = {
[0] = {
.start = S3C64XX_PA_XM0CSN1,
.end = S3C64XX_PA_XM0CSN1 + 1,
.flags = IORESOURCE_MEM
},
[1] = {
.start = S3C64XX_PA_XM0CSN1 + 4,
.end = S3C64XX_PA_XM0CSN1 + 5,
.flags = IORESOURCE_MEM
},
[2] = {
.start = S3C_EINT(7),
.end = S3C_EINT(7),
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL
}
[0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1, 2),
[1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1 + 4, 2),
[2] = DEFINE_RES_NAMED(S3C_EINT(7), 1, NULL, IORESOURCE_IRQ \
| IORESOURCE_IRQ_HIGHLEVEL),
};
static struct dm9000_plat_data real6410_dm9k_pdata = {

13
arch/arm/mach-s3c64xx/mach-smdk6410.c
View File

@ -182,16 +182,9 @@ static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
*/
static struct resource smdk6410_smsc911x_resources[] = {
[0] = {
.start = S3C64XX_PA_XM0CSN1,
.end = S3C64XX_PA_XM0CSN1 + SZ_64K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = S3C_EINT(10),
.end = S3C_EINT(10),
.flags = IORESOURCE_IRQ | IRQ_TYPE_LEVEL_LOW,
},
[0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1, SZ_64K),
[1] = DEFINE_RES_NAMED(S3C_EINT(10), 1, NULL, IORESOURCE_IRQ \
| IRQ_TYPE_LEVEL_LOW),
};
static struct smsc911x_platform_config smdk6410_smsc911x_pdata = {

72
arch/arm/mach-s5p64x0/dev-audio.c
View File

@ -51,21 +51,9 @@ static struct s3c_audio_pdata s5p6440_i2s_pdata = {
};
static struct resource s5p64x0_i2s0_resource[] = {
[0] = {
.start = S5P64X0_PA_I2S,
.end = S5P64X0_PA_I2S + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = DMACH_I2S0_TX,
.end = DMACH_I2S0_TX,
.flags = IORESOURCE_DMA,
},
[2] = {
.start = DMACH_I2S0_RX,
.end = DMACH_I2S0_RX,
.flags = IORESOURCE_DMA,
},
[0] = DEFINE_RES_MEM(S5P64X0_PA_I2S, SZ_256),
[1] = DEFINE_RES_DMA(DMACH_I2S0_TX),
[2] = DEFINE_RES_DMA(DMACH_I2S0_RX),
};
struct platform_device s5p6440_device_iis = {
@ -130,21 +118,9 @@ static struct s3c_audio_pdata s5p6450_i2s_pdata = {
};
static struct resource s5p6450_i2s1_resource[] = {
[0] = {
.start = S5P6450_PA_I2S1,
.end = S5P6450_PA_I2S1 + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = DMACH_I2S1_TX,
.end = DMACH_I2S1_TX,
.flags = IORESOURCE_DMA,
},
[2] = {
.start = DMACH_I2S1_RX,
.end = DMACH_I2S1_RX,
.flags = IORESOURCE_DMA,
},
[0] = DEFINE_RES_MEM(S5P6450_PA_I2S1, SZ_256),
[1] = DEFINE_RES_DMA(DMACH_I2S1_TX),
[2] = DEFINE_RES_DMA(DMACH_I2S1_RX),
};
struct platform_device s5p6450_device_iis1 = {
@ -158,21 +134,9 @@ struct platform_device s5p6450_device_iis1 = {
};
static struct resource s5p6450_i2s2_resource[] = {
[0] = {
.start = S5P6450_PA_I2S2,
.end = S5P6450_PA_I2S2 + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = DMACH_I2S2_TX,
.end = DMACH_I2S2_TX,
.flags = IORESOURCE_DMA,
},
[2] = {
.start = DMACH_I2S2_RX,
.end = DMACH_I2S2_RX,
.flags = IORESOURCE_DMA,
},
[0] = DEFINE_RES_MEM(S5P6450_PA_I2S2, SZ_256),
[1] = DEFINE_RES_DMA(DMACH_I2S2_TX),
[2] = DEFINE_RES_DMA(DMACH_I2S2_RX),
};
struct platform_device s5p6450_device_iis2 = {
@ -208,21 +172,9 @@ static struct s3c_audio_pdata s5p6440_pcm_pdata = {
};
static struct resource s5p6440_pcm0_resource[] = {
[0] = {
.start = S5P64X0_PA_PCM,
.end = S5P64X0_PA_PCM + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = DMACH_PCM0_TX,
.end = DMACH_PCM0_TX,
.flags = IORESOURCE_DMA,
},
[2] = {
.start = DMACH_PCM0_RX,
.end = DMACH_PCM0_RX,
.flags = IORESOURCE_DMA,
},
[0] = DEFINE_RES_MEM(S5P64X0_PA_PCM, SZ_256),
[1] = DEFINE_RES_DMA(DMACH_PCM0_TX),
[2] = DEFINE_RES_DMA(DMACH_PCM0_RX),
};
struct platform_device s5p6440_device_pcm = {

138
arch/arm/mach-s5pc100/dev-audio.c
View File

@ -56,26 +56,10 @@ static struct s3c_audio_pdata i2sv5_pdata = {
};
static struct resource s5pc100_iis0_resource[] = {
[0] = {
.start = S5PC100_PA_I2S0,
.end = S5PC100_PA_I2S0 + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = DMACH_I2S0_TX,
.end = DMACH_I2S0_TX,
.flags = IORESOURCE_DMA,
},
[2] = {
.start = DMACH_I2S0_RX,
.end = DMACH_I2S0_RX,
.flags = IORESOURCE_DMA,
},
[3] = {
.start = DMACH_I2S0S_TX,
.end = DMACH_I2S0S_TX,
.flags = IORESOURCE_DMA,
},
[0] = DEFINE_RES_MEM(S5PC100_PA_I2S0, SZ_256),
[1] = DEFINE_RES_DMA(DMACH_I2S0_TX),
[2] = DEFINE_RES_DMA(DMACH_I2S0_RX),
[3] = DEFINE_RES_DMA(DMACH_I2S0S_TX),
};
struct platform_device s5pc100_device_iis0 = {
@ -103,21 +87,9 @@ static struct s3c_audio_pdata i2sv3_pdata = {
};
static struct resource s5pc100_iis1_resource[] = {
[0] = {
.start = S5PC100_PA_I2S1,
.end = S5PC100_PA_I2S1 + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = DMACH_I2S1_TX,
.end = DMACH_I2S1_TX,
.flags = IORESOURCE_DMA,
},
[2] = {
.start = DMACH_I2S1_RX,
.end = DMACH_I2S1_RX,
.flags = IORESOURCE_DMA,
},
[0] = DEFINE_RES_MEM(S5PC100_PA_I2S1, SZ_256),
[1] = DEFINE_RES_DMA(DMACH_I2S1_TX),
[2] = DEFINE_RES_DMA(DMACH_I2S1_RX),
};
struct platform_device s5pc100_device_iis1 = {
@ -131,21 +103,9 @@ struct platform_device s5pc100_device_iis1 = {
};
static struct resource s5pc100_iis2_resource[] = {
[0] = {
.start = S5PC100_PA_I2S2,
.end = S5PC100_PA_I2S2 + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = DMACH_I2S2_TX,
.end = DMACH_I2S2_TX,
.flags = IORESOURCE_DMA,
},
[2] = {
.start = DMACH_I2S2_RX,
.end = DMACH_I2S2_RX,
.flags = IORESOURCE_DMA,
},
[0] = DEFINE_RES_MEM(S5PC100_PA_I2S2, SZ_256),
[1] = DEFINE_RES_DMA(DMACH_I2S2_TX),
[2] = DEFINE_RES_DMA(DMACH_I2S2_RX),
};
struct platform_device s5pc100_device_iis2 = {
@ -184,21 +144,9 @@ static struct s3c_audio_pdata s3c_pcm_pdata = {
};
static struct resource s5pc100_pcm0_resource[] = {
[0] = {
.start = S5PC100_PA_PCM0,
.end = S5PC100_PA_PCM0 + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = DMACH_PCM0_TX,
.end = DMACH_PCM0_TX,
.flags = IORESOURCE_DMA,
},
[2] = {
.start = DMACH_PCM0_RX,
.end = DMACH_PCM0_RX,
.flags = IORESOURCE_DMA,
},
[0] = DEFINE_RES_MEM(S5PC100_PA_PCM0, SZ_256),
[1] = DEFINE_RES_DMA(DMACH_PCM0_TX),
[2] = DEFINE_RES_DMA(DMACH_PCM0_RX),
};
struct platform_device s5pc100_device_pcm0 = {
@ -212,21 +160,9 @@ struct platform_device s5pc100_device_pcm0 = {
};
static struct resource s5pc100_pcm1_resource[] = {
[0] = {
.start = S5PC100_PA_PCM1,
.end = S5PC100_PA_PCM1 + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = DMACH_PCM1_TX,
.end = DMACH_PCM1_TX,
.flags = IORESOURCE_DMA,
},
[2] = {
.start = DMACH_PCM1_RX,
.end = DMACH_PCM1_RX,
.flags = IORESOURCE_DMA,
},
[0] = DEFINE_RES_MEM(S5PC100_PA_PCM1, SZ_256),
[1] = DEFINE_RES_DMA(DMACH_PCM1_TX),
[2] = DEFINE_RES_DMA(DMACH_PCM1_RX),
};
struct platform_device s5pc100_device_pcm1 = {
@ -247,31 +183,11 @@ static int s5pc100_ac97_cfg_gpio(struct platform_device *pdev)
}
static struct resource s5pc100_ac97_resource[] = {
[0] = {
.start = S5PC100_PA_AC97,
.end = S5PC100_PA_AC97 + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = DMACH_AC97_PCMOUT,
.end = DMACH_AC97_PCMOUT,
.flags = IORESOURCE_DMA,
},
[2] = {
.start = DMACH_AC97_PCMIN,
.end = DMACH_AC97_PCMIN,
.flags = IORESOURCE_DMA,
},
[3] = {
.start = DMACH_AC97_MICIN,
.end = DMACH_AC97_MICIN,
.flags = IORESOURCE_DMA,
},
[4] = {
.start = IRQ_AC97,
.end = IRQ_AC97,
.flags = IORESOURCE_IRQ,
},
[0] = DEFINE_RES_MEM(S5PC100_PA_AC97, SZ_256),
[1] = DEFINE_RES_DMA(DMACH_AC97_PCMOUT),
[2] = DEFINE_RES_DMA(DMACH_AC97_PCMIN),
[3] = DEFINE_RES_DMA(DMACH_AC97_MICIN),
[4] = DEFINE_RES_IRQ(IRQ_AC97),
};
static struct s3c_audio_pdata s3c_ac97_pdata = {
@ -308,16 +224,8 @@ static int s5pc100_spdif_cfg_gpg3(struct platform_device *pdev)
}
static struct resource s5pc100_spdif_resource[] = {
[0] = {
.start = S5PC100_PA_SPDIF,
.end = S5PC100_PA_SPDIF + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = DMACH_SPDIF,
.end = DMACH_SPDIF,
.flags = IORESOURCE_DMA,
},
[0] = DEFINE_RES_MEM(S5PC100_PA_SPDIF, SZ_256),
[1] = DEFINE_RES_DMA(DMACH_SPDIF),
};
static struct s3c_audio_pdata s5p_spdif_pdata = {

156
arch/arm/mach-s5pv210/dev-audio.c
View File

@ -59,26 +59,10 @@ static struct s3c_audio_pdata i2sv5_pdata = {
};
static struct resource s5pv210_iis0_resource[] = {
[0] = {
.start = S5PV210_PA_IIS0,
.end = S5PV210_PA_IIS0 + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = DMACH_I2S0_TX,
.end = DMACH_I2S0_TX,
.flags = IORESOURCE_DMA,
},
[2] = {
.start = DMACH_I2S0_RX,
.end = DMACH_I2S0_RX,
.flags = IORESOURCE_DMA,
},
[3] = {
.start = DMACH_I2S0S_TX,
.end = DMACH_I2S0S_TX,
.flags = IORESOURCE_DMA,
},
[0] = DEFINE_RES_MEM(S5PV210_PA_IIS0, SZ_256),
[1] = DEFINE_RES_DMA(DMACH_I2S0_TX),
[2] = DEFINE_RES_DMA(DMACH_I2S0_RX),
[3] = DEFINE_RES_DMA(DMACH_I2S0S_TX),
};
struct platform_device s5pv210_device_iis0 = {
@ -106,21 +90,9 @@ static struct s3c_audio_pdata i2sv3_pdata = {
};
static struct resource s5pv210_iis1_resource[] = {
[0] = {
.start = S5PV210_PA_IIS1,
.end = S5PV210_PA_IIS1 + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = DMACH_I2S1_TX,
.end = DMACH_I2S1_TX,
.flags = IORESOURCE_DMA,
},
[2] = {
.start = DMACH_I2S1_RX,
.end = DMACH_I2S1_RX,
.flags = IORESOURCE_DMA,
},
[0] = DEFINE_RES_MEM(S5PV210_PA_IIS1, SZ_256),
[1] = DEFINE_RES_DMA(DMACH_I2S1_TX),
[2] = DEFINE_RES_DMA(DMACH_I2S1_RX),
};
struct platform_device s5pv210_device_iis1 = {
@ -134,21 +106,9 @@ struct platform_device s5pv210_device_iis1 = {
};
static struct resource s5pv210_iis2_resource[] = {
[0] = {
.start = S5PV210_PA_IIS2,
.end = S5PV210_PA_IIS2 + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = DMACH_I2S2_TX,
.end = DMACH_I2S2_TX,
.flags = IORESOURCE_DMA,
},
[2] = {
.start = DMACH_I2S2_RX,
.end = DMACH_I2S2_RX,
.flags = IORESOURCE_DMA,
},
[0] = DEFINE_RES_MEM(S5PV210_PA_IIS2, SZ_256),
[1] = DEFINE_RES_DMA(DMACH_I2S2_TX),
[2] = DEFINE_RES_DMA(DMACH_I2S2_RX),
};
struct platform_device s5pv210_device_iis2 = {
@ -188,21 +148,9 @@ static struct s3c_audio_pdata s3c_pcm_pdata = {
};
static struct resource s5pv210_pcm0_resource[] = {
[0] = {
.start = S5PV210_PA_PCM0,
.end = S5PV210_PA_PCM0 + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = DMACH_PCM0_TX,
.end = DMACH_PCM0_TX,
.flags = IORESOURCE_DMA,
},
[2] = {
.start = DMACH_PCM0_RX,
.end = DMACH_PCM0_RX,
.flags = IORESOURCE_DMA,
},
[0] = DEFINE_RES_MEM(S5PV210_PA_PCM0, SZ_256),
[1] = DEFINE_RES_DMA(DMACH_PCM0_TX),
[2] = DEFINE_RES_DMA(DMACH_PCM0_RX),
};
struct platform_device s5pv210_device_pcm0 = {
@ -216,21 +164,9 @@ struct platform_device s5pv210_device_pcm0 = {
};
static struct resource s5pv210_pcm1_resource[] = {
[0] = {
.start = S5PV210_PA_PCM1,
.end = S5PV210_PA_PCM1 + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = DMACH_PCM1_TX,
.end = DMACH_PCM1_TX,
.flags = IORESOURCE_DMA,
},
[2] = {
.start = DMACH_PCM1_RX,
.end = DMACH_PCM1_RX,
.flags = IORESOURCE_DMA,
},
[0] = DEFINE_RES_MEM(S5PV210_PA_PCM1, SZ_256),
[1] = DEFINE_RES_DMA(DMACH_PCM1_TX),
[2] = DEFINE_RES_DMA(DMACH_PCM1_RX),
};
struct platform_device s5pv210_device_pcm1 = {
@ -244,21 +180,9 @@ struct platform_device s5pv210_device_pcm1 = {
};
static struct resource s5pv210_pcm2_resource[] = {
[0] = {
.start = S5PV210_PA_PCM2,
.end = S5PV210_PA_PCM2 + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = DMACH_PCM2_TX,
.end = DMACH_PCM2_TX,
.flags = IORESOURCE_DMA,
},
[2] = {
.start = DMACH_PCM2_RX,
.end = DMACH_PCM2_RX,
.flags = IORESOURCE_DMA,
},
[0] = DEFINE_RES_MEM(S5PV210_PA_PCM2, SZ_256),
[1] = DEFINE_RES_DMA(DMACH_PCM2_TX),
[2] = DEFINE_RES_DMA(DMACH_PCM2_RX),
};
struct platform_device s5pv210_device_pcm2 = {
@ -279,31 +203,11 @@ static int s5pv210_ac97_cfg_gpio(struct platform_device *pdev)
}
static struct resource s5pv210_ac97_resource[] = {
[0] = {
.start = S5PV210_PA_AC97,
.end = S5PV210_PA_AC97 + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = DMACH_AC97_PCMOUT,
.end = DMACH_AC97_PCMOUT,
.flags = IORESOURCE_DMA,
},
[2] = {
.start = DMACH_AC97_PCMIN,
.end = DMACH_AC97_PCMIN,
.flags = IORESOURCE_DMA,
},
[3] = {
.start = DMACH_AC97_MICIN,
.end = DMACH_AC97_MICIN,
.flags = IORESOURCE_DMA,
},
[4] = {
.start = IRQ_AC97,
.end = IRQ_AC97,
.flags = IORESOURCE_IRQ,
},
[0] = DEFINE_RES_MEM(S5PV210_PA_AC97, SZ_256),
[1] = DEFINE_RES_DMA(DMACH_AC97_PCMOUT),
[2] = DEFINE_RES_DMA(DMACH_AC97_PCMIN),
[3] = DEFINE_RES_DMA(DMACH_AC97_MICIN),
[4] = DEFINE_RES_IRQ(IRQ_AC97),
};
static struct s3c_audio_pdata s3c_ac97_pdata = {
@ -334,16 +238,8 @@ static int s5pv210_spdif_cfg_gpio(struct platform_device *pdev)
}
static struct resource s5pv210_spdif_resource[] = {
[0] = {
.start = S5PV210_PA_SPDIF,
.end = S5PV210_PA_SPDIF + 0x100 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = DMACH_SPDIF,
.end = DMACH_SPDIF,
.flags = IORESOURCE_DMA,
},
[0] = DEFINE_RES_MEM(S5PV210_PA_SPDIF, SZ_256),
[1] = DEFINE_RES_DMA(DMACH_SPDIF),
};
static struct s3c_audio_pdata samsung_spdif_pdata = {

19
arch/arm/mach-s5pv210/mach-smdkv210.c
View File

@ -119,21 +119,10 @@ static struct samsung_keypad_platdata smdkv210_keypad_data __initdata = {
};
static struct resource smdkv210_dm9000_resources[] = {
[0] = {
.start = S5PV210_PA_SROM_BANK5,
.end = S5PV210_PA_SROM_BANK5,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = S5PV210_PA_SROM_BANK5 + 2,
.end = S5PV210_PA_SROM_BANK5 + 2,
.flags = IORESOURCE_MEM,
},
[2] = {
.start = IRQ_EINT(9),
.end = IRQ_EINT(9),
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
},
[0] = DEFINE_RES_MEM(S5PV210_PA_SROM_BANK5, 1),
[1] = DEFINE_RES_MEM(S5PV210_PA_SROM_BANK5 + 2, 1),
[2] = DEFINE_RES_NAMED(IRQ_EINT(9), 1, NULL, IORESOURCE_IRQ \
| IORESOURCE_IRQ_HIGHLEVEL),
};
static struct dm9000_plat_data smdkv210_dm9000_platdata = {

16
arch/arm/plat-samsung/devs.c
View File

@ -272,16 +272,8 @@ struct platform_device s5p_device_fimc3 = {
#ifdef CONFIG_S5P_DEV_G2D
static struct resource s5p_g2d_resource[] = {
[0] = {
.start = S5P_PA_G2D,
.end = S5P_PA_G2D + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_2D,
.end = IRQ_2D,
.flags = IORESOURCE_IRQ,
},
[0] = DEFINE_RES_MEM(S5P_PA_G2D, SZ_4K),
[1] = DEFINE_RES_IRQ(IRQ_2D),
};
struct platform_device s5p_device_g2d = {
@ -370,7 +362,6 @@ struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
.max_width = 4,
.host_caps = (MMC_CAP_4_BIT_DATA |
MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
.clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
};
struct platform_device s3c_device_hsmmc0 = {
@ -401,7 +392,6 @@ struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
.max_width = 4,
.host_caps = (MMC_CAP_4_BIT_DATA |
MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
.clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
};
struct platform_device s3c_device_hsmmc1 = {
@ -434,7 +424,6 @@ struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
.max_width = 4,
.host_caps = (MMC_CAP_4_BIT_DATA |
MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
.clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
};
struct platform_device s3c_device_hsmmc2 = {
@ -465,7 +454,6 @@ struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
.max_width = 4,
.host_caps = (MMC_CAP_4_BIT_DATA |
MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
.clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
};
struct platform_device s3c_device_hsmmc3 = {

7
arch/arm/plat-samsung/include/plat/sdhci.h
View File

@ -33,18 +33,12 @@ enum cd_types {
S3C_SDHCI_CD_PERMANENT, /* no CD line, card permanently wired to host */
};
enum clk_types {
S3C_SDHCI_CLK_DIV_INTERNAL, /* use mmc internal clock divider */
S3C_SDHCI_CLK_DIV_EXTERNAL, /* use external clock divider */
};
/**
* struct s3c_sdhci_platdata() - Platform device data for Samsung SDHCI
* @max_width: The maximum number of data bits supported.
* @host_caps: Standard MMC host capabilities bit field.
* @host_caps2: The second standard MMC host capabilities bit field.
* @cd_type: Type of Card Detection method (see cd_types enum above)
* @clk_type: Type of clock divider method (see clk_types enum above)
* @ext_cd_init: Initialize external card detect subsystem. Called on
* sdhci-s3c driver probe when cd_type == S3C_SDHCI_CD_EXTERNAL.
* notify_func argument is a callback to the sdhci-s3c driver
@ -69,7 +63,6 @@ struct s3c_sdhci_platdata {
unsigned int host_caps2;
unsigned int pm_caps;
enum cd_types cd_type;
enum clk_types clk_type;
int ext_cd_gpio;
bool ext_cd_gpio_invert;

2
arch/arm/plat-samsung/platformdata.c
View File

@ -57,6 +57,4 @@ void s3c_sdhci_set_platdata(struct s3c_sdhci_platdata *pd,
set->host_caps2 |= pd->host_caps2;
if (pd->pm_caps)
set->pm_caps |= pd->pm_caps;
if (pd->clk_type)
set->clk_type = pd->clk_type;
}