IP22ZILOG: fix lockup and sysrq
- fix lockup when switching from early console to real console - make sysrq reliable - fix panic, if sysrq is issued before console is opened Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Acked-by: Ralf Baechle <ralf@linux-mips.org> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
parent
6d4f5879b6
commit
68576cf122
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@ -31,25 +31,6 @@
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unsigned long sgi_gfxaddr;
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EXPORT_SYMBOL_GPL(sgi_gfxaddr);
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/*
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* Stop-A is originally a Sun thing that isn't standard on IP22 so to avoid
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* accidents it's disabled by default on IP22.
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*
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* FIXME: provide a mechanism to change the value of stop_a_enabled.
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*/
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int stop_a_enabled;
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void ip22_do_break(void)
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{
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if (!stop_a_enabled)
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return;
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printk("\n");
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ArcEnterInteractiveMode();
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}
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EXPORT_SYMBOL(ip22_do_break);
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extern void ip22_be_init(void) __init;
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void __init plat_mem_setup(void)
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@ -45,8 +45,6 @@
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#include "ip22zilog.h"
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void ip22_do_break(void);
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/*
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* On IP22 we need to delay after register accesses but we do not need to
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* flush writes.
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@ -81,12 +79,9 @@ struct uart_ip22zilog_port {
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#define IP22ZILOG_FLAG_REGS_HELD 0x00000040
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#define IP22ZILOG_FLAG_TX_STOPPED 0x00000080
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#define IP22ZILOG_FLAG_TX_ACTIVE 0x00000100
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#define IP22ZILOG_FLAG_RESET_DONE 0x00000200
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unsigned int cflag;
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/* L1-A keyboard break state. */
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int kbd_id;
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int l1_down;
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unsigned int tty_break;
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unsigned char parity_mask;
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unsigned char prev_status;
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@ -250,13 +245,26 @@ static void ip22zilog_maybe_update_regs(struct uart_ip22zilog_port *up,
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}
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}
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static void ip22zilog_receive_chars(struct uart_ip22zilog_port *up,
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struct zilog_channel *channel)
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{
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struct tty_struct *tty = up->port.info->tty; /* XXX info==NULL? */
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#define Rx_BRK 0x0100 /* BREAK event software flag. */
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#define Rx_SYS 0x0200 /* SysRq event software flag. */
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while (1) {
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unsigned char ch, r1, flag;
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static struct tty_struct *ip22zilog_receive_chars(struct uart_ip22zilog_port *up,
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struct zilog_channel *channel)
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{
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struct tty_struct *tty;
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unsigned char ch, flag;
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unsigned int r1;
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tty = NULL;
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if (up->port.info != NULL &&
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up->port.info->tty != NULL)
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tty = up->port.info->tty;
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for (;;) {
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ch = readb(&channel->control);
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ZSDELAY();
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if (!(ch & Rx_CH_AV))
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break;
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r1 = read_zsreg(channel, R1);
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if (r1 & (PAR_ERR | Rx_OVR | CRC_ERR)) {
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@ -265,43 +273,26 @@ static void ip22zilog_receive_chars(struct uart_ip22zilog_port *up,
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ZS_WSYNC(channel);
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}
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ch = readb(&channel->control);
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ZSDELAY();
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/* This funny hack depends upon BRK_ABRT not interfering
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* with the other bits we care about in R1.
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*/
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if (ch & BRK_ABRT)
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r1 |= BRK_ABRT;
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ch = readb(&channel->data);
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ZSDELAY();
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ch &= up->parity_mask;
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if (ZS_IS_CONS(up) && (r1 & BRK_ABRT)) {
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/* Wait for BREAK to deassert to avoid potentially
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* confusing the PROM.
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*/
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while (1) {
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ch = readb(&channel->control);
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ZSDELAY();
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if (!(ch & BRK_ABRT))
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break;
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}
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ip22_do_break();
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return;
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}
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/* Handle the null char got when BREAK is removed. */
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if (!ch)
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r1 |= up->tty_break;
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/* A real serial line, record the character and status. */
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flag = TTY_NORMAL;
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up->port.icount.rx++;
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if (r1 & (BRK_ABRT | PAR_ERR | Rx_OVR | CRC_ERR)) {
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if (r1 & BRK_ABRT) {
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r1 &= ~(PAR_ERR | CRC_ERR);
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if (r1 & (PAR_ERR | Rx_OVR | CRC_ERR | Rx_SYS | Rx_BRK)) {
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up->tty_break = 0;
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if (r1 & (Rx_SYS | Rx_BRK)) {
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up->port.icount.brk++;
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if (uart_handle_break(&up->port))
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goto next_char;
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if (r1 & Rx_SYS)
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continue;
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r1 &= ~(PAR_ERR | CRC_ERR);
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}
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else if (r1 & PAR_ERR)
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up->port.icount.parity++;
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@ -310,30 +301,21 @@ static void ip22zilog_receive_chars(struct uart_ip22zilog_port *up,
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if (r1 & Rx_OVR)
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up->port.icount.overrun++;
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r1 &= up->port.read_status_mask;
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if (r1 & BRK_ABRT)
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if (r1 & Rx_BRK)
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flag = TTY_BREAK;
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else if (r1 & PAR_ERR)
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flag = TTY_PARITY;
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else if (r1 & CRC_ERR)
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flag = TTY_FRAME;
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}
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if (uart_handle_sysrq_char(&up->port, ch))
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goto next_char;
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continue;
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if (up->port.ignore_status_mask == 0xff ||
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(r1 & up->port.ignore_status_mask) == 0)
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tty_insert_flip_char(tty, ch, flag);
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if (r1 & Rx_OVR)
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tty_insert_flip_char(tty, 0, TTY_OVERRUN);
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next_char:
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ch = readb(&channel->control);
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ZSDELAY();
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if (!(ch & Rx_CH_AV))
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break;
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if (tty)
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uart_insert_char(&up->port, r1, Rx_OVR, ch, flag);
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}
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tty_flip_buffer_push(tty);
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return tty;
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}
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static void ip22zilog_status_handle(struct uart_ip22zilog_port *up,
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@ -348,6 +330,15 @@ static void ip22zilog_status_handle(struct uart_ip22zilog_port *up,
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ZSDELAY();
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ZS_WSYNC(channel);
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if (up->curregs[R15] & BRKIE) {
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if ((status & BRK_ABRT) && !(up->prev_status & BRK_ABRT)) {
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if (uart_handle_break(&up->port))
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up->tty_break = Rx_SYS;
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else
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up->tty_break = Rx_BRK;
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}
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}
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if (ZS_WANTS_MODEM_STATUS(up)) {
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if (status & SYNC)
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up->port.icount.dsr++;
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@ -356,10 +347,10 @@ static void ip22zilog_status_handle(struct uart_ip22zilog_port *up,
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* But it does not tell us which bit has changed, we have to keep
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* track of this ourselves.
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*/
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if ((status & DCD) ^ up->prev_status)
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if ((status ^ up->prev_status) ^ DCD)
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uart_handle_dcd_change(&up->port,
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(status & DCD));
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if ((status & CTS) ^ up->prev_status)
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if ((status ^ up->prev_status) ^ CTS)
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uart_handle_cts_change(&up->port,
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(status & CTS));
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@ -447,19 +438,21 @@ static irqreturn_t ip22zilog_interrupt(int irq, void *dev_id)
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while (up) {
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struct zilog_channel *channel
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= ZILOG_CHANNEL_FROM_PORT(&up->port);
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struct tty_struct *tty;
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unsigned char r3;
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spin_lock(&up->port.lock);
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r3 = read_zsreg(channel, R3);
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/* Channel A */
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tty = NULL;
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if (r3 & (CHAEXT | CHATxIP | CHARxIP)) {
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writeb(RES_H_IUS, &channel->control);
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ZSDELAY();
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ZS_WSYNC(channel);
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if (r3 & CHARxIP)
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ip22zilog_receive_chars(up, channel);
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tty = ip22zilog_receive_chars(up, channel);
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if (r3 & CHAEXT)
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ip22zilog_status_handle(up, channel);
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if (r3 & CHATxIP)
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@ -467,18 +460,22 @@ static irqreturn_t ip22zilog_interrupt(int irq, void *dev_id)
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}
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spin_unlock(&up->port.lock);
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if (tty)
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tty_flip_buffer_push(tty);
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/* Channel B */
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up = up->next;
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channel = ZILOG_CHANNEL_FROM_PORT(&up->port);
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spin_lock(&up->port.lock);
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tty = NULL;
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if (r3 & (CHBEXT | CHBTxIP | CHBRxIP)) {
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writeb(RES_H_IUS, &channel->control);
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ZSDELAY();
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ZS_WSYNC(channel);
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if (r3 & CHBRxIP)
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ip22zilog_receive_chars(up, channel);
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tty = ip22zilog_receive_chars(up, channel);
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if (r3 & CHBEXT)
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ip22zilog_status_handle(up, channel);
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if (r3 & CHBTxIP)
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@ -486,6 +483,9 @@ static irqreturn_t ip22zilog_interrupt(int irq, void *dev_id)
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}
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spin_unlock(&up->port.lock);
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if (tty)
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tty_flip_buffer_push(tty);
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up = up->next;
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}
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@ -681,11 +681,46 @@ static void ip22zilog_break_ctl(struct uart_port *port, int break_state)
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spin_unlock_irqrestore(&port->lock, flags);
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}
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static void __ip22zilog_reset(struct uart_ip22zilog_port *up)
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{
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struct zilog_channel *channel;
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int i;
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if (up->flags & IP22ZILOG_FLAG_RESET_DONE)
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return;
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/* Let pending transmits finish. */
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channel = ZILOG_CHANNEL_FROM_PORT(&up->port);
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for (i = 0; i < 1000; i++) {
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unsigned char stat = read_zsreg(channel, R1);
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if (stat & ALL_SNT)
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break;
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udelay(100);
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}
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if (!ZS_IS_CHANNEL_A(up)) {
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up++;
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channel = ZILOG_CHANNEL_FROM_PORT(&up->port);
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}
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write_zsreg(channel, R9, FHWRES);
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ZSDELAY_LONG();
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(void) read_zsreg(channel, R0);
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up->flags |= IP22ZILOG_FLAG_RESET_DONE;
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up->next->flags |= IP22ZILOG_FLAG_RESET_DONE;
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}
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static void __ip22zilog_startup(struct uart_ip22zilog_port *up)
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{
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struct zilog_channel *channel;
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channel = ZILOG_CHANNEL_FROM_PORT(&up->port);
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__ip22zilog_reset(up);
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__load_zsregs(channel, up->curregs);
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/* set master interrupt enable */
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write_zsreg(channel, R9, up->curregs[R9]);
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up->prev_status = readb(&channel->control);
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/* Enable receiver and transmitter. */
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@ -859,8 +894,6 @@ ip22zilog_set_termios(struct uart_port *port, struct ktermios *termios,
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else
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up->flags &= ~IP22ZILOG_FLAG_MODEM_STATUS;
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up->cflag = termios->c_cflag;
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ip22zilog_maybe_update_regs(up, ZILOG_CHANNEL_FROM_PORT(port));
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uart_update_timeout(port, termios->c_cflag, baud);
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@ -992,74 +1025,29 @@ ip22zilog_console_write(struct console *con, const char *s, unsigned int count)
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spin_unlock_irqrestore(&up->port.lock, flags);
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}
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void
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ip22serial_console_termios(struct console *con, char *options)
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{
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int baud = 9600, bits = 8, cflag;
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int parity = 'n';
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int flow = 'n';
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if (options)
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uart_parse_options(options, &baud, &parity, &bits, &flow);
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cflag = CREAD | HUPCL | CLOCAL;
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switch (baud) {
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case 150: cflag |= B150; break;
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case 300: cflag |= B300; break;
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case 600: cflag |= B600; break;
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case 1200: cflag |= B1200; break;
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case 2400: cflag |= B2400; break;
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case 4800: cflag |= B4800; break;
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case 9600: cflag |= B9600; break;
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case 19200: cflag |= B19200; break;
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case 38400: cflag |= B38400; break;
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default: baud = 9600; cflag |= B9600; break;
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}
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con->cflag = cflag | CS8; /* 8N1 */
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uart_update_timeout(&ip22zilog_port_table[con->index].port, cflag, baud);
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}
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static int __init ip22zilog_console_setup(struct console *con, char *options)
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{
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struct uart_ip22zilog_port *up = &ip22zilog_port_table[con->index];
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unsigned long flags;
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int baud, brg;
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int baud = 9600, bits = 8;
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int parity = 'n';
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int flow = 'n';
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printk("Console: ttyS%d (IP22-Zilog)\n", con->index);
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up->flags |= IP22ZILOG_FLAG_IS_CONS;
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/* Get firmware console settings. */
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ip22serial_console_termios(con, options);
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/* Firmware console speed is limited to 150-->38400 baud so
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* this hackish cflag thing is OK.
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*/
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switch (con->cflag & CBAUD) {
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case B150: baud = 150; break;
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case B300: baud = 300; break;
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case B600: baud = 600; break;
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case B1200: baud = 1200; break;
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case B2400: baud = 2400; break;
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case B4800: baud = 4800; break;
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default: case B9600: baud = 9600; break;
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case B19200: baud = 19200; break;
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case B38400: baud = 38400; break;
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};
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brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR);
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printk(KERN_INFO "Console: ttyS%d (IP22-Zilog)\n", con->index);
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spin_lock_irqsave(&up->port.lock, flags);
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up->curregs[R15] = BRKIE;
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ip22zilog_convert_to_zs(up, con->cflag, 0, brg);
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up->curregs[R15] |= BRKIE;
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__ip22zilog_startup(up);
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spin_unlock_irqrestore(&up->port.lock, flags);
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return 0;
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if (options)
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uart_parse_options(options, &baud, &parity, &bits, &flow);
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return uart_set_options(&up->port, con, baud, parity, bits, flow);
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}
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static struct uart_driver ip22zilog_reg;
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@ -1140,25 +1128,10 @@ static void __init ip22zilog_prepare(void)
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up[(chip * 2) + 1].port.line = (chip * 2) + 1;
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up[(chip * 2) + 1].flags |= IP22ZILOG_FLAG_IS_CHANNEL_A;
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}
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}
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static void __init ip22zilog_init_hw(void)
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{
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int i;
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for (i = 0; i < NUM_CHANNELS; i++) {
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struct uart_ip22zilog_port *up = &ip22zilog_port_table[i];
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struct zilog_channel *channel = ZILOG_CHANNEL_FROM_PORT(&up->port);
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unsigned long flags;
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int baud, brg;
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spin_lock_irqsave(&up->port.lock, flags);
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if (ZS_IS_CHANNEL_A(up)) {
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write_zsreg(channel, R9, FHWRES);
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ZSDELAY_LONG();
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(void) read_zsreg(channel, R0);
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}
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for (channel = 0; channel < NUM_CHANNELS; channel++) {
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struct uart_ip22zilog_port *up = &ip22zilog_port_table[channel];
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int brg;
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/* Normal serial TTY. */
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up->parity_mask = 0xff;
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@ -1169,16 +1142,10 @@ static void __init ip22zilog_init_hw(void)
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up->curregs[R9] = NV | MIE;
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up->curregs[R10] = NRZ;
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up->curregs[R11] = TCBR | RCBR;
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baud = 9600;
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brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR);
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brg = BPS_TO_BRG(9600, ZS_CLOCK / ZS_CLOCK_DIVISOR);
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up->curregs[R12] = (brg & 0xff);
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up->curregs[R13] = (brg >> 8) & 0xff;
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up->curregs[R14] = BRENAB;
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__load_zsregs(channel, up->curregs);
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/* set master interrupt enable */
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write_zsreg(channel, R9, up->curregs[R9]);
|
||||
|
||||
spin_unlock_irqrestore(&up->port.lock, flags);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -1195,8 +1162,6 @@ static int __init ip22zilog_ports_init(void)
|
|||
panic("IP22-Zilog: Unable to register zs interrupt handler.\n");
|
||||
}
|
||||
|
||||
ip22zilog_init_hw();
|
||||
|
||||
ret = uart_register_driver(&ip22zilog_reg);
|
||||
if (ret == 0) {
|
||||
int i;
|
||||
|
|
|
@ -209,8 +209,6 @@ extern void *set_except_vector(int n, void *addr);
|
|||
extern unsigned long ebase;
|
||||
extern void per_cpu_trap_init(void);
|
||||
|
||||
extern int stop_a_enabled;
|
||||
|
||||
/*
|
||||
* See include/asm-ia64/system.h; prevents deadlock on SMP
|
||||
* systems.
|
||||
|
|
|
@ -437,7 +437,7 @@ uart_handle_sysrq_char(struct uart_port *port, unsigned int ch)
|
|||
#ifdef SUPPORT_SYSRQ
|
||||
if (port->sysrq) {
|
||||
if (ch && time_before(jiffies, port->sysrq)) {
|
||||
handle_sysrq(ch, port->info->tty);
|
||||
handle_sysrq(ch, port->info ? port->info->tty : NULL);
|
||||
port->sysrq = 0;
|
||||
return 1;
|
||||
}
|
||||
|
|
Loading…
Reference in New Issue