arm64: KVM: Optimize __guest_enter/exit() to save a few instructions
We are doing an unnecessary stack push/pop operation when restoring the guest registers x0-x18 in __guest_enter(). This patch saves the two instructions by using x18 as a base register. No need to store the vcpu context pointer in stack because it is redundant, the same information is available in tpidr_el2. The function __guest_exit() calling convention is slightly modified, caller only pushes the regs x0-x1 to stack instead of regs x0-x3. Signed-off-by: Shanker Donthineni <shankerd@codeaurora.org> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
This commit is contained in:
Shanker Donthineni
Christoffer Dall
parent
1fe0009833
commit
68381b2b00
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@ -55,79 +55,78 @@
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*/
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ENTRY(__guest_enter)
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// x0: vcpu
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// x1: host/guest context
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// x2-x18: clobbered by macros
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// x1: host context
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// x2-x17: clobbered by macros
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// x18: guest context
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// Store the host regs
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save_callee_saved_regs x1
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// Preserve vcpu & host_ctxt for use at exit time
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stp x0, x1, [sp, #-16]!
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// Store the host_ctxt for use at exit time
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str x1, [sp, #-16]!
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add x1, x0, #VCPU_CONTEXT
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add x18, x0, #VCPU_CONTEXT
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// Prepare x0-x1 for later restore by pushing them onto the stack
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ldp x2, x3, [x1, #CPU_XREG_OFFSET(0)]
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stp x2, x3, [sp, #-16]!
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// Restore guest regs x0-x17
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ldp x0, x1, [x18, #CPU_XREG_OFFSET(0)]
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ldp x2, x3, [x18, #CPU_XREG_OFFSET(2)]
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ldp x4, x5, [x18, #CPU_XREG_OFFSET(4)]
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ldp x6, x7, [x18, #CPU_XREG_OFFSET(6)]
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ldp x8, x9, [x18, #CPU_XREG_OFFSET(8)]
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ldp x10, x11, [x18, #CPU_XREG_OFFSET(10)]
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ldp x12, x13, [x18, #CPU_XREG_OFFSET(12)]
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ldp x14, x15, [x18, #CPU_XREG_OFFSET(14)]
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ldp x16, x17, [x18, #CPU_XREG_OFFSET(16)]
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// x2-x18
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ldp x2, x3, [x1, #CPU_XREG_OFFSET(2)]
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ldp x4, x5, [x1, #CPU_XREG_OFFSET(4)]
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ldp x6, x7, [x1, #CPU_XREG_OFFSET(6)]
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ldp x8, x9, [x1, #CPU_XREG_OFFSET(8)]
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ldp x10, x11, [x1, #CPU_XREG_OFFSET(10)]
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ldp x12, x13, [x1, #CPU_XREG_OFFSET(12)]
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ldp x14, x15, [x1, #CPU_XREG_OFFSET(14)]
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ldp x16, x17, [x1, #CPU_XREG_OFFSET(16)]
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ldr x18, [x1, #CPU_XREG_OFFSET(18)]
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// Restore guest regs x19-x29, lr
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restore_callee_saved_regs x18
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// x19-x29, lr
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restore_callee_saved_regs x1
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// Last bits of the 64bit state
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ldp x0, x1, [sp], #16
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// Restore guest reg x18
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ldr x18, [x18, #CPU_XREG_OFFSET(18)]
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// Do not touch any register after this!
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eret
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ENDPROC(__guest_enter)
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ENTRY(__guest_exit)
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// x0: vcpu
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// x1: return code
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// x2-x3: free
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// x4-x29,lr: vcpu regs
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// vcpu x0-x3 on the stack
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// x0: return code
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// x1: vcpu
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// x2-x29,lr: vcpu regs
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// vcpu x0-x1 on the stack
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add x2, x0, #VCPU_CONTEXT
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add x1, x1, #VCPU_CONTEXT
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stp x4, x5, [x2, #CPU_XREG_OFFSET(4)]
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stp x6, x7, [x2, #CPU_XREG_OFFSET(6)]
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stp x8, x9, [x2, #CPU_XREG_OFFSET(8)]
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stp x10, x11, [x2, #CPU_XREG_OFFSET(10)]
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stp x12, x13, [x2, #CPU_XREG_OFFSET(12)]
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stp x14, x15, [x2, #CPU_XREG_OFFSET(14)]
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stp x16, x17, [x2, #CPU_XREG_OFFSET(16)]
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str x18, [x2, #CPU_XREG_OFFSET(18)]
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// Store the guest regs x2 and x3
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stp x2, x3, [x1, #CPU_XREG_OFFSET(2)]
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ldp x6, x7, [sp], #16 // x2, x3
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ldp x4, x5, [sp], #16 // x0, x1
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// Retrieve the guest regs x0-x1 from the stack
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ldp x2, x3, [sp], #16 // x0, x1
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stp x4, x5, [x2, #CPU_XREG_OFFSET(0)]
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stp x6, x7, [x2, #CPU_XREG_OFFSET(2)]
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// Store the guest regs x0-x1 and x4-x18
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stp x2, x3, [x1, #CPU_XREG_OFFSET(0)]
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stp x4, x5, [x1, #CPU_XREG_OFFSET(4)]
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stp x6, x7, [x1, #CPU_XREG_OFFSET(6)]
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stp x8, x9, [x1, #CPU_XREG_OFFSET(8)]
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stp x10, x11, [x1, #CPU_XREG_OFFSET(10)]
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stp x12, x13, [x1, #CPU_XREG_OFFSET(12)]
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stp x14, x15, [x1, #CPU_XREG_OFFSET(14)]
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stp x16, x17, [x1, #CPU_XREG_OFFSET(16)]
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str x18, [x1, #CPU_XREG_OFFSET(18)]
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save_callee_saved_regs x2
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// Store the guest regs x19-x29, lr
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save_callee_saved_regs x1
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// Restore the host_ctxt from the stack
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ldr x2, [sp], #16
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// Restore vcpu & host_ctxt from the stack
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// (preserving return code in x1)
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ldp x0, x2, [sp], #16
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// Now restore the host regs
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restore_callee_saved_regs x2
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mov x0, x1
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ret
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ENDPROC(__guest_exit)
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ENTRY(__fpsimd_guest_restore)
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stp x2, x3, [sp, #-16]!
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stp x4, lr, [sp, #-16]!
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alternative_if_not ARM64_HAS_VIRT_HOST_EXTN
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@ -27,16 +27,6 @@
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.text
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.pushsection .hyp.text, "ax"
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.macro save_x0_to_x3
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stp x0, x1, [sp, #-16]!
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stp x2, x3, [sp, #-16]!
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.endm
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.macro restore_x0_to_x3
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ldp x2, x3, [sp], #16
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ldp x0, x1, [sp], #16
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.endm
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.macro do_el2_call
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/*
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* Shuffle the parameters before calling the function
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@ -79,23 +69,23 @@ ENTRY(__kvm_hyp_teardown)
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ENDPROC(__kvm_hyp_teardown)
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el1_sync: // Guest trapped into EL2
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save_x0_to_x3
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stp x0, x1, [sp, #-16]!
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alternative_if_not ARM64_HAS_VIRT_HOST_EXTN
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mrs x1, esr_el2
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alternative_else
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mrs x1, esr_el1
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alternative_endif
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lsr x2, x1, #ESR_ELx_EC_SHIFT
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lsr x0, x1, #ESR_ELx_EC_SHIFT
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cmp x2, #ESR_ELx_EC_HVC64
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cmp x0, #ESR_ELx_EC_HVC64
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b.ne el1_trap
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mrs x3, vttbr_el2 // If vttbr is valid, the 64bit guest
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cbnz x3, el1_trap // called HVC
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mrs x1, vttbr_el2 // If vttbr is valid, the 64bit guest
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cbnz x1, el1_trap // called HVC
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/* Here, we're pretty sure the host called HVC. */
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restore_x0_to_x3
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ldp x0, x1, [sp], #16
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cmp x0, #HVC_GET_VECTORS
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b.ne 1f
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@ -113,22 +103,21 @@ alternative_endif
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el1_trap:
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/*
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* x1: ESR
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* x2: ESR_EC
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* x0: ESR_EC
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*/
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/* Guest accessed VFP/SIMD registers, save host, restore Guest */
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cmp x2, #ESR_ELx_EC_FP_ASIMD
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cmp x0, #ESR_ELx_EC_FP_ASIMD
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b.eq __fpsimd_guest_restore
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mrs x0, tpidr_el2
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mov x1, #ARM_EXCEPTION_TRAP
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mrs x1, tpidr_el2
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mov x0, #ARM_EXCEPTION_TRAP
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b __guest_exit
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el1_irq:
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save_x0_to_x3
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mrs x0, tpidr_el2
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mov x1, #ARM_EXCEPTION_IRQ
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stp x0, x1, [sp, #-16]!
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mrs x1, tpidr_el2
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mov x0, #ARM_EXCEPTION_IRQ
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b __guest_exit
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ENTRY(__hyp_do_panic)
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