OMAP3+: VP: remove omap_vp_runtime_data

Remove the "runtime" VP data in favor of direct programming of VP registers.
The VP is in the PRM, which is in the wakeup powerdomain, so there is no
need to keep the state dynamically.

Fixes to original version from Nishanth Menon <nm@ti.com>

Signed-off-by: Kevin Hilman <khilman@ti.com>
This commit is contained in:
Kevin Hilman 2011-04-04 17:58:21 -07:00
parent 76ea7424f8
commit 667216d6a4
3 changed files with 27 additions and 65 deletions

View File

@ -144,13 +144,11 @@ struct omap_voltdm_pmic {
*
* @volt_data : voltage table having the distinct voltages supported
* by the domain and other associated per voltage data.
* @vp_rt_data : VP data derived at runtime, not predefined
* @curr_volt : current voltage for this vdd.
* @volt_scale : API to scale the voltage of the vdd.
*/
struct omap_vdd_info {
struct omap_volt_data *volt_data;
struct omap_vp_runtime_data vp_rt_data;
u32 curr_volt;
int (*volt_scale) (struct voltagedomain *voltdm,

View File

@ -49,8 +49,8 @@ static void vp_latch_vsel(struct voltagedomain *voltdm)
void __init omap_vp_init(struct voltagedomain *voltdm)
{
struct omap_vp_instance *vp = voltdm->vp;
struct omap_vdd_info *vdd = voltdm->vdd;
u32 vp_val, sys_clk_rate, timeout_val, waittime;
u32 val, sys_clk_rate, timeout, waittime;
u32 vddmin, vddmax, vstepmin, vstepmax;
if (!voltdm->read || !voltdm->write) {
pr_err("%s: No read/write API for accessing vdd_%s regs\n",
@ -63,47 +63,39 @@ void __init omap_vp_init(struct voltagedomain *voltdm)
/* Divide to avoid overflow */
sys_clk_rate = voltdm->sys_clk.rate / 1000;
vdd->vp_rt_data.vpconfig_erroroffset =
(voltdm->pmic->vp_erroroffset <<
__ffs(voltdm->vp->common->vpconfig_erroroffset_mask));
timeout_val = (sys_clk_rate * voltdm->pmic->vp_timeout_us) / 1000;
vdd->vp_rt_data.vlimitto_timeout = timeout_val;
vdd->vp_rt_data.vlimitto_vddmin = voltdm->pmic->vp_vddmin;
vdd->vp_rt_data.vlimitto_vddmax = voltdm->pmic->vp_vddmax;
timeout = (sys_clk_rate * voltdm->pmic->vp_timeout_us) / 1000;
vddmin = voltdm->pmic->vp_vddmin;
vddmax = voltdm->pmic->vp_vddmax;
waittime = ((voltdm->pmic->step_size / voltdm->pmic->slew_rate) *
sys_clk_rate) / 1000;
vdd->vp_rt_data.vstepmin_smpswaittimemin = waittime;
vdd->vp_rt_data.vstepmax_smpswaittimemax = waittime;
vdd->vp_rt_data.vstepmin_stepmin = voltdm->pmic->vp_vstepmin;
vdd->vp_rt_data.vstepmax_stepmax = voltdm->pmic->vp_vstepmax;
vstepmin = voltdm->pmic->vp_vstepmin;
vstepmax = voltdm->pmic->vp_vstepmax;
vp_val = vdd->vp_rt_data.vpconfig_erroroffset |
(vdd->vp_rt_data.vpconfig_errorgain <<
__ffs(vp->common->vpconfig_errorgain_mask)) |
/*
* VP_CONFIG: error gain is not set here, it will be updated
* on each scale, based on OPP.
*/
val = (voltdm->pmic->vp_erroroffset <<
__ffs(voltdm->vp->common->vpconfig_erroroffset_mask)) |
vp->common->vpconfig_timeouten;
voltdm->write(vp_val, vp->vpconfig);
voltdm->write(val, vp->vpconfig);
vp_val = ((vdd->vp_rt_data.vstepmin_smpswaittimemin <<
vp->common->vstepmin_smpswaittimemin_shift) |
(vdd->vp_rt_data.vstepmin_stepmin <<
vp->common->vstepmin_stepmin_shift));
voltdm->write(vp_val, vp->vstepmin);
/* VSTEPMIN */
val = (waittime << vp->common->vstepmin_smpswaittimemin_shift) |
(vstepmin << vp->common->vstepmin_stepmin_shift);
voltdm->write(val, vp->vstepmin);
vp_val = ((vdd->vp_rt_data.vstepmax_smpswaittimemax <<
vp->common->vstepmax_smpswaittimemax_shift) |
(vdd->vp_rt_data.vstepmax_stepmax <<
vp->common->vstepmax_stepmax_shift));
voltdm->write(vp_val, vp->vstepmax);
/* VSTEPMAX */
val = (vstepmax << vp->common->vstepmax_stepmax_shift) |
(waittime << vp->common->vstepmax_smpswaittimemax_shift);
voltdm->write(val, vp->vstepmax);
vp_val = ((vdd->vp_rt_data.vlimitto_vddmax <<
vp->common->vlimitto_vddmax_shift) |
(vdd->vp_rt_data.vlimitto_vddmin <<
vp->common->vlimitto_vddmin_shift) |
(vdd->vp_rt_data.vlimitto_timeout <<
vp->common->vlimitto_timeout_shift));
voltdm->write(vp_val, vp->vlimitto);
/* VLIMITTO */
val = (vddmax << vp->common->vlimitto_vddmax_shift) |
(vddmin << vp->common->vlimitto_vddmin_shift) |
(timeout << vp->common->vlimitto_timeout_shift);
voltdm->write(val, vp->vlimitto);
}
int omap_vp_update_errorgain(struct voltagedomain *voltdm,

View File

@ -108,34 +108,6 @@ struct omap_vp_instance {
bool enabled;
};
/**
* struct omap_vp_runtime_data - VP data populated at runtime by code
* @vpconfig_erroroffset: value of ERROROFFSET bitfield in PRM_VP*_CONFIG
* @vpconfig_errorgain: value of ERRORGAIN bitfield in PRM_VP*_CONFIG
* @vstepmin_smpswaittimemin: value of SMPSWAITTIMEMIN bitfield in PRM_VP*_VSTEPMIN
* @vstepmax_smpswaittimemax: value of SMPSWAITTIMEMAX bitfield in PRM_VP*_VSTEPMAX
* @vlimitto_timeout: value of TIMEOUT bitfield in PRM_VP*_VLIMITTO
* @vstepmin_stepmin: value of VSTEPMIN bitfield in PRM_VP*_VSTEPMIN
* @vstepmax_stepmax: value of VSTEPMAX bitfield in PRM_VP*_VSTEPMAX
* @vlimitto_vddmin: value of VDDMIN bitfield in PRM_VP*_VLIMITTO
* @vlimitto_vddmax: value of VDDMAX bitfield in PRM_VP*_VLIMITTO
*
* XXX Is this structure really needed? Why not just program the
* device directly? They are in PRM space, therefore in the WKUP
* powerdomain, so register contents should not be lost in off-mode.
*/
struct omap_vp_runtime_data {
u32 vpconfig_erroroffset;
u16 vpconfig_errorgain;
u16 vstepmin_smpswaittimemin;
u16 vstepmax_smpswaittimemax;
u16 vlimitto_timeout;
u8 vstepmin_stepmin;
u8 vstepmax_stepmax;
u8 vlimitto_vddmin;
u8 vlimitto_vddmax;
};
extern struct omap_vp_instance omap3_vp_mpu;
extern struct omap_vp_instance omap3_vp_core;