mtd: nand: denali: remove meaningless writes to read-only registers
The write accesses to LOGICAL_PAGE_{DATA,SPARE}_SIZE have no effect because the Denali User's Guide says these registers are read-only. The hardware automatically multiplies the main/spare size by the number of devices and update LOGICAL_PAGE_{DATA,SPARE}_SIZE. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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@ -342,8 +342,6 @@ static void get_samsung_nand_para(struct denali_nand_info *denali,
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static void get_toshiba_nand_para(struct denali_nand_info *denali)
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static void get_toshiba_nand_para(struct denali_nand_info *denali)
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{
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{
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uint32_t tmp;
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/*
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/*
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* Workaround to fix a controller bug which reports a wrong
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* Workaround to fix a controller bug which reports a wrong
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* spare area size for some kind of Toshiba NAND device
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* spare area size for some kind of Toshiba NAND device
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@ -351,10 +349,6 @@ static void get_toshiba_nand_para(struct denali_nand_info *denali)
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if ((ioread32(denali->flash_reg + DEVICE_MAIN_AREA_SIZE) == 4096) &&
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if ((ioread32(denali->flash_reg + DEVICE_MAIN_AREA_SIZE) == 4096) &&
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(ioread32(denali->flash_reg + DEVICE_SPARE_AREA_SIZE) == 64)) {
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(ioread32(denali->flash_reg + DEVICE_SPARE_AREA_SIZE) == 64)) {
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iowrite32(216, denali->flash_reg + DEVICE_SPARE_AREA_SIZE);
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iowrite32(216, denali->flash_reg + DEVICE_SPARE_AREA_SIZE);
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tmp = ioread32(denali->flash_reg + DEVICES_CONNECTED) *
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ioread32(denali->flash_reg + DEVICE_SPARE_AREA_SIZE);
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iowrite32(tmp,
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denali->flash_reg + LOGICAL_PAGE_SPARE_SIZE);
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#if SUPPORT_15BITECC
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#if SUPPORT_15BITECC
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iowrite32(15, denali->flash_reg + ECC_CORRECTION);
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iowrite32(15, denali->flash_reg + ECC_CORRECTION);
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#elif SUPPORT_8BITECC
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#elif SUPPORT_8BITECC
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@ -366,22 +360,12 @@ static void get_toshiba_nand_para(struct denali_nand_info *denali)
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static void get_hynix_nand_para(struct denali_nand_info *denali,
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static void get_hynix_nand_para(struct denali_nand_info *denali,
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uint8_t device_id)
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uint8_t device_id)
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{
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{
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uint32_t main_size, spare_size;
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switch (device_id) {
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switch (device_id) {
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case 0xD5: /* Hynix H27UAG8T2A, H27UBG8U5A or H27UCG8VFA */
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case 0xD5: /* Hynix H27UAG8T2A, H27UBG8U5A or H27UCG8VFA */
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case 0xD7: /* Hynix H27UDG8VEM, H27UCG8UDM or H27UCG8V5A */
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case 0xD7: /* Hynix H27UDG8VEM, H27UCG8UDM or H27UCG8V5A */
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iowrite32(128, denali->flash_reg + PAGES_PER_BLOCK);
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iowrite32(128, denali->flash_reg + PAGES_PER_BLOCK);
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iowrite32(4096, denali->flash_reg + DEVICE_MAIN_AREA_SIZE);
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iowrite32(4096, denali->flash_reg + DEVICE_MAIN_AREA_SIZE);
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iowrite32(224, denali->flash_reg + DEVICE_SPARE_AREA_SIZE);
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iowrite32(224, denali->flash_reg + DEVICE_SPARE_AREA_SIZE);
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main_size = 4096 *
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ioread32(denali->flash_reg + DEVICES_CONNECTED);
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spare_size = 224 *
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ioread32(denali->flash_reg + DEVICES_CONNECTED);
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iowrite32(main_size,
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denali->flash_reg + LOGICAL_PAGE_DATA_SIZE);
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iowrite32(spare_size,
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denali->flash_reg + LOGICAL_PAGE_SPARE_SIZE);
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iowrite32(0, denali->flash_reg + DEVICE_WIDTH);
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iowrite32(0, denali->flash_reg + DEVICE_WIDTH);
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#if SUPPORT_15BITECC
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#if SUPPORT_15BITECC
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iowrite32(15, denali->flash_reg + ECC_CORRECTION);
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iowrite32(15, denali->flash_reg + ECC_CORRECTION);
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