ARM: mx3: fix build failure concerning MXC_INT_MMC_SDHC2

Commit c074512 (imx-esdhc: update devices registration) renamed
MX35_INT_MMC_SDHC2 to MX35_INT_ESDHC2 which broke expansion of the
MXC_INT_MMC_SDHC2 macro.
As  (the only user of MXC_INT_MMC_SDHC2) is only used on
mx31 use the MX31 prefixed symbol to define its resources.  Moreover to
reduce further confusion mxcsdhc_device0 is fixed accordingly and the MXC
prefixed symbols are removed.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Uwe Kleine-König 2010-10-20 17:44:30 +02:00 committed by Sascha Hauer
parent f1de1613da
commit 662a74b4b2
3 changed files with 8 additions and 11 deletions

View File

@ -72,24 +72,24 @@ struct platform_device mxc_w1_master_device = {
#ifdef CONFIG_ARCH_MX31
static struct resource mxcsdhc0_resources[] = {
{
.start = MMC_SDHC1_BASE_ADDR,
.end = MMC_SDHC1_BASE_ADDR + SZ_16K - 1,
.start = MX31_MMC_SDHC1_BASE_ADDR,
.end = MX31_MMC_SDHC1_BASE_ADDR + SZ_16K - 1,
.flags = IORESOURCE_MEM,
}, {
.start = MXC_INT_MMC_SDHC1,
.end = MXC_INT_MMC_SDHC1,
.start = MX31_INT_MMC_SDHC1,
.end = MX31_INT_MMC_SDHC1,
.flags = IORESOURCE_IRQ,
},
};
static struct resource mxcsdhc1_resources[] = {
{
.start = MMC_SDHC2_BASE_ADDR,
.end = MMC_SDHC2_BASE_ADDR + SZ_16K - 1,
.start = MX31_MMC_SDHC2_BASE_ADDR,
.end = MX31_MMC_SDHC2_BASE_ADDR + SZ_16K - 1,
.flags = IORESOURCE_MEM,
}, {
.start = MXC_INT_MMC_SDHC2,
.end = MXC_INT_MMC_SDHC2,
.start = MX31_INT_MMC_SDHC2,
.end = MX31_INT_MMC_SDHC2,
.flags = IORESOURCE_IRQ,
},
};

View File

@ -240,7 +240,6 @@ static inline void mx31_setup_weimcs(size_t cs,
#define MPEG4_ENC_BASE_ADDR MX31_MPEG4_ENC_BASE_ADDR
#define MXC_INT_MPEG4_ENCODER MX31_INT_MPEG4_ENCODER
#define MXC_INT_FIRI MX31_INT_FIRI
#define MXC_INT_MMC_SDHC1 MX31_INT_MMC_SDHC1
#define MXC_INT_MBX MX31_INT_MBX
#define MXC_INT_CSPI3 MX31_INT_CSPI3
#define MXC_INT_SIM2 MX31_INT_SIM2

View File

@ -197,8 +197,6 @@
/* these should go away */
#define MXC_FEC_BASE_ADDR MX35_FEC_BASE_ADDR
#define MXC_INT_OWIRE MX35_INT_OWIRE
#define MXC_INT_MMC_SDHC2 MX35_INT_MMC_SDHC2
#define MXC_INT_MMC_SDHC3 MX35_INT_MMC_SDHC3
#define MXC_INT_GPU2D MX35_INT_GPU2D
#define MXC_INT_ASRC MX35_INT_ASRC
#define MXC_INT_USBHS MX35_INT_USBHS