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Linux 3.15-rc6 

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Merge tag 'v3.15-rc6' into sched/core, to pick up the latest fixes

Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
Ingo Molnar 2014-05-22 10:28:56 +02:00
parent 842514849a 4b660a7f5c
commit 65c2ce7004
918 changed files with 10050 additions and 5765 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Documentation/ABI/testing/sysfs-bus-pci
View File

@ -117,7 +117,7 @@ Description:
What: /sys/bus/pci/devices/.../vpd
Date: February 2008
Contact: Ben Hutchings <bhutchings@solarflare.com>
Contact: Ben Hutchings <bwh@kernel.org>
Description:
A file named vpd in a device directory will be a
binary file containing the Vital Product Data for the

3
Documentation/devicetree/bindings/arm/arch_timer.txt
View File

@ -19,6 +19,9 @@ to deliver its interrupts via SPIs.
- clock-frequency : The frequency of the main counter, in Hz. Optional.
- always-on : a boolean property. If present, the timer is powered through an
always-on power domain, therefore it never loses context.
Example:
timer {

3
Documentation/devicetree/bindings/ata/apm-xgene.txt
View File

@ -24,6 +24,7 @@ Required properties:
* "sata-phy" for the SATA 6.0Gbps PHY
Optional properties:
- dma-coherent : Present if dma operations are coherent
- status : Shall be "ok" if enabled or "disabled" if disabled.
Default is "ok".
@ -55,6 +56,7 @@ Example:
<0x0 0x1f22e000 0x0 0x1000>,
<0x0 0x1f227000 0x0 0x1000>;
interrupts = <0x0 0x87 0x4>;
dma-coherent;
status = "ok";
clocks = <&sataclk 0>;
phys = <&phy2 0>;
@ -69,6 +71,7 @@ Example:
<0x0 0x1f23e000 0x0 0x1000>,
<0x0 0x1f237000 0x0 0x1000>;
interrupts = <0x0 0x88 0x4>;
dma-coherent;
status = "ok";
clocks = <&sataclk 0>;
phys = <&phy3 0>;

2
Documentation/devicetree/bindings/clock/at91-clock.txt
View File

@ -62,7 +62,7 @@ Required properties for PMC node:
- interrupt-controller : tell that the PMC is an interrupt controller.
- #interrupt-cells : must be set to 1. The first cell encodes the interrupt id,
and reflect the bit position in the PMC_ER/DR/SR registers.
You can use the dt macros defined in dt-bindings/clk/at91.h.
You can use the dt macros defined in dt-bindings/clock/at91.h.
0 (AT91_PMC_MOSCS) -> main oscillator ready
1 (AT91_PMC_LOCKA) -> PLL A ready
2 (AT91_PMC_LOCKB) -> PLL B ready

2
Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
View File

@ -43,7 +43,7 @@ Example
clock-output-names =
"tpu0", "mmcif1", "sdhi3", "sdhi2",
"sdhi1", "sdhi0", "mmcif0";
renesas,clock-indices = <
clock-indices = <
R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3
R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0
R8A7790_CLK_MMCIF0

4
Documentation/devicetree/bindings/dma/ti-edma.txt
View File

@ -29,6 +29,6 @@ edma: edma@49000000 {
dma-channels = <64>;
ti,edma-regions = <4>;
ti,edma-slots = <256>;
ti,edma-xbar-event-map = <1 12
2 13>;
ti,edma-xbar-event-map = /bits/ 16 <1 12
2 13>;
};

12
Documentation/devicetree/bindings/net/arc_emac.txt
View File

@ -4,11 +4,15 @@ Required properties:
- compatible: Should be "snps,arc-emac"
- reg: Address and length of the register set for the device
- interrupts: Should contain the EMAC interrupts
- clock-frequency: CPU frequency. It is needed to calculate and set polling
period of EMAC.
- max-speed: see ethernet.txt file in the same directory.
- phy: see ethernet.txt file in the same directory.
Clock handling:
The clock frequency is needed to calculate and set polling period of EMAC.
It must be provided by one of:
- clock-frequency: CPU frequency.
- clocks: reference to the clock supplying the EMAC.
Child nodes of the driver are the individual PHY devices connected to the
MDIO bus. They must have a "reg" property given the PHY address on the MDIO bus.
@ -19,7 +23,11 @@ Examples:
reg = <0xc0fc2000 0x3c>;
interrupts = <6>;
mac-address = [ 00 11 22 33 44 55 ];
clock-frequency = <80000000>;
/* or */
clocks = <&emac_clock>;
max-speed = <100>;
phy = <&phy0>;

2
Documentation/devicetree/bindings/net/socfpga-dwmac.txt
View File

@ -23,5 +23,5 @@ gmac0: ethernet@ff700000 {
interrupt-names = "macirq";
mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
clocks = <&emac_0_clk>;
clocks-names = "stmmaceth";
clock-names = "stmmaceth";
};

2
Documentation/devicetree/bindings/net/stmmac.txt
View File

@ -33,7 +33,7 @@ Optional properties:
- max-frame-size: See ethernet.txt file in the same directory
- clocks: If present, the first clock should be the GMAC main clock,
further clocks may be specified in derived bindings.
- clocks-names: One name for each entry in the clocks property, the
- clock-names: One name for each entry in the clocks property, the
first one should be "stmmaceth".
Examples:

4
Documentation/devicetree/bindings/pinctrl/pinctrl-st.txt
View File

@ -83,7 +83,7 @@ Example:
reg = <0xfe61f080 0x4>;
reg-names = "irqmux";
interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
interrupts-names = "irqmux";
interrupt-names = "irqmux";
ranges = <0 0xfe610000 0x5000>;
PIO0: gpio@fe610000 {
@ -165,7 +165,7 @@ sdhci0:sdhci@fe810000{
interrupt-parent = <&PIO3>;
#interrupt-cells = <2>;
interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; /* Interrupt line via PIO3-3 */
interrupts-names = "card-detect";
interrupt-names = "card-detect";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mmc>;
};

2
Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt
View File

@ -47,7 +47,7 @@ mcasp0: mcasp0@1d00000 {
reg = <0x100000 0x3000>;
reg-names "mpu";
interrupts = <82>, <83>;
interrupts-names = "tx", "rx";
interrupt-names = "tx", "rx";
op-mode = <0>; /* MCASP_IIS_MODE */
tdm-slots = <2>;
serial-dir = <

6
Documentation/devicetree/bindings/sound/tlv320aic31xx.txt
View File

@ -13,6 +13,9 @@ Required properties:
"ti,tlv320aic3111" - TLV320AIC3111 (stereo speaker amp, MiniDSP)
- reg - <int> - I2C slave address
- HPVDD-supply, SPRVDD-supply, SPLVDD-supply, AVDD-supply, IOVDD-supply,
DVDD-supply : power supplies for the device as covered in
Documentation/devicetree/bindings/regulator/regulator.txt
Optional properties:
@ -24,9 +27,6 @@ Optional properties:
3 or MICBIAS_AVDD - MICBIAS output is connected to AVDD
If this node is not mentioned or if the value is unknown, then
micbias is set to 2.0V.
- HPVDD-supply, SPRVDD-supply, SPLVDD-supply, AVDD-supply, IOVDD-supply,
DVDD-supply : power supplies for the device as covered in
Documentation/devicetree/bindings/regulator/regulator.txt
CODEC output pins:
* HPL

5
Documentation/input/elantech.txt
View File

@ -504,9 +504,12 @@ byte 5:
* reg_10
bit 7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 A
0 0 0 0 R F T A
A: 1 = enable absolute tracking
T: 1 = enable two finger mode auto correct
F: 1 = disable ABS Position Filter
R: 1 = enable real hardware resolution
6.2 Native absolute mode 6 byte packet format
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

8
Documentation/kernel-parameters.txt
View File

@ -2218,10 +2218,10 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
noreplace-smp [X86-32,SMP] Don't replace SMP instructions
with UP alternatives
nordrand [X86] Disable the direct use of the RDRAND
instruction even if it is supported by the
processor. RDRAND is still available to user
space applications.
nordrand [X86] Disable kernel use of the RDRAND and
RDSEED instructions even if they are supported
by the processor. RDRAND and RDSEED are still
available to user space applications.
noresume [SWSUSP] Disables resume and restores original swap
space.

2
Documentation/networking/scaling.txt
View File

@ -429,7 +429,7 @@ RPS and RFS were introduced in kernel 2.6.35. XPS was incorporated into
(therbert@google.com)
Accelerated RFS was introduced in 2.6.35. Original patches were
submitted by Ben Hutchings (bhutchings@solarflare.com)
submitted by Ben Hutchings (bwh@kernel.org)
Authors:
Tom Herbert (therbert@google.com)

51
MAINTAINERS
View File

@ -1893,14 +1893,15 @@ L: netdev@vger.kernel.org
S: Supported
F: drivers/net/ethernet/broadcom/bnx2x/
BROADCOM BCM281XX/BCM11XXX ARM ARCHITECTURE
BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITECTURE
M: Christian Daudt <bcm@fixthebug.org>
M: Matt Porter <mporter@linaro.org>
L: bcm-kernel-feedback-list@broadcom.com
T: git git://git.github.com/broadcom/bcm11351
T: git git://github.com/broadcom/mach-bcm
S: Maintained
F: arch/arm/mach-bcm/
F: arch/arm/boot/dts/bcm113*
F: arch/arm/boot/dts/bcm216*
F: arch/arm/boot/dts/bcm281*
F: arch/arm/configs/bcm_defconfig
F: drivers/mmc/host/sdhci_bcm_kona.c
@ -2245,12 +2246,6 @@ L: linux-usb@vger.kernel.org
S: Maintained
F: drivers/usb/host/ohci-ep93xx.c
CIRRUS LOGIC CS4270 SOUND DRIVER
M: Timur Tabi <timur@tabi.org>
L: alsa-devel@alsa-project.org (moderated for non-subscribers)
S: Odd Fixes
F: sound/soc/codecs/cs4270*
CIRRUS LOGIC AUDIO CODEC DRIVERS
M: Brian Austin <brian.austin@cirrus.com>
M: Paul Handrigan <Paul.Handrigan@cirrus.com>
@ -3485,6 +3480,12 @@ S: Maintained
F: drivers/extcon/
F: Documentation/extcon/
EXYNOS DP DRIVER
M: Jingoo Han <jg1.han@samsung.com>
L: dri-devel@lists.freedesktop.org
S: Maintained
F: drivers/gpu/drm/exynos/exynos_dp*
EXYNOS MIPI DISPLAY DRIVERS
M: Inki Dae <inki.dae@samsung.com>
M: Donghwa Lee <dh09.lee@samsung.com>
@ -3550,7 +3551,7 @@ F: include/scsi/libfcoe.h
F: include/uapi/scsi/fc/
FILE LOCKING (flock() and fcntl()/lockf())
M: Jeff Layton <jlayton@redhat.com>
M: Jeff Layton <jlayton@poochiereds.net>
M: J. Bruce Fields <bfields@fieldses.org>
L: linux-fsdevel@vger.kernel.org
S: Maintained
@ -4812,6 +4813,14 @@ L: linux-kernel@vger.kernel.org
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core
F: kernel/irq/
IRQCHIP DRIVERS
M: Thomas Gleixner <tglx@linutronix.de>
M: Jason Cooper <jason@lakedaemon.net>
L: linux-kernel@vger.kernel.org
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core
T: git git://git.infradead.org/users/jcooper/linux.git irqchip/core
F: drivers/irqchip/
IRQ DOMAINS (IRQ NUMBER MAPPING LIBRARY)
@ -5108,14 +5117,19 @@ F: drivers/s390/kvm/
KERNEL VIRTUAL MACHINE (KVM) FOR ARM
M: Christoffer Dall <christoffer.dall@linaro.org>
M: Marc Zyngier <marc.zyngier@arm.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
L: kvmarm@lists.cs.columbia.edu
W: http://systems.cs.columbia.edu/projects/kvm-arm
S: Supported
F: arch/arm/include/uapi/asm/kvm*
F: arch/arm/include/asm/kvm*
F: arch/arm/kvm/
F: virt/kvm/arm/
F: include/kvm/arm_*
KERNEL VIRTUAL MACHINE FOR ARM64 (KVM/arm64)
M: Christoffer Dall <christoffer.dall@linaro.org>
M: Marc Zyngier <marc.zyngier@arm.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
L: kvmarm@lists.cs.columbia.edu
@ -5479,15 +5493,15 @@ F: Documentation/hwmon/ltc4261
F: drivers/hwmon/ltc4261.c
LTP (Linux Test Project)
M: Shubham Goyal <shubham@linux.vnet.ibm.com>
M: Mike Frysinger <vapier@gentoo.org>
M: Cyril Hrubis <chrubis@suse.cz>
M: Caspar Zhang <caspar@casparzhang.com>
M: Wanlong Gao <gaowanlong@cn.fujitsu.com>
M: Jan Stancek <jstancek@redhat.com>
M: Stanislav Kholmanskikh <stanislav.kholmanskikh@oracle.com>
M: Alexey Kodanev <alexey.kodanev@oracle.com>
L: ltp-list@lists.sourceforge.net (subscribers-only)
W: http://ltp.sourceforge.net/
W: http://linux-test-project.github.io/
T: git git://github.com/linux-test-project/ltp.git
T: git git://ltp.git.sourceforge.net/gitroot/ltp/ltp-dev
S: Maintained
M32R ARCHITECTURE
@ -7277,7 +7291,6 @@ F: drivers/video/aty/aty128fb.c
RALINK RT2X00 WIRELESS LAN DRIVER
P: rt2x00 project
M: Ivo van Doorn <IvDoorn@gmail.com>
M: Gertjan van Wingerde <gwingerde@gmail.com>
M: Helmut Schaa <helmut.schaa@googlemail.com>
L: linux-wireless@vger.kernel.org
L: users@rt2x00.serialmonkey.com (moderated for non-subscribers)
@ -7293,7 +7306,7 @@ F: Documentation/blockdev/ramdisk.txt
F: drivers/block/brd.c
RANDOM NUMBER DRIVER
M: Theodore Ts'o" <tytso@mit.edu>
M: "Theodore Ts'o" <tytso@mit.edu>
S: Maintained
F: drivers/char/random.c
@ -7674,7 +7687,6 @@ F: drivers/clk/samsung/
SAMSUNG SXGBE DRIVERS
M: Byungho An <bh74.an@samsung.com>
M: Girish K S <ks.giri@samsung.com>
M: Siva Reddy Kallam <siva.kallam@samsung.com>
M: Vipul Pandya <vipul.pandya@samsung.com>
S: Supported
L: netdev@vger.kernel.org
@ -9098,6 +9110,9 @@ F: arch/um/os-Linux/drivers/
TURBOCHANNEL SUBSYSTEM
M: "Maciej W. Rozycki" <macro@linux-mips.org>
M: Ralf Baechle <ralf@linux-mips.org>
L: linux-mips@linux-mips.org
Q: http://patchwork.linux-mips.org/project/linux-mips/list/
S: Maintained
F: drivers/tc/
F: include/linux/tc.h
@ -9951,7 +9966,7 @@ F: drivers/net/hamradio/*scc.c
F: drivers/net/hamradio/z8530.h
ZBUD COMPRESSED PAGE ALLOCATOR
M: Seth Jennings <sjenning@linux.vnet.ibm.com>
M: Seth Jennings <sjennings@variantweb.net>
L: linux-mm@kvack.org
S: Maintained
F: mm/zbud.c
@ -9996,7 +10011,7 @@ F: mm/zsmalloc.c
F: include/linux/zsmalloc.h
ZSWAP COMPRESSED SWAP CACHING
M: Seth Jennings <sjenning@linux.vnet.ibm.com>
M: Seth Jennings <sjennings@variantweb.net>
L: linux-mm@kvack.org
S: Maintained
F: mm/zswap.c

2
Makefile
View File

@ -1,7 +1,7 @@
VERSION = 3
PATCHLEVEL = 15
SUBLEVEL = 0
EXTRAVERSION = -rc2
EXTRAVERSION = -rc6
NAME = Shuffling Zombie Juror
# *DOCUMENTATION*

8
arch/arc/kernel/entry.S
View File

@ -614,11 +614,13 @@ resume_user_mode_begin:
resume_kernel_mode:
#ifdef CONFIG_PREEMPT
; This is a must for preempt_schedule_irq()
; Disable Interrupts from this point on
; CONFIG_PREEMPT: This is a must for preempt_schedule_irq()
; !CONFIG_PREEMPT: To ensure restore_regs is intr safe
IRQ_DISABLE r9
#ifdef CONFIG_PREEMPT
; Can't preempt if preemption disabled
GET_CURR_THR_INFO_FROM_SP r10
ld r8, [r10, THREAD_INFO_PREEMPT_COUNT]

17
arch/arm/Kconfig
View File

@ -30,9 +30,9 @@ config ARM
select HAVE_ARCH_SECCOMP_FILTER if (AEABI && !OABI_COMPAT)
select HAVE_ARCH_TRACEHOOK
select HAVE_BPF_JIT
select HAVE_CC_STACKPROTECTOR
select HAVE_CONTEXT_TRACKING
select HAVE_C_RECORDMCOUNT
select HAVE_CC_STACKPROTECTOR
select HAVE_DEBUG_KMEMLEAK
select HAVE_DMA_API_DEBUG
select HAVE_DMA_ATTRS
@ -311,6 +311,7 @@ config ARCH_MULTIPLATFORM
select ARM_HAS_SG_CHAIN
select ARM_PATCH_PHYS_VIRT
select AUTO_ZRELADDR
select CLKSRC_OF
select COMMON_CLK
select GENERIC_CLOCKEVENTS
select MULTI_IRQ_HANDLER
@ -422,8 +423,8 @@ config ARCH_EFM32
bool "Energy Micro efm32"
depends on !MMU
select ARCH_REQUIRE_GPIOLIB
select AUTO_ZRELADDR
select ARM_NVIC
select AUTO_ZRELADDR
select CLKSRC_OF
select COMMON_CLK
select CPU_V7M
@ -511,8 +512,8 @@ config ARCH_IXP4XX
bool "IXP4xx-based"
depends on MMU
select ARCH_HAS_DMA_SET_COHERENT_MASK
select ARCH_SUPPORTS_BIG_ENDIAN
select ARCH_REQUIRE_GPIOLIB
select ARCH_SUPPORTS_BIG_ENDIAN
select CLKSRC_MMIO
select CPU_XSCALE
select DMABOUNCE if PCI
@ -1110,9 +1111,9 @@ config ARM_NR_BANKS
default 8
config IWMMXT
bool "Enable iWMMXt support" if !CPU_PJ4
depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4
bool "Enable iWMMXt support"
depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 || CPU_PJ4B
default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4 || CPU_PJ4B
help
Enable support for iWMMXt context switching at run time if
running on a CPU that supports it.
@ -1575,8 +1576,8 @@ config BIG_LITTLE
config BL_SWITCHER
bool "big.LITTLE switcher support"
depends on BIG_LITTLE && MCPM && HOTPLUG_CPU
select CPU_PM
select ARM_CPU_SUSPEND
select CPU_PM
help
The big.LITTLE "switcher" provides the core functionality to
transparently handle transition between a cluster of A15's
@ -1920,9 +1921,9 @@ config XEN
depends on CPU_V7 && !CPU_V6
depends on !GENERIC_ATOMIC64
depends on MMU
select ARCH_DMA_ADDR_T_64BIT
select ARM_PSCI
select SWIOTLB_XEN
select ARCH_DMA_ADDR_T_64BIT
help
Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.

12
arch/arm/Kconfig.debug
View File

@ -1030,9 +1030,9 @@ config DEBUG_UART_PHYS
default 0x40100000 if DEBUG_PXA_UART1
default 0x42000000 if ARCH_GEMINI
default 0x7c0003f8 if FOOTBRIDGE
default 0x80230000 if DEBUG_PICOXCELL_UART
default 0x80070000 if DEBUG_IMX23_UART
default 0x80074000 if DEBUG_IMX28_UART
default 0x80230000 if DEBUG_PICOXCELL_UART
default 0x808c0000 if ARCH_EP93XX
default 0x90020000 if DEBUG_NSPIRE_CLASSIC_UART || DEBUG_NSPIRE_CX_UART
default 0xb0090000 if DEBUG_VEXPRESS_UART0_CRX
@ -1096,22 +1096,22 @@ config DEBUG_UART_VIRT
default 0xfeb26000 if DEBUG_RK3X_UART1
default 0xfeb30c00 if DEBUG_KEYSTONE_UART0
default 0xfeb31000 if DEBUG_KEYSTONE_UART1
default 0xfec12000 if DEBUG_MVEBU_UART || DEBUG_MVEBU_UART_ALTERNATE
default 0xfed60000 if DEBUG_RK29_UART0
default 0xfed64000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2
default 0xfed68000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3
default 0xfec02000 if DEBUG_SOCFPGA_UART
default 0xfec12000 if DEBUG_MVEBU_UART || DEBUG_MVEBU_UART_ALTERNATE
default 0xfec20000 if DEBUG_DAVINCI_DMx_UART0
default 0xfed0c000 if DEBUG_DAVINCI_DA8XX_UART1
default 0xfed0d000 if DEBUG_DAVINCI_DA8XX_UART2
default 0xfed12000 if ARCH_KIRKWOOD
default 0xfed60000 if DEBUG_RK29_UART0
default 0xfed64000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2
default 0xfed68000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3
default 0xfedc0000 if ARCH_EP93XX
default 0xfee003f8 if FOOTBRIDGE
default 0xfee20000 if DEBUG_NSPIRE_CLASSIC_UART || DEBUG_NSPIRE_CX_UART
default 0xfef36000 if DEBUG_HIGHBANK_UART
default 0xfee82340 if ARCH_IOP13XX
default 0xfef00000 if ARCH_IXP4XX && !CPU_BIG_ENDIAN
default 0xfef00003 if ARCH_IXP4XX && CPU_BIG_ENDIAN
default 0xfef36000 if DEBUG_HIGHBANK_UART
default 0xfefff700 if ARCH_IOP33X
default 0xff003000 if DEBUG_U300_UART
default DEBUG_UART_PHYS if !MMU

20
arch/arm/boot/dts/Makefile
View File

@ -51,10 +51,9 @@ dtb-$(CONFIG_ARCH_AT91) += sama5d36ek.dtb
dtb-$(CONFIG_ARCH_ATLAS6) += atlas6-evb.dtb
dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
dtb-$(CONFIG_ARCH_BCM_5301X) += bcm4708-netgear-r6250.dtb
dtb-$(CONFIG_ARCH_BCM_MOBILE) += bcm28155-ap.dtb \
bcm21664-garnet.dtb
dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
dtb-$(CONFIG_ARCH_BCM_5301X) += bcm4708-netgear-r6250.dtb
dtb-$(CONFIG_ARCH_BERLIN) += \
berlin2-sony-nsz-gs7.dtb \
berlin2cd-google-chromecast.dtb
@ -246,6 +245,7 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
omap3-sbc-t3730.dtb \
omap3-devkit8000.dtb \
omap3-beagle-xm.dtb \
omap3-beagle-xm-ab.dtb \
omap3-evm.dtb \
omap3-evm-37xx.dtb \
omap3-ldp.dtb \
@ -294,13 +294,6 @@ dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcom-msm8660-surf.dtb \
qcom-msm8960-cdp.dtb \
qcom-apq8074-dragonboard.dtb
dtb-$(CONFIG_ARCH_U8500) += ste-snowball.dtb \
ste-hrefprev60-stuib.dtb \
ste-hrefprev60-tvk.dtb \
ste-hrefv60plus-stuib.dtb \
ste-hrefv60plus-tvk.dtb \
ste-ccu8540.dtb \
ste-ccu9540.dtb
dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb
dtb-$(CONFIG_ARCH_S3C64XX) += s3c6410-mini6410.dtb \
s3c6410-smdk6410.dtb
@ -369,9 +362,16 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
tegra30-cardhu-a04.dtb \
tegra114-dalmore.dtb \
tegra124-venice2.dtb
dtb-$(CONFIG_ARCH_U300) += ste-u300.dtb
dtb-$(CONFIG_ARCH_U8500) += ste-snowball.dtb \
ste-hrefprev60-stuib.dtb \
ste-hrefprev60-tvk.dtb \
ste-hrefv60plus-stuib.dtb \
ste-hrefv60plus-tvk.dtb \
ste-ccu8540.dtb \
ste-ccu9540.dtb
dtb-$(CONFIG_ARCH_VERSATILE) += versatile-ab.dtb \
versatile-pb.dtb
dtb-$(CONFIG_ARCH_U300) += ste-u300.dtb
dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2p-ca5s.dtb \
vexpress-v2p-ca9.dtb \
vexpress-v2p-ca15-tc1.dtb \

4
arch/arm/boot/dts/am335x-bone-common.dtsi
View File

@ -183,7 +183,7 @@
&usb {
status = "okay";
control@44e10000 {
control@44e10620 {
status = "okay";
};
@ -204,7 +204,7 @@
dr_mode = "host";
};
dma-controller@07402000 {
dma-controller@47402000 {
status = "okay";
};
};

8
arch/arm/boot/dts/am335x-evm.dts
View File

@ -301,8 +301,8 @@
am335x_evm_audio_pins: am335x_evm_audio_pins {
pinctrl-single,pins = <
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rx_dv.mcasp1_aclkx */
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_txd3.mcasp1_fsx */
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
>;
@ -331,7 +331,7 @@
&usb {
status = "okay";
control@44e10000 {
control@44e10620 {
status = "okay";
};
@ -352,7 +352,7 @@
dr_mode = "host";
};
dma-controller@07402000 {
dma-controller@47402000 {
status = "okay";
};
};

4
arch/arm/boot/dts/am335x-evmsk.dts
View File

@ -364,7 +364,7 @@
&usb {
status = "okay";
control@44e10000 {
control@44e10620 {
status = "okay";
};
@ -385,7 +385,7 @@
dr_mode = "host";
};
dma-controller@07402000 {
dma-controller@47402000 {
status = "okay";
};
};

5
arch/arm/boot/dts/am335x-igep0033.dtsi
View File

@ -118,7 +118,6 @@
reg = <0 0 0>; /* CS0, offset 0 */
nand-bus-width = <8>;
ti,nand-ecc-opt = "bch8";
gpmc,device-nand = "true";
gpmc,device-width = <1>;
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
@ -202,7 +201,7 @@
&usb {
status = "okay";
control@44e10000 {
control@44e10620 {
status = "okay";
};
@ -223,7 +222,7 @@
dr_mode = "host";
};
dma-controller@07402000 {
dma-controller@47402000 {
status = "okay";
};
};

12
arch/arm/boot/dts/am33xx.dtsi
View File

@ -72,7 +72,7 @@
};
/*
* The soc node represents the soc top level view. It is uses for IPs
* The soc node represents the soc top level view. It is used for IPs
* that are not memory mapped in the MPU view or for the MPU itself.
*/
soc {
@ -94,8 +94,8 @@
/*
* XXX: Use a flat representation of the AM33XX interconnect.
* The real AM33XX interconnect network is quite complex.Since
* that will not bring real advantage to represent that in DT
* The real AM33XX interconnect network is quite complex. Since
* it will not bring real advantage to represent that in DT
* for the moment, just use a fake OCP bus entry to represent
* the whole bus hierarchy.
*/
@ -144,7 +144,7 @@
compatible = "ti,edma3";
ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
reg = <0x49000000 0x10000>,
<0x44e10f90 0x10>;
<0x44e10f90 0x40>;
interrupts = <12 13 14>;
#dma-cells = <1>;
dma-channels = <64>;
@ -802,7 +802,7 @@
<0x46000000 0x400000>;
reg-names = "mpu", "dat";
interrupts = <80>, <81>;
interrupts-names = "tx", "rx";
interrupt-names = "tx", "rx";
status = "disabled";
dmas = <&edma 8>,
<&edma 9>;
@ -816,7 +816,7 @@
<0x46400000 0x400000>;
reg-names = "mpu", "dat";
interrupts = <82>, <83>;
interrupts-names = "tx", "rx";
interrupt-names = "tx", "rx";
status = "disabled";
dmas = <&edma 10>,
<&edma 11>;

16
arch/arm/boot/dts/am3517.dtsi
View File

@ -62,5 +62,21 @@
};
};
&iva {
status = "disabled";
};
&mailbox {
status = "disabled";
};
&mmu_isp {
status = "disabled";
};
&smartreflex_mpu_iva {
status = "disabled";
};
/include/ "am35xx-clocks.dtsi"
/include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi"

4
arch/arm/boot/dts/am4372.dtsi
View File

@ -691,7 +691,7 @@
<0x46000000 0x400000>;
reg-names = "mpu", "dat";
interrupts = <80>, <81>;
interrupts-names = "tx", "rx";
interrupt-names = "tx", "rx";
status = "disabled";
dmas = <&edma 8>,
<&edma 9>;
@ -705,7 +705,7 @@
<0x46400000 0x400000>;
reg-names = "mpu", "dat";
interrupts = <82>, <83>;
interrupts-names = "tx", "rx";
interrupt-names = "tx", "rx";
status = "disabled";
dmas = <&edma 10>,
<&edma 11>;

5
arch/arm/boot/dts/am437x-gp-evm.dts
View File

@ -117,6 +117,11 @@
status = "okay";
};
&gpio5 {
status = "okay";
ti,no-reset-on-init;
};
&mmc1 {
status = "okay";
vmmc-supply = <&vmmcsd_fixed>;

1
arch/arm/boot/dts/armada-370-db.dts
View File

@ -67,6 +67,7 @@
i2c@11000 {
pinctrl-0 = <&i2c0_pins>;
pinctrl-names = "default";
clock-frequency = <100000>;
status = "okay";
audio_codec: audio-codec@4a {
compatible = "cirrus,cs42l51";

1
arch/arm/boot/dts/armada-370-xp.dtsi
View File

@ -230,6 +230,7 @@
#size-cells = <0>;
compatible = "marvell,orion-mdio";
reg = <0x72004 0x4>;
clocks = <&gateclk 4>;
};
eth1: ethernet@74000 {

5
arch/arm/boot/dts/armada-375-db.dts
View File

@ -79,6 +79,11 @@
};
};
sata@a0000 {
status = "okay";
nr-ports = <2>;
};
nand: nand@d0000 {
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";

1
arch/arm/boot/dts/armada-38x.dtsi
View File

@ -336,6 +336,7 @@
#size-cells = <0>;
compatible = "marvell,orion-mdio";
reg = <0x72004 0x4>;
clocks = <&gateclk 4>;
};
coredivclk: clock@e4250 {

2
arch/arm/boot/dts/armada-xp-db.dts
View File

@ -49,7 +49,7 @@
/* Device Bus parameters are required */
/* Read parameters */
devbus,bus-width = <8>;
devbus,bus-width = <16>;
devbus,turn-off-ps = <60000>;
devbus,badr-skew-ps = <0>;
devbus,acc-first-ps = <124000>;

10
arch/arm/boot/dts/armada-xp-gp.dts
View File

@ -59,7 +59,7 @@
/* Device Bus parameters are required */
/* Read parameters */
devbus,bus-width = <8>;
devbus,bus-width = <16>;
devbus,turn-off-ps = <60000>;
devbus,badr-skew-ps = <0>;
devbus,acc-first-ps = <124000>;
@ -146,22 +146,22 @@
ethernet@70000 {
status = "okay";
phy = <&phy0>;
phy-mode = "rgmii-id";
phy-mode = "qsgmii";
};
ethernet@74000 {
status = "okay";
phy = <&phy1>;
phy-mode = "rgmii-id";
phy-mode = "qsgmii";
};
ethernet@30000 {
status = "okay";
phy = <&phy2>;
phy-mode = "rgmii-id";
phy-mode = "qsgmii";
};
ethernet@34000 {
status = "okay";
phy = <&phy3>;
phy-mode = "rgmii-id";
phy-mode = "qsgmii";
};
/* Front-side USB slot */

2
arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
View File

@ -39,7 +39,7 @@
/* Device Bus parameters are required */
/* Read parameters */
devbus,bus-width = <8>;
devbus,bus-width = <16>;
devbus,turn-off-ps = <60000>;
devbus,badr-skew-ps = <0>;
devbus,acc-first-ps = <124000>;

4
arch/arm/boot/dts/at91-sama5d3_xplained.dts
View File

@ -34,7 +34,7 @@
};
spi0: spi@f0004000 {
cs-gpios = <&pioD 13 0>;
cs-gpios = <&pioD 13 0>, <0>, <0>, <&pioD 16 0>;
status = "okay";
};
@ -79,7 +79,7 @@
};
spi1: spi@f8008000 {
cs-gpios = <&pioC 25 0>, <0>, <0>, <&pioD 16 0>;
cs-gpios = <&pioC 25 0>;
status = "okay";
};

2
arch/arm/boot/dts/at91sam9261.dtsi
View File

@ -10,7 +10,7 @@
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clk/at91.h>
#include <dt-bindings/clock/at91.h>
/ {
model = "Atmel AT91SAM9261 family SoC";

2
arch/arm/boot/dts/at91sam9rl.dtsi
View File

@ -8,7 +8,7 @@
#include "skeleton.dtsi"
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/clk/at91.h>
#include <dt-bindings/clock/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>

4
arch/arm/boot/dts/dra7.dtsi
View File

@ -80,7 +80,7 @@
};
/*
* The soc node represents the soc top level view. It is uses for IPs
* The soc node represents the soc top level view. It is used for IPs
* that are not memory mapped in the MPU view or for the MPU itself.
*/
soc {
@ -94,7 +94,7 @@
/*
* XXX: Use a flat representation of the SOC interconnect.
* The real OMAP interconnect network is quite complex.
* Since that will not bring real advantage to represent that in DT for
* Since it will not bring real advantage to represent that in DT for
* the moment, just use a fake OCP bus entry to represent the whole bus
* hierarchy.
*/

2
arch/arm/boot/dts/dra7xx-clocks.dtsi
View File

@ -1640,7 +1640,7 @@
#clock-cells = <0>;
compatible = "ti,mux-clock";
clocks = <&abe_24m_fclk>, <&abe_sys_clk_div>, <&func_24m_clk>, <&atlclkin3_ck>, <&atl_clkin2_ck>, <&atl_clkin1_ck>, <&atl_clkin0_ck>, <&sys_clkin2>, <&ref_clkin0_ck>, <&ref_clkin1_ck>, <&ref_clkin2_ck>, <&ref_clkin3_ck>, <&mlb_clk>, <&mlbp_clk>;
ti,bit-shift = <28>;
ti,bit-shift = <24>;
reg = <0x1860>;
};

1
arch/arm/boot/dts/imx25.dtsi
View File

@ -56,6 +56,7 @@
osc {
compatible = "fsl,imx-osc", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
};

1
arch/arm/boot/dts/imx27-apf27.dts
View File

@ -29,6 +29,7 @@
osc26m {
compatible = "fsl,imx-osc26m", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
};

1
arch/arm/boot/dts/imx27.dtsi
View File

@ -48,6 +48,7 @@
osc26m {
compatible = "fsl,imx-osc26m", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <26000000>;
};
};

4
arch/arm/boot/dts/imx50.dtsi
View File

@ -53,21 +53,25 @@
ckil {
compatible = "fsl,imx-ckil", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
};
ckih1 {
compatible = "fsl,imx-ckih1", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <22579200>;
};
ckih2 {
compatible = "fsl,imx-ckih2", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
osc {
compatible = "fsl,imx-osc", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
};

4
arch/arm/boot/dts/imx51.dtsi
View File

@ -50,21 +50,25 @@
ckil {
compatible = "fsl,imx-ckil", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
};
ckih1 {
compatible = "fsl,imx-ckih1", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
ckih2 {
compatible = "fsl,imx-ckih2", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
osc {
compatible = "fsl,imx-osc", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
};

23
arch/arm/boot/dts/imx53-m53evk.dts
View File

@ -17,7 +17,8 @@
compatible = "denx,imx53-m53evk", "fsl,imx53";
memory {
reg = <0x70000000 0x20000000>;
reg = <0x70000000 0x20000000>,
<0xb0000000 0x20000000>;
};
soc {
@ -193,17 +194,17 @@
irq-trigger = <0x1>;
stmpe_touchscreen {
compatible = "stmpe,ts";
compatible = "st,stmpe-ts";
reg = <0>;
ts,sample-time = <4>;
ts,mod-12b = <1>;
ts,ref-sel = <0>;
ts,adc-freq = <1>;
ts,ave-ctrl = <3>;
ts,touch-det-delay = <3>;
ts,settling = <4>;
ts,fraction-z = <7>;
ts,i-drive = <1>;
st,sample-time = <4>;
st,mod-12b = <1>;
st,ref-sel = <0>;
st,adc-freq = <1>;
st,ave-ctrl = <3>;
st,touch-det-delay = <3>;
st,settling = <4>;
st,fraction-z = <7>;
st,i-drive = <1>;
};
};

2
arch/arm/boot/dts/imx53-mba53.dts
View File

@ -244,7 +244,7 @@
&tve {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_vga_sync_1>;
i2c-ddc-bus = <&i2c3>;
ddc-i2c-bus = <&i2c3>;
fsl,tve-mode = "vga";
fsl,hsync-pin = <4>;
fsl,vsync-pin = <6>;

3
arch/arm/boot/dts/imx53-qsb-common.dtsi
View File

@ -14,7 +14,8 @@
/ {
memory {
reg = <0x70000000 0x40000000>;
reg = <0x70000000 0x20000000>,
<0xb0000000 0x20000000>;
};
display0: display@di0 {

11
arch/arm/boot/dts/imx53-tx53-x03x.dts
View File

@ -25,12 +25,17 @@
soc {
display: display@di0 {
compatible = "fsl,imx-parallel-display";
crtcs = <&ipu 0>;
interface-pix-fmt = "rgb24";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgb24_vga1>;
status = "okay";
port {
display0_in: endpoint {
remote-endpoint = <&ipu_di0_disp0>;
};
};
display-timings {
VGA {
clock-frequency = <25200000>;
@ -293,6 +298,10 @@
};
};
&ipu_di0_disp0 {
remote-endpoint = <&display0_in>;
};
&kpp {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_kpp>;

8
arch/arm/boot/dts/imx53.dtsi
View File

@ -70,21 +70,25 @@
ckil {
compatible = "fsl,imx-ckil", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
};
ckih1 {
compatible = "fsl,imx-ckih1", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <22579200>;
};
ckih2 {
compatible = "fsl,imx-ckih2", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
osc {
compatible = "fsl,imx-osc", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
};
@ -111,7 +115,7 @@
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx53-ipu";
reg = <0x18000000 0x080000000>;
reg = <0x18000000 0x08000000>;
interrupts = <11 10>;
clocks = <&clks IMX5_CLK_IPU_GATE>,
<&clks IMX5_CLK_IPU_DI0_GATE>,
@ -430,7 +434,7 @@
port {
lvds1_in: endpoint {
remote-endpoint = <&ipu_di0_lvds0>;
remote-endpoint = <&ipu_di1_lvds1>;
};
};
};

48
arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
View File

@ -19,7 +19,10 @@
compatible = "dmo,imx6q-edmqmx6", "fsl,imx6q";
aliases {
gpio7 = &stmpe_gpio;
gpio7 = &stmpe_gpio1;
gpio8 = &stmpe_gpio2;
stmpe-i2c0 = &stmpe1;
stmpe-i2c1 = &stmpe2;
};
memory {
@ -40,13 +43,15 @@
regulator-always-on;
};
reg_usb_otg_vbus: regulator@1 {
reg_usb_otg_switch: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "usb_otg_vbus";
regulator-name = "usb_otg_switch";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio7 12 0>;
regulator-boot-on;
regulator-always-on;
};
reg_usb_host1: regulator@2 {
@ -65,23 +70,23 @@
led-blue {
label = "blue";
gpios = <&stmpe_gpio 8 GPIO_ACTIVE_HIGH>;
gpios = <&stmpe_gpio1 8 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
led-green {
label = "green";
gpios = <&stmpe_gpio 9 GPIO_ACTIVE_HIGH>;
gpios = <&stmpe_gpio1 9 GPIO_ACTIVE_HIGH>;
};
led-pink {
label = "pink";
gpios = <&stmpe_gpio 10 GPIO_ACTIVE_HIGH>;
gpios = <&stmpe_gpio1 10 GPIO_ACTIVE_HIGH>;
};
led-red {
label = "red";
gpios = <&stmpe_gpio 11 GPIO_ACTIVE_HIGH>;
gpios = <&stmpe_gpio1 11 GPIO_ACTIVE_HIGH>;
};
};
};
@ -99,7 +104,8 @@
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2
&pinctrl_stmpe>;
&pinctrl_stmpe1
&pinctrl_stmpe2>;
status = "okay";
pmic: pfuze100@08 {
@ -205,13 +211,25 @@
};
};
stmpe: stmpe1601@40 {
stmpe1: stmpe1601@40 {
compatible = "st,stmpe1601";
reg = <0x40>;
interrupts = <30 0>;
interrupt-parent = <&gpio3>;
stmpe_gpio: stmpe_gpio {
stmpe_gpio1: stmpe_gpio {
#gpio-cells = <2>;
compatible = "st,stmpe-gpio";
};
};
stmpe2: stmpe1601@44 {
compatible = "st,stmpe1601";
reg = <0x44>;
interrupts = <2 0>;
interrupt-parent = <&gpio5>;
stmpe_gpio2: stmpe_gpio {
#gpio-cells = <2>;
compatible = "st,stmpe-gpio";
};
@ -273,10 +291,14 @@
>;
};
pinctrl_stmpe: stmpegrp {
pinctrl_stmpe1: stmpe1grp {
fsl,pins = <MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x80000000>;
};
pinctrl_stmpe2: stmpe2grp {
fsl,pins = <MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
@ -293,7 +315,7 @@
pinctrl_usbotg: usbotggrp {
fsl,pins = <
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
>;
};
@ -344,11 +366,11 @@
&usbh1 {
vbus-supply = <&reg_usb_host1>;
disable-over-current;
dr_mode = "host";
status = "okay";
};
&usbotg {
vbus-supply = <&reg_usb_otg_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg>;
disable-over-current;

3
arch/arm/boot/dts/imx6q-gw5400-a.dts
View File

@ -487,9 +487,6 @@
&ldb {
status = "okay";
lvds-channel@0 {
crtcs = <&ipu1 0>, <&ipu1 1>, <&ipu2 0>, <&ipu2 1>;
};
};
&pcie {

3
arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
View File

@ -436,9 +436,6 @@
&ldb {
status = "okay";
lvds-channel@0 {
crtcs = <&ipu1 0>, <&ipu1 1>;
};
};
&pcie {

22
arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi
View File

@ -26,25 +26,25 @@
/* GPIO16 -> AR8035 25MHz */
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0xc0000000
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x80000000
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
/* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1
/* AR8035 pin strapping: IO voltage: pull up */
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
/* AR8035 pin strapping: PHYADDR#0: pull down */
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x130b0
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x13030
/* AR8035 pin strapping: PHYADDR#1: pull down */
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x130b0
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x13030
/* AR8035 pin strapping: MODE#1: pull up */
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
/* AR8035 pin strapping: MODE#3: pull up */
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
/* AR8035 pin strapping: MODE#0: pull down */
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x130b0
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x13030
/*
* As the RMII pins are also connected to RGMII

13
arch/arm/boot/dts/imx6qdl.dtsi
View File

@ -10,6 +10,8 @@
* http://www.gnu.org/copyleft/gpl.html
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton.dtsi"
/ {
@ -46,8 +48,6 @@
intc: interrupt-controller@00a01000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
#address-cells = <1>;
#size-cells = <1>;
interrupt-controller;
reg = <0x00a01000 0x1000>,
<0x00a00100 0x100>;
@ -59,16 +59,19 @@
ckil {
compatible = "fsl,imx-ckil", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
};
ckih1 {
compatible = "fsl,imx-ckih1", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
osc {
compatible = "fsl,imx-osc", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
};
@ -138,6 +141,12 @@
0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */
num-lanes = <1>;
interrupts = <0 123 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0 0 0 1 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 2 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 3 &intc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 4 &intc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 189>, <&clks 187>, <&clks 206>, <&clks 144>;
clock-names = "pcie_ref_125m", "sata_ref_100m", "lvds_gate", "pcie_axi";
status = "disabled";

1
arch/arm/boot/dts/imx6sl-evk.dts
View File

@ -282,6 +282,7 @@
MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO 0x100b1
MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x100b1
MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x100b1
MX6SL_PAD_ECSPI1_SS0__GPIO4_IO11 0x80000000
>;
};

4
arch/arm/boot/dts/imx6sl.dtsi
View File

@ -68,8 +68,6 @@
intc: interrupt-controller@00a01000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
#address-cells = <1>;
#size-cells = <1>;
interrupt-controller;
reg = <0x00a01000 0x1000>,
<0x00a00100 0x100>;
@ -81,11 +79,13 @@
ckil {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
};
osc {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
};

2
arch/arm/boot/dts/kirkwood-b3.dts
View File

@ -75,7 +75,7 @@
m25p16@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "m25p16";
compatible = "st,m25p16";
reg = <0>;
spi-max-frequency = <40000000>;
mode = <0>;

2
arch/arm/boot/dts/kirkwood-cloudbox.dts
View File

@ -46,7 +46,7 @@
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "mx25l4005a";
compatible = "mxicy,mx25l4005a";
reg = <0>;
spi-max-frequency = <20000000>;
mode = <0>;

2
arch/arm/boot/dts/kirkwood-dreamplug.dts
View File

@ -43,7 +43,7 @@
m25p40@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "mx25l1606e";
compatible = "mxicy,mx25l1606e";
reg = <0>;
spi-max-frequency = <50000000>;
mode = <0>;

2
arch/arm/boot/dts/kirkwood-laplug.dts
View File

@ -48,7 +48,7 @@
status = "okay";
eeprom@50 {
compatible = "at,24c04";
compatible = "atmel,24c04";
pagesize = <16>;
reg = <0x50>;
};

20
arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts
View File

@ -30,6 +30,16 @@
bootargs = "console=ttyS0,115200n8 earlyprintk";
};
mbus {
pcie-controller {
status = "okay";
pcie@1,0 {
status = "okay";
};
};
};
ocp@f1000000 {
pinctrl@10000 {
pmx_usb_led: pmx-usb-led {
@ -56,7 +66,7 @@
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "mx25l12805d";
compatible = "mxicy,mx25l12805d";
reg = <0>;
spi-max-frequency = <50000000>;
mode = <0>;
@ -73,14 +83,6 @@
ehci@50000 {
status = "okay";
};
pcie-controller {
status = "okay";
pcie@1,0 {
status = "okay";
};
};
};
gpio-leds {

4
arch/arm/boot/dts/kirkwood-ns2-common.dtsi
View File

@ -32,7 +32,7 @@
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "mx25l4005a";
compatible = "mxicy,mx25l4005a";
reg = <0>;
spi-max-frequency = <20000000>;
mode = <0>;
@ -50,7 +50,7 @@
status = "okay";
eeprom@50 {
compatible = "at,24c04";
compatible = "atmel,24c04";
pagesize = <16>;
reg = <0x50>;
};

18
arch/arm/boot/dts/kirkwood-nsa310-common.dtsi
View File

@ -4,6 +4,16 @@
/ {
model = "ZyXEL NSA310";
mbus {
pcie-controller {
status = "okay";
pcie@1,0 {
status = "okay";
};
};
};
ocp@f1000000 {
pinctrl: pinctrl@10000 {
@ -26,14 +36,6 @@
status = "okay";
nr-ports = <2>;
};
pcie-controller {
status = "okay";
pcie@1,0 {
status = "okay";
};
};
};
gpio_poweroff {

2
arch/arm/boot/dts/kirkwood-nsa310.dts
View File

@ -104,7 +104,7 @@
status = "okay";
adt7476: adt7476a@2e {
compatible = "adt7476";
compatible = "adi,adt7476";
reg = <0x2e>;
};
};

2
arch/arm/boot/dts/kirkwood-nsa310a.dts
View File

@ -94,7 +94,7 @@
status = "okay";
lm85: lm85@2e {
compatible = "lm85";
compatible = "national,lm85";
reg = <0x2e>;
};
};

2
arch/arm/boot/dts/kirkwood-openblocks_a6.dts
View File

@ -40,7 +40,7 @@
pinctrl-names = "default";
s35390a: s35390a@30 {
compatible = "s35390a";
compatible = "sii,s35390a";
reg = <0x30>;
};
};

2
arch/arm/boot/dts/kirkwood-openblocks_a7.dts
View File

@ -52,7 +52,7 @@
pinctrl-names = "default";
s24c02: s24c02@50 {
compatible = "24c02";
compatible = "atmel,24c02";
reg = <0x50>;
};
};

5
arch/arm/boot/dts/kirkwood-t5325.dts
View File

@ -127,11 +127,6 @@
i2c@11000 {
status = "okay";
alc5621: alc5621@1a {
compatible = "realtek,alc5621";
reg = <0x1a>;
};
};
serial@12000 {

19
arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
View File

@ -24,11 +24,10 @@
compatible = "smsc,lan9221", "smsc,lan9115";
bank-width = <2>;
gpmc,mux-add-data;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <186>;
gpmc,cs-wr-off-ns = <186>;
gpmc,adv-on-ns = <12>;
gpmc,adv-rd-off-ns = <48>;
gpmc,cs-on-ns = <1>;
gpmc,cs-rd-off-ns = <180>;
gpmc,cs-wr-off-ns = <180>;
gpmc,adv-rd-off-ns = <18>;
gpmc,adv-wr-off-ns = <48>;
gpmc,oe-on-ns = <54>;
gpmc,oe-off-ns = <168>;
@ -36,12 +35,10 @@
gpmc,we-off-ns = <168>;
gpmc,rd-cycle-ns = <186>;
gpmc,wr-cycle-ns = <186>;
gpmc,access-ns = <114>;
gpmc,page-burst-access-ns = <6>;
gpmc,bus-turnaround-ns = <12>;
gpmc,cycle2cycle-delay-ns = <18>;
gpmc,wr-data-mux-bus-ns = <90>;
gpmc,wr-access-ns = <186>;
gpmc,access-ns = <144>;
gpmc,page-burst-access-ns = <24>;
gpmc,bus-turnaround-ns = <90>;
gpmc,cycle2cycle-delay-ns = <90>;
gpmc,cycle2cycle-samecsen;
gpmc,cycle2cycle-diffcsen;
vddvario-supply = <&vddvario>;

7
arch/arm/boot/dts/omap2.dtsi
View File

@ -71,13 +71,6 @@
interrupts = <58>;
};
mailbox: mailbox@48094000 {
compatible = "ti,omap2-mailbox";
ti,hwmods = "mailbox";
reg = <0x48094000 0x200>;
interrupts = <26>;
};
intc: interrupt-controller@1 {
compatible = "ti,omap2-intc";
interrupt-controller;

8
arch/arm/boot/dts/omap2420.dtsi
View File

@ -125,6 +125,14 @@
dma-names = "tx", "rx";
};
mailbox: mailbox@48094000 {
compatible = "ti,omap2-mailbox";
reg = <0x48094000 0x200>;
interrupts = <26>, <34>;
interrupt-names = "dsp", "iva";
ti,hwmods = "mailbox";
};
timer1: timer@48028000 {
compatible = "ti,omap2420-timer";
reg = <0x48028000 0x400>;

7
arch/arm/boot/dts/omap2430.dtsi
View File

@ -216,6 +216,13 @@
dma-names = "tx", "rx";
};
mailbox: mailbox@48094000 {
compatible = "ti,omap2-mailbox";
reg = <0x48094000 0x200>;
interrupts = <26>;
ti,hwmods = "mailbox";
};
timer1: timer@49018000 {
compatible = "ti,omap2420-timer";
reg = <0x49018000 0x400>;

16
arch/arm/boot/dts/omap3-beagle-xm-ab.dts Normal file
View File

@ -0,0 +1,16 @@
/*
* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include "omap3-beagle-xm.dts"
/ {
/* HS USB Port 2 Power enable was inverted with the xM C */
hsusb2_power: hsusb2_power_reg {
enable-active-high;
};
};

66
arch/arm/boot/dts/omap3-cm-t3x30.dtsi
View File

@ -10,18 +10,6 @@
cpu0-supply = <&vcc>;
};
};
vddvario: regulator-vddvario {
compatible = "regulator-fixed";
regulator-name = "vddvario";
regulator-always-on;
};
vdd33a: regulator-vdd33a {
compatible = "regulator-fixed";
regulator-name = "vdd33a";
regulator-always-on;
};
};
&omap3_pmx_core {
@ -35,58 +23,34 @@
hsusb0_pins: pinmux_hsusb0_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */
OMAP3_CORE1_IOPAD(0x21a2, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */
OMAP3_CORE1_IOPAD(0x21a4, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */
OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */
OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data0.hsusb2_data0 */
OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */
OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */
OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data3 */
OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data4 */
OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data5 */
OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data6 */
OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */
OMAP3_CORE1_IOPAD(0x21a2, PIN_OUTPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */
OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */
OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */
OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */
OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data0.hsusb2_data0 */
OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */
OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */
OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data3 */
OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data4 */
OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data5 */
OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data6 */
OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */
>;
};
};
#include "omap-gpmc-smsc911x.dtsi"
&gpmc {
ranges = <5 0 0x2c000000 0x01000000>;
smsc1: ethernet@5,0 {
smsc1: ethernet@gpmc {
compatible = "smsc,lan9221", "smsc,lan9115";
pinctrl-names = "default";
pinctrl-0 = <&smsc1_pins>;
interrupt-parent = <&gpio6>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
reg = <5 0 0xff>;
bank-width = <2>;
gpmc,mux-add-data;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <186>;
gpmc,cs-wr-off-ns = <186>;
gpmc,adv-on-ns = <12>;
gpmc,adv-rd-off-ns = <48>;
gpmc,adv-wr-off-ns = <48>;
gpmc,oe-on-ns = <54>;
gpmc,oe-off-ns = <168>;
gpmc,we-on-ns = <54>;
gpmc,we-off-ns = <168>;
gpmc,rd-cycle-ns = <186>;
gpmc,wr-cycle-ns = <186>;
gpmc,access-ns = <114>;
gpmc,page-burst-access-ns = <6>;
gpmc,bus-turnaround-ns = <12>;
gpmc,cycle2cycle-delay-ns = <18>;
gpmc,wr-data-mux-bus-ns = <90>;
gpmc,wr-access-ns = <186>;
gpmc,cycle2cycle-samecsen;
gpmc,cycle2cycle-diffcsen;
vddvario-supply = <&vddvario>;
vdd33a-supply = <&vdd33a>;
reg-io-width = <4>;
smsc,save-mac-address;
};
};

1
arch/arm/boot/dts/omap3-devkit8000.dts
View File

@ -112,7 +112,6 @@
reg = <0 0 0>; /* CS0, offset 0 */
nand-bus-width = <16>;
gpmc,device-nand;
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <44>;

2
arch/arm/boot/dts/omap3-igep.dtsi
View File

@ -107,7 +107,7 @@
>;
};
smsc911x_pins: pinmux_smsc911x_pins {
smsc9221_pins: pinmux_smsc9221_pins {
pinctrl-single,pins = <
0x1a2 (PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */
>;

4
arch/arm/boot/dts/omap3-igep0020.dts
View File

@ -10,7 +10,7 @@
*/
#include "omap3-igep.dtsi"
#include "omap-gpmc-smsc911x.dtsi"
#include "omap-gpmc-smsc9221.dtsi"
/ {
model = "IGEPv2 (TI OMAP AM/DM37x)";
@ -248,7 +248,7 @@
ethernet@gpmc {
pinctrl-names = "default";
pinctrl-0 = <&smsc911x_pins>;
pinctrl-0 = <&smsc9221_pins>;
reg = <5 0 0xff>;
interrupt-parent = <&gpio6>;
interrupts = <16 IRQ_TYPE_LEVEL_LOW>;

1
arch/arm/boot/dts/omap3-lilly-a83x.dtsi
View File

@ -368,7 +368,6 @@
/* no elm on omap3 */
gpmc,mux-add-data = <0>;
gpmc,device-nand;
gpmc,device-width = <2>;
gpmc,wait-pin = <0>;
gpmc,wait-monitoring-ns = <0>;

37
arch/arm/boot/dts/omap3-sb-t35.dtsi
View File

@ -2,20 +2,6 @@
* Common support for CompuLab SB-T35 used on SBC-T3530, SBC-T3517 and SBC-T3730
*/
/ {
vddvario_sb_t35: regulator-vddvario-sb-t35 {
compatible = "regulator-fixed";
regulator-name = "vddvario";
regulator-always-on;
};
vdd33a_sb_t35: regulator-vdd33a-sb-t35 {
compatible = "regulator-fixed";
regulator-name = "vdd33a";
regulator-always-on;
};
};
&omap3_pmx_core {
smsc2_pins: pinmux_smsc2_pins {
pinctrl-single,pins = <
@ -37,11 +23,10 @@
reg = <4 0 0xff>;
bank-width = <2>;
gpmc,mux-add-data;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <186>;
gpmc,cs-wr-off-ns = <186>;
gpmc,adv-on-ns = <12>;
gpmc,adv-rd-off-ns = <48>;
gpmc,cs-on-ns = <1>;
gpmc,cs-rd-off-ns = <180>;
gpmc,cs-wr-off-ns = <180>;
gpmc,adv-rd-off-ns = <18>;
gpmc,adv-wr-off-ns = <48>;
gpmc,oe-on-ns = <54>;
gpmc,oe-off-ns = <168>;
@ -49,16 +34,14 @@
gpmc,we-off-ns = <168>;
gpmc,rd-cycle-ns = <186>;
gpmc,wr-cycle-ns = <186>;
gpmc,access-ns = <114>;
gpmc,page-burst-access-ns = <6>;
gpmc,bus-turnaround-ns = <12>;
gpmc,cycle2cycle-delay-ns = <18>;
gpmc,wr-data-mux-bus-ns = <90>;
gpmc,wr-access-ns = <186>;
gpmc,access-ns = <144>;
gpmc,page-burst-access-ns = <24>;
gpmc,bus-turnaround-ns = <90>;
gpmc,cycle2cycle-delay-ns = <90>;
gpmc,cycle2cycle-samecsen;
gpmc,cycle2cycle-diffcsen;
vddvario-supply = <&vddvario_sb_t35>;
vdd33a-supply = <&vdd33a_sb_t35>;
vddvario-supply = <&vddvario>;
vdd33a-supply = <&vdd33a>;
reg-io-width = <4>;
smsc,save-mac-address;
};

13
arch/arm/boot/dts/omap3-sbc-t3517.dts
View File

@ -8,6 +8,19 @@
/ {
model = "CompuLab SBC-T3517 with CM-T3517";
compatible = "compulab,omap3-sbc-t3517", "compulab,omap3-cm-t3517", "ti,am3517", "ti,omap3";
/* Only one GPMC smsc9220 on SBC-T3517, CM-T3517 uses am35x Ethernet */
vddvario: regulator-vddvario-sb-t35 {
compatible = "regulator-fixed";
regulator-name = "vddvario";
regulator-always-on;
};
vdd33a: regulator-vdd33a-sb-t35 {
compatible = "regulator-fixed";
regulator-name = "vdd33a";
regulator-always-on;
};
};
&omap3_pmx_core {

4
arch/arm/boot/dts/omap3.dtsi
View File

@ -61,7 +61,7 @@
ti,hwmods = "mpu";
};
iva {
iva: iva {
compatible = "ti,iva2.2";
ti,hwmods = "iva";
@ -74,7 +74,7 @@
/*
* XXX: Use a flat representation of the OMAP3 interconnect.
* The real OMAP interconnect network is quite complex.
* Since that will not bring real advantage to represent that in DT for
* Since it will not bring real advantage to represent that in DT for
* the moment, just use a fake OCP bus entry to represent the whole bus
* hierarchy.
*/

4
arch/arm/boot/dts/omap4.dtsi
View File

@ -72,7 +72,7 @@
};
/*
* The soc node represents the soc top level view. It is uses for IPs
* The soc node represents the soc top level view. It is used for IPs
* that are not memory mapped in the MPU view or for the MPU itself.
*/
soc {
@ -96,7 +96,7 @@
/*
* XXX: Use a flat representation of the OMAP4 interconnect.
* The real OMAP interconnect network is quite complex.
* Since that will not bring real advantage to represent that in DT for
* Since it will not bring real advantage to represent that in DT for
* the moment, just use a fake OCP bus entry to represent the whole bus
* hierarchy.
*/

17
arch/arm/boot/dts/omap5.dtsi
View File

@ -93,7 +93,7 @@
};
/*
* The soc node represents the soc top level view. It is uses for IPs
* The soc node represents the soc top level view. It is used for IPs
* that are not memory mapped in the MPU view or for the MPU itself.
*/
soc {
@ -107,7 +107,7 @@
/*
* XXX: Use a flat representation of the OMAP3 interconnect.
* The real OMAP interconnect network is quite complex.
* Since that will not bring real advantage to represent that in DT for
* Since it will not bring real advantage to represent that in DT for
* the moment, just use a fake OCP bus entry to represent the whole bus
* hierarchy.
*/
@ -630,6 +630,13 @@
status = "disabled";
};
mailbox: mailbox@4a0f4000 {
compatible = "ti,omap4-mailbox";
reg = <0x4a0f4000 0x200>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mailbox";
};
timer1: timer@4ae18000 {
compatible = "ti,omap5430-timer";
reg = <0x4ae18000 0x80>;
@ -813,6 +820,12 @@
<0x4a084c00 0x40>;
reg-names = "phy_rx", "phy_tx", "pll_ctrl";
ctrl-module = <&omap_control_usb3phy>;
clocks = <&usb_phy_cm_clk32k>,
<&sys_clkin>,
<&usb_otg_ss_refclk960m>;
clock-names = "wkupclk",
"sysclk",
"refclk";
#phy-cells = <0>;
};
};

1
arch/arm/boot/dts/r8a7740.dtsi
View File

@ -28,7 +28,6 @@
gic: interrupt-controller@c2800000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
#address-cells = <1>;
interrupt-controller;
reg = <0xc2800000 0x1000>,
<0xc2000000 0x1000>;

4
arch/arm/boot/dts/r8a7790-lager.dts
View File

@ -141,12 +141,12 @@
};
sdhi0_pins: sd0 {
renesas,gpios = "sdhi0_data4", "sdhi0_ctrl";
renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
renesas,function = "sdhi0";
};
sdhi2_pins: sd2 {
renesas,gpios = "sdhi2_data4", "sdhi2_ctrl";
renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
renesas,function = "sdhi2";
};

6
arch/arm/boot/dts/r8a7791-koelsch.dts
View File

@ -230,17 +230,17 @@
};
sdhi0_pins: sd0 {
renesas,gpios = "sdhi0_data4", "sdhi0_ctrl";
renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
renesas,function = "sdhi0";
};
sdhi1_pins: sd1 {
renesas,gpios = "sdhi1_data4", "sdhi1_ctrl";
renesas,groups = "sdhi1_data4", "sdhi1_ctrl";
renesas,function = "sdhi1";
};
sdhi2_pins: sd2 {
renesas,gpios = "sdhi2_data4", "sdhi2_ctrl";
renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
renesas,function = "sdhi2";
};

8
arch/arm/boot/dts/rk3188.dtsi
View File

@ -149,7 +149,7 @@
uart0 {
uart0_xfer: uart0-xfer {
rockchip,pins = <RK_GPIO1 0 RK_FUNC_1 &pcfg_pull_none>,
rockchip,pins = <RK_GPIO1 0 RK_FUNC_1 &pcfg_pull_up>,
<RK_GPIO1 1 RK_FUNC_1 &pcfg_pull_none>;
};
@ -164,7 +164,7 @@
uart1 {
uart1_xfer: uart1-xfer {
rockchip,pins = <RK_GPIO1 4 RK_FUNC_1 &pcfg_pull_none>,
rockchip,pins = <RK_GPIO1 4 RK_FUNC_1 &pcfg_pull_up>,
<RK_GPIO1 5 RK_FUNC_1 &pcfg_pull_none>;
};
@ -179,7 +179,7 @@
uart2 {
uart2_xfer: uart2-xfer {
rockchip,pins = <RK_GPIO1 8 RK_FUNC_1 &pcfg_pull_none>,
rockchip,pins = <RK_GPIO1 8 RK_FUNC_1 &pcfg_pull_up>,
<RK_GPIO1 9 RK_FUNC_1 &pcfg_pull_none>;
};
/* no rts / cts for uart2 */
@ -187,7 +187,7 @@
uart3 {
uart3_xfer: uart3-xfer {
rockchip,pins = <RK_GPIO1 10 RK_FUNC_1 &pcfg_pull_none>,
rockchip,pins = <RK_GPIO1 10 RK_FUNC_1 &pcfg_pull_up>,
<RK_GPIO1 11 RK_FUNC_1 &pcfg_pull_none>;
};

2
arch/arm/boot/dts/sama5d3.dtsi
View File

@ -13,7 +13,7 @@
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clk/at91.h>
#include <dt-bindings/clock/at91.h>
/ {
model = "Atmel SAMA5D3 family SoC";

2
arch/arm/boot/dts/sama5d3_mci2.dtsi
View File

@ -9,7 +9,7 @@
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/clk/at91.h>
#include <dt-bindings/clock/at91.h>
/ {
ahb {

2
arch/arm/boot/dts/sama5d3_tcb1.dtsi
View File

@ -9,7 +9,7 @@
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/clk/at91.h>
#include <dt-bindings/clock/at91.h>
/ {
aliases {

2
arch/arm/boot/dts/sama5d3_uart.dtsi
View File

@ -9,7 +9,7 @@
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/clk/at91.h>
#include <dt-bindings/clock/at91.h>
/ {
aliases {

1
arch/arm/boot/dts/sh73a0.dtsi
View File

@ -34,7 +34,6 @@
gic: interrupt-controller@f0001000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
#address-cells = <1>;
interrupt-controller;
reg = <0xf0001000 0x1000>,
<0xf0000100 0x100>;

1
arch/arm/boot/dts/ste-ccu8540.dts
View File

@ -18,6 +18,7 @@
compatible = "st-ericsson,ccu8540", "st-ericsson,u8540";
memory@0 {
device_type = "memory";
reg = <0x20000000 0x1f000000>, <0xc0000000 0x3f000000>;
};

10
arch/arm/boot/dts/stih415-pinctrl.dtsi
View File

@ -49,7 +49,7 @@
reg = <0xfe61f080 0x4>;
reg-names = "irqmux";
interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
interrupts-names = "irqmux";
interrupt-names = "irqmux";
ranges = <0 0xfe610000 0x5000>;
PIO0: gpio@fe610000 {
@ -187,7 +187,7 @@
reg = <0xfee0f080 0x4>;
reg-names = "irqmux";
interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>;
interrupts-names = "irqmux";
interrupt-names = "irqmux";
ranges = <0 0xfee00000 0x8000>;
PIO5: gpio@fee00000 {
@ -282,7 +282,7 @@
reg = <0xfe82f080 0x4>;
reg-names = "irqmux";
interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
interrupts-names = "irqmux";
interrupt-names = "irqmux";
ranges = <0 0xfe820000 0x8000>;
PIO13: gpio@fe820000 {
@ -423,7 +423,7 @@
reg = <0xfd6bf080 0x4>;
reg-names = "irqmux";
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
interrupts-names = "irqmux";
interrupt-names = "irqmux";
ranges = <0 0xfd6b0000 0x3000>;
PIO100: gpio@fd6b0000 {
@ -460,7 +460,7 @@
reg = <0xfd33f080 0x4>;
reg-names = "irqmux";
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
interrupts-names = "irqmux";
interrupt-names = "irqmux";
ranges = <0 0xfd330000 0x5000>;
PIO103: gpio@fd330000 {

10
arch/arm/boot/dts/stih416-pinctrl.dtsi
View File

@ -53,7 +53,7 @@
reg = <0xfe61f080 0x4>;
reg-names = "irqmux";
interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
interrupts-names = "irqmux";
interrupt-names = "irqmux";
ranges = <0 0xfe610000 0x6000>;
PIO0: gpio@fe610000 {
@ -201,7 +201,7 @@
reg = <0xfee0f080 0x4>;
reg-names = "irqmux";
interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
interrupts-names = "irqmux";
interrupt-names = "irqmux";
ranges = <0 0xfee00000 0x10000>;
PIO5: gpio@fee00000 {
@ -333,7 +333,7 @@
reg = <0xfe82f080 0x4>;
reg-names = "irqmux";
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
interrupts-names = "irqmux";
interrupt-names = "irqmux";
ranges = <0 0xfe820000 0x6000>;
PIO13: gpio@fe820000 {
@ -461,7 +461,7 @@
reg = <0xfd6bf080 0x4>;
reg-names = "irqmux";
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
interrupts-names = "irqmux";
interrupt-names = "irqmux";
ranges = <0 0xfd6b0000 0x3000>;
PIO100: gpio@fd6b0000 {
@ -498,7 +498,7 @@
reg = <0xfd33f080 0x4>;
reg-names = "irqmux";
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
interrupts-names = "irqmux";
interrupt-names = "irqmux";
ranges = <0 0xfd330000 0x5000>;
PIO103: gpio@fd330000 {

14
arch/arm/boot/dts/sun7i-a20.dtsi
View File

@ -87,7 +87,7 @@
pll4: clk@01c20018 {
#clock-cells = <0>;
compatible = "allwinner,sun4i-a10-pll1-clk";
compatible = "allwinner,sun7i-a20-pll4-clk";
reg = <0x01c20018 0x4>;
clocks = <&osc24M>;
clock-output-names = "pll4";
@ -109,6 +109,14 @@
clock-output-names = "pll6_sata", "pll6_other", "pll6";
};
pll8: clk@01c20040 {
#clock-cells = <0>;
compatible = "allwinner,sun7i-a20-pll4-clk";
reg = <0x01c20040 0x4>;
clocks = <&osc24M>;
clock-output-names = "pll8";
};
cpu: cpu@01c20054 {
#clock-cells = <0>;
compatible = "allwinner,sun4i-a10-cpu-clk";
@ -805,9 +813,9 @@
status = "disabled";
};
i2c4: i2c@01c2bc00 {
i2c4: i2c@01c2c000 {
compatible = "allwinner,sun4i-i2c";
reg = <0x01c2bc00 0x400>;
reg = <0x01c2c000 0x400>;
interrupts = <0 89 4>;
clocks = <&apb1_gates 15>;
clock-frequency = <100000>;

13
arch/arm/boot/dts/tegra124.dtsi
View File

@ -233,19 +233,6 @@
status = "disabled";
};
serial@0,70006400 {
compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
reg = <0x0 0x70006400 0x0 0x40>;
reg-shift = <2>;
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_UARTE>;
resets = <&tegra_car 66>;
reset-names = "serial";
dmas = <&apbdma 20>, <&apbdma 20>;
dma-names = "rx", "tx";
status = "disabled";
};
pwm@0,7000a000 {
compatible = "nvidia,tegra124-pwm", "nvidia,tegra20-pwm";
reg = <0x0 0x7000a000 0x0 0x100>;

2
arch/arm/boot/dts/vf610-twr.dts
View File

@ -25,11 +25,13 @@
clocks {
audio_ext {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24576000>;
};
enet_ext {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
};
};

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