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drm/i915: don't enable plane, pipe and PLL prematurely 

On Ironlake+ we need to enable these in a specific order.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
Jesse Barnes 2011-01-04 15:09:29 -08:00 committed by Chris Wilson
parent 01fe9dbde1
commit 65993d64a3
1 changed files with 5 additions and 3 deletions
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8
drivers/gpu/drm/i915/intel_display.c
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@ -4222,9 +4222,11 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
pipeconf &= ~PIPECONF_DOUBLE_WIDE;
}
dspcntr |= DISPLAY_PLANE_ENABLE;
pipeconf |= PIPECONF_ENABLE;
dpll |= DPLL_VCO_ENABLE;
if (!HAS_PCH_SPLIT(dev)) {
dspcntr |= DISPLAY_PLANE_ENABLE;
pipeconf |= PIPECONF_ENABLE;
dpll |= DPLL_VCO_ENABLE;
}
DRM_DEBUG_KMS("Mode for pipe %c:\n", pipe == 0 ? 'A' : 'B');
drm_mode_debug_printmodeline(mode);