Merge master.kernel.org:/pub/scm/linux/kernel/git/davej/agpgart
* master.kernel.org:/pub/scm/linux/kernel/git/davej/agpgart: [AGPGART] Rework AGPv3 modesetting fallback. [AGPGART] Add suspend callback for i965 [AGPGART] Fix number of aperture sizes in 830 gart structs. [AGPGART] Intel 965 Express support. [AGPGART] agp.h: constify struct agp_bridge_data::version [AGPGART] const'ify VIA AGP PCI table. [AGPGART] CONFIG_PM=n slim: drivers/char/agp/intel-agp.c [AGPGART] CONFIG_PM=n slim: drivers/char/agp/efficeon-agp.c [AGPGART] Const'ify the agpgart driver version. [AGPGART] remove private page protection map
This commit is contained in:
commit
6585b57240
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@ -117,7 +117,7 @@ struct agp_bridge_driver {
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};
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struct agp_bridge_data {
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struct agp_version *version;
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const struct agp_version *version;
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struct agp_bridge_driver *driver;
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struct vm_operations_struct *vm_ops;
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void *previous_size;
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@ -44,7 +44,7 @@
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* past 0.99 at all due to some boolean logic error. */
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#define AGPGART_VERSION_MAJOR 0
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#define AGPGART_VERSION_MINOR 101
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static struct agp_version agp_current_version =
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static const struct agp_version agp_current_version =
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{
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.major = AGPGART_VERSION_MAJOR,
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.minor = AGPGART_VERSION_MINOR,
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@ -337,13 +337,6 @@ static struct agp_bridge_driver efficeon_driver = {
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.agp_destroy_page = agp_generic_destroy_page,
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};
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static int agp_efficeon_resume(struct pci_dev *pdev)
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{
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printk(KERN_DEBUG PFX "agp_efficeon_resume()\n");
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return efficeon_configure();
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}
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static int __devinit agp_efficeon_probe(struct pci_dev *pdev,
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const struct pci_device_id *ent)
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{
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@ -414,11 +407,18 @@ static void __devexit agp_efficeon_remove(struct pci_dev *pdev)
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agp_put_bridge(bridge);
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}
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#ifdef CONFIG_PM
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static int agp_efficeon_suspend(struct pci_dev *dev, pm_message_t state)
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{
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return 0;
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}
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static int agp_efficeon_resume(struct pci_dev *pdev)
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{
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printk(KERN_DEBUG PFX "agp_efficeon_resume()\n");
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return efficeon_configure();
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}
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#endif
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static struct pci_device_id agp_efficeon_pci_table[] = {
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{
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@ -439,8 +439,10 @@ static struct pci_driver agp_efficeon_pci_driver = {
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.id_table = agp_efficeon_pci_table,
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.probe = agp_efficeon_probe,
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.remove = agp_efficeon_remove,
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#ifdef CONFIG_PM
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.suspend = agp_efficeon_suspend,
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.resume = agp_efficeon_resume,
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#endif
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};
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static int __init agp_efficeon_init(void)
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@ -151,35 +151,12 @@ static void agp_add_seg_to_client(struct agp_client *client,
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client->segments = seg;
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}
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/* Originally taken from linux/mm/mmap.c from the array
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* protection_map.
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* The original really should be exported to modules, or
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* some routine which does the conversion for you
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*/
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static const pgprot_t my_protect_map[16] =
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{
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__P000, __P001, __P010, __P011, __P100, __P101, __P110, __P111,
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__S000, __S001, __S010, __S011, __S100, __S101, __S110, __S111
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};
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static pgprot_t agp_convert_mmap_flags(int prot)
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{
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#define _trans(x,bit1,bit2) \
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((bit1==bit2)?(x&bit1):(x&bit1)?bit2:0)
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unsigned long prot_bits;
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pgprot_t temp;
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prot_bits = _trans(prot, PROT_READ, VM_READ) |
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_trans(prot, PROT_WRITE, VM_WRITE) |
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_trans(prot, PROT_EXEC, VM_EXEC);
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prot_bits |= VM_SHARED;
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temp = my_protect_map[prot_bits & 0x0000000f];
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return temp;
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prot_bits = calc_vm_prot_bits(prot) | VM_SHARED;
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return vm_get_page_prot(prot_bits);
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}
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static int agp_create_segment(struct agp_client *client, struct agp_region *region)
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@ -568,25 +568,34 @@ static void agp_v3_parse_one(u32 *requested_mode, u32 *bridge_agpstat, u32 *vga_
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*bridge_agpstat &= ~(AGPSTAT3_4X | AGPSTAT3_RSVD);
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goto done;
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} else if (*requested_mode & AGPSTAT3_4X) {
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*bridge_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
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*bridge_agpstat |= AGPSTAT3_4X;
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goto done;
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} else {
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/*
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* If we didn't specify AGPx8, we can only do x4.
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* If the hardware can't do x4, we're up shit creek, and never
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* should have got this far.
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* If we didn't specify an AGP mode, we see if both
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* the graphics card, and the bridge can do x8, and use if so.
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* If not, we fall back to x4 mode.
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*/
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*bridge_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
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if ((*bridge_agpstat & AGPSTAT3_4X) && (*vga_agpstat & AGPSTAT3_4X))
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*bridge_agpstat |= AGPSTAT3_4X;
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else {
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printk(KERN_INFO PFX "Badness. Don't know which AGP mode to set. "
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"[bridge_agpstat:%x vga_agpstat:%x fell back to:- bridge_agpstat:%x vga_agpstat:%x]\n",
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origbridge, origvga, *bridge_agpstat, *vga_agpstat);
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if (!(*bridge_agpstat & AGPSTAT3_4X))
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printk(KERN_INFO PFX "Bridge couldn't do AGP x4.\n");
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if (!(*vga_agpstat & AGPSTAT3_4X))
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printk(KERN_INFO PFX "Graphic card couldn't do AGP x4.\n");
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return;
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if ((*bridge_agpstat & AGPSTAT3_8X) && (*vga_agpstat & AGPSTAT3_8X)) {
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printk(KERN_INFO PFX "No AGP mode specified. Setting to highest mode supported by bridge & card (x8).\n");
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*bridge_agpstat &= ~(AGPSTAT3_4X | AGPSTAT3_RSVD);
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*vga_agpstat &= ~(AGPSTAT3_4X | AGPSTAT3_RSVD);
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} else {
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printk(KERN_INFO PFX "Fell back to AGPx4 mode because");
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if (!(*bridge_agpstat & AGPSTAT3_8X)) {
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printk("bridge couldn't do x8. bridge_agpstat:%x (orig=%x)\n", *bridge_agpstat, origbridge);
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*bridge_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
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*bridge_agpstat |= AGPSTAT3_4X;
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}
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if (!(*vga_agpstat & AGPSTAT3_8X)) {
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printk("graphics card couldn't do x8. vga_agpstat:%x (orig=%x)\n", *vga_agpstat, origvga);
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*vga_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
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*vga_agpstat |= AGPSTAT3_4X;
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}
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}
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}
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@ -2,14 +2,6 @@
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* Intel AGPGART routines.
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*/
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/*
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* Intel(R) 855GM/852GM and 865G support added by David Dawes
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* <dawes@tungstengraphics.com>.
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*
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* Intel(R) 915G/915GM support added by Alan Hourihane
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* <alanh@tungstengraphics.com>.
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*/
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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@ -17,6 +9,21 @@
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#include <linux/agp_backend.h>
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#include "agp.h"
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#define PCI_DEVICE_ID_INTEL_82946GZ_HB 0x2970
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#define PCI_DEVICE_ID_INTEL_82946GZ_IG 0x2972
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#define PCI_DEVICE_ID_INTEL_82965G_1_HB 0x2980
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#define PCI_DEVICE_ID_INTEL_82965G_1_IG 0x2982
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#define PCI_DEVICE_ID_INTEL_82965Q_HB 0x2990
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#define PCI_DEVICE_ID_INTEL_82965Q_IG 0x2992
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#define PCI_DEVICE_ID_INTEL_82965G_HB 0x29A0
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#define PCI_DEVICE_ID_INTEL_82965G_IG 0x29A2
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#define IS_I965 (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82946GZ_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965G_1_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965Q_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965G_HB)
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/* Intel 815 register */
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#define INTEL_815_APCONT 0x51
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#define INTEL_815_ATTBASE_MASK ~0x1FFFFFFF
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@ -40,6 +47,8 @@
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#define I915_GMCH_GMS_STOLEN_48M (0x6 << 4)
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#define I915_GMCH_GMS_STOLEN_64M (0x7 << 4)
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/* Intel 965G registers */
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#define I965_MSAC 0x62
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/* Intel 7505 registers */
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#define INTEL_I7505_APSIZE 0x74
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@ -354,6 +363,7 @@ static struct aper_size_info_fixed intel_i830_sizes[] =
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/* The 64M mode still requires a 128k gatt */
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{64, 16384, 5},
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{256, 65536, 6},
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{512, 131072, 7},
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};
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static struct _intel_i830_private {
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@ -377,7 +387,11 @@ static void intel_i830_init_gtt_entries(void)
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/* We obtain the size of the GTT, which is also stored (for some
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* reason) at the top of stolen memory. Then we add 4KB to that
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* for the video BIOS popup, which is also stored in there. */
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size = agp_bridge->driver->fetch_size() + 4;
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if (IS_I965)
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size = 512 + 4;
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else
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size = agp_bridge->driver->fetch_size() + 4;
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if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82830_HB ||
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82845G_HB) {
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@ -423,7 +437,7 @@ static void intel_i830_init_gtt_entries(void)
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if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82915G_HB ||
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82915GM_HB ||
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82945G_HB ||
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82945GM_HB)
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82945GM_HB || IS_I965 )
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gtt_entries = MB(48) - KB(size);
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else
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gtt_entries = 0;
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@ -433,7 +447,7 @@ static void intel_i830_init_gtt_entries(void)
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if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82915G_HB ||
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82915GM_HB ||
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82945G_HB ||
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82945GM_HB)
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82945GM_HB || IS_I965)
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gtt_entries = MB(64) - KB(size);
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else
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gtt_entries = 0;
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@ -791,6 +805,77 @@ static int intel_i915_create_gatt_table(struct agp_bridge_data *bridge)
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return 0;
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}
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static int intel_i965_fetch_size(void)
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{
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struct aper_size_info_fixed *values;
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u32 offset = 0;
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u8 temp;
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#define I965_512MB_ADDRESS_MASK (3<<1)
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values = A_SIZE_FIX(agp_bridge->driver->aperture_sizes);
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|
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pci_read_config_byte(intel_i830_private.i830_dev, I965_MSAC, &temp);
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temp &= I965_512MB_ADDRESS_MASK;
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switch (temp) {
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case 0x00:
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offset = 0; /* 128MB */
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break;
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case 0x06:
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offset = 3; /* 512MB */
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break;
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default:
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case 0x02:
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offset = 2; /* 256MB */
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break;
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}
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|
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agp_bridge->previous_size = agp_bridge->current_size = (void *)(values + offset);
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|
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return values[offset].size;
|
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}
|
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|
||||
/* The intel i965 automatically initializes the agp aperture during POST.
|
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+ * Use the memory already set aside for in the GTT.
|
||||
+ */
|
||||
static int intel_i965_create_gatt_table(struct agp_bridge_data *bridge)
|
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{
|
||||
int page_order;
|
||||
struct aper_size_info_fixed *size;
|
||||
int num_entries;
|
||||
u32 temp;
|
||||
|
||||
size = agp_bridge->current_size;
|
||||
page_order = size->page_order;
|
||||
num_entries = size->num_entries;
|
||||
agp_bridge->gatt_table_real = NULL;
|
||||
|
||||
pci_read_config_dword(intel_i830_private.i830_dev, I915_MMADDR, &temp);
|
||||
|
||||
temp &= 0xfff00000;
|
||||
intel_i830_private.gtt = ioremap((temp + (512 * 1024)) , 512 * 1024);
|
||||
|
||||
if (!intel_i830_private.gtt)
|
||||
return -ENOMEM;
|
||||
|
||||
|
||||
intel_i830_private.registers = ioremap(temp,128 * 4096);
|
||||
if (!intel_i830_private.registers)
|
||||
return -ENOMEM;
|
||||
|
||||
temp = readl(intel_i830_private.registers+I810_PGETBL_CTL) & 0xfffff000;
|
||||
global_cache_flush(); /* FIXME: ? */
|
||||
|
||||
/* we have to call this as early as possible after the MMIO base address is known */
|
||||
intel_i830_init_gtt_entries();
|
||||
|
||||
agp_bridge->gatt_table = NULL;
|
||||
|
||||
agp_bridge->gatt_bus_addr = temp;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static int intel_fetch_size(void)
|
||||
{
|
||||
|
@ -1307,7 +1392,7 @@ static struct agp_bridge_driver intel_830_driver = {
|
|||
.owner = THIS_MODULE,
|
||||
.aperture_sizes = intel_i830_sizes,
|
||||
.size_type = FIXED_APER_SIZE,
|
||||
.num_aperture_sizes = 3,
|
||||
.num_aperture_sizes = 4,
|
||||
.needs_scratch_page = TRUE,
|
||||
.configure = intel_i830_configure,
|
||||
.fetch_size = intel_i830_fetch_size,
|
||||
|
@ -1469,7 +1554,7 @@ static struct agp_bridge_driver intel_915_driver = {
|
|||
.owner = THIS_MODULE,
|
||||
.aperture_sizes = intel_i830_sizes,
|
||||
.size_type = FIXED_APER_SIZE,
|
||||
.num_aperture_sizes = 3,
|
||||
.num_aperture_sizes = 4,
|
||||
.needs_scratch_page = TRUE,
|
||||
.configure = intel_i915_configure,
|
||||
.fetch_size = intel_i915_fetch_size,
|
||||
|
@ -1489,6 +1574,29 @@ static struct agp_bridge_driver intel_915_driver = {
|
|||
.agp_destroy_page = agp_generic_destroy_page,
|
||||
};
|
||||
|
||||
static struct agp_bridge_driver intel_i965_driver = {
|
||||
.owner = THIS_MODULE,
|
||||
.aperture_sizes = intel_i830_sizes,
|
||||
.size_type = FIXED_APER_SIZE,
|
||||
.num_aperture_sizes = 4,
|
||||
.needs_scratch_page = TRUE,
|
||||
.configure = intel_i915_configure,
|
||||
.fetch_size = intel_i965_fetch_size,
|
||||
.cleanup = intel_i915_cleanup,
|
||||
.tlb_flush = intel_i810_tlbflush,
|
||||
.mask_memory = intel_i810_mask_memory,
|
||||
.masks = intel_i810_masks,
|
||||
.agp_enable = intel_i810_agp_enable,
|
||||
.cache_flush = global_cache_flush,
|
||||
.create_gatt_table = intel_i965_create_gatt_table,
|
||||
.free_gatt_table = intel_i830_free_gatt_table,
|
||||
.insert_memory = intel_i915_insert_entries,
|
||||
.remove_memory = intel_i915_remove_entries,
|
||||
.alloc_by_type = intel_i830_alloc_by_type,
|
||||
.free_by_type = intel_i810_free_by_type,
|
||||
.agp_alloc_page = agp_generic_alloc_page,
|
||||
.agp_destroy_page = agp_generic_destroy_page,
|
||||
};
|
||||
|
||||
static struct agp_bridge_driver intel_7505_driver = {
|
||||
.owner = THIS_MODULE,
|
||||
|
@ -1684,6 +1792,35 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev,
|
|||
bridge->driver = &intel_845_driver;
|
||||
name = "945GM";
|
||||
break;
|
||||
case PCI_DEVICE_ID_INTEL_82946GZ_HB:
|
||||
if (find_i830(PCI_DEVICE_ID_INTEL_82946GZ_IG))
|
||||
bridge->driver = &intel_i965_driver;
|
||||
else
|
||||
bridge->driver = &intel_845_driver;
|
||||
name = "946GZ";
|
||||
break;
|
||||
case PCI_DEVICE_ID_INTEL_82965G_1_HB:
|
||||
if (find_i830(PCI_DEVICE_ID_INTEL_82965G_1_IG))
|
||||
bridge->driver = &intel_i965_driver;
|
||||
else
|
||||
bridge->driver = &intel_845_driver;
|
||||
name = "965G";
|
||||
break;
|
||||
case PCI_DEVICE_ID_INTEL_82965Q_HB:
|
||||
if (find_i830(PCI_DEVICE_ID_INTEL_82965Q_IG))
|
||||
bridge->driver = &intel_i965_driver;
|
||||
else
|
||||
bridge->driver = &intel_845_driver;
|
||||
name = "965Q";
|
||||
break;
|
||||
case PCI_DEVICE_ID_INTEL_82965G_HB:
|
||||
if (find_i830(PCI_DEVICE_ID_INTEL_82965G_IG))
|
||||
bridge->driver = &intel_i965_driver;
|
||||
else
|
||||
bridge->driver = &intel_845_driver;
|
||||
name = "965G";
|
||||
break;
|
||||
|
||||
case PCI_DEVICE_ID_INTEL_7505_0:
|
||||
bridge->driver = &intel_7505_driver;
|
||||
name = "E7505";
|
||||
|
@ -1766,6 +1903,7 @@ static void __devexit agp_intel_remove(struct pci_dev *pdev)
|
|||
agp_put_bridge(bridge);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
static int agp_intel_resume(struct pci_dev *pdev)
|
||||
{
|
||||
struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
|
||||
|
@ -1786,9 +1924,12 @@ static int agp_intel_resume(struct pci_dev *pdev)
|
|||
intel_i830_configure();
|
||||
else if (bridge->driver == &intel_810_driver)
|
||||
intel_i810_configure();
|
||||
else if (bridge->driver == &intel_i965_driver)
|
||||
intel_i915_configure();
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static struct pci_device_id agp_intel_pci_table[] = {
|
||||
#define ID(x) \
|
||||
|
@ -1825,6 +1966,10 @@ static struct pci_device_id agp_intel_pci_table[] = {
|
|||
ID(PCI_DEVICE_ID_INTEL_82915GM_HB),
|
||||
ID(PCI_DEVICE_ID_INTEL_82945G_HB),
|
||||
ID(PCI_DEVICE_ID_INTEL_82945GM_HB),
|
||||
ID(PCI_DEVICE_ID_INTEL_82946GZ_HB),
|
||||
ID(PCI_DEVICE_ID_INTEL_82965G_1_HB),
|
||||
ID(PCI_DEVICE_ID_INTEL_82965Q_HB),
|
||||
ID(PCI_DEVICE_ID_INTEL_82965G_HB),
|
||||
{ }
|
||||
};
|
||||
|
||||
|
@ -1835,7 +1980,9 @@ static struct pci_driver agp_intel_pci_driver = {
|
|||
.id_table = agp_intel_pci_table,
|
||||
.probe = agp_intel_probe,
|
||||
.remove = __devexit_p(agp_intel_remove),
|
||||
#ifdef CONFIG_PM
|
||||
.resume = agp_intel_resume,
|
||||
#endif
|
||||
};
|
||||
|
||||
static int __init agp_intel_init(void)
|
||||
|
|
|
@ -9,7 +9,7 @@
|
|||
#include <linux/agp_backend.h>
|
||||
#include "agp.h"
|
||||
|
||||
static struct pci_device_id agp_via_pci_table[];
|
||||
static const struct pci_device_id agp_via_pci_table[];
|
||||
|
||||
#define VIA_GARTCTRL 0x80
|
||||
#define VIA_APSIZE 0x84
|
||||
|
@ -485,7 +485,7 @@ static int agp_via_resume(struct pci_dev *pdev)
|
|||
#endif /* CONFIG_PM */
|
||||
|
||||
/* must be the same order as name table above */
|
||||
static struct pci_device_id agp_via_pci_table[] = {
|
||||
static const struct pci_device_id agp_via_pci_table[] = {
|
||||
#define ID(x) \
|
||||
{ \
|
||||
.class = (PCI_CLASS_BRIDGE_HOST << 8), \
|
||||
|
|
|
@ -1013,6 +1013,7 @@ static inline unsigned long vma_pages(struct vm_area_struct *vma)
|
|||
return (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
|
||||
}
|
||||
|
||||
pgprot_t vm_get_page_prot(unsigned long vm_flags);
|
||||
struct vm_area_struct *find_extend_vma(struct mm_struct *, unsigned long addr);
|
||||
struct page *vmalloc_to_page(void *addr);
|
||||
unsigned long vmalloc_to_pfn(void *addr);
|
||||
|
|
|
@ -64,6 +64,13 @@ pgprot_t protection_map[16] = {
|
|||
__S000, __S001, __S010, __S011, __S100, __S101, __S110, __S111
|
||||
};
|
||||
|
||||
pgprot_t vm_get_page_prot(unsigned long vm_flags)
|
||||
{
|
||||
return protection_map[vm_flags &
|
||||
(VM_READ|VM_WRITE|VM_EXEC|VM_SHARED)];
|
||||
}
|
||||
EXPORT_SYMBOL(vm_get_page_prot);
|
||||
|
||||
int sysctl_overcommit_memory = OVERCOMMIT_GUESS; /* heuristic overcommit */
|
||||
int sysctl_overcommit_ratio = 50; /* default is 50% */
|
||||
int sysctl_max_map_count __read_mostly = DEFAULT_MAX_MAP_COUNT;
|
||||
|
|
Loading…
Reference in New Issue