From 4c5773f9f5462dcb372857813918bbfe8c0cdcdd Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 28 May 2016 11:54:12 +0200 Subject: [PATCH 1/3] dt-bindings: clock: Add license and reformat Exynos5410 clock IDs Add license and copyrights (file introduced in 2014) to header with Exynos5410 clock IDs. Additionally reformat it to improve readability. Signed-off-by: Krzysztof Kozlowski Acked-by: Stephen Boyd Reviewed-by: Javier Martinez Canillas Signed-off-by: Sylwester Nawrocki --- include/dt-bindings/clock/exynos5410.h | 54 +++++++++++++++----------- 1 file changed, 32 insertions(+), 22 deletions(-) diff --git a/include/dt-bindings/clock/exynos5410.h b/include/dt-bindings/clock/exynos5410.h index 9b180f032e2d..213f19e02870 100644 --- a/include/dt-bindings/clock/exynos5410.h +++ b/include/dt-bindings/clock/exynos5410.h @@ -1,33 +1,43 @@ +/* + * Copyright (c) 2014 Samsung Electronics Co., Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Device Tree binding constants for Exynos5421 clock controller. +*/ + #ifndef _DT_BINDINGS_CLOCK_EXYNOS_5410_H #define _DT_BINDINGS_CLOCK_EXYNOS_5410_H /* core clocks */ -#define CLK_FIN_PLL 1 -#define CLK_FOUT_APLL 2 -#define CLK_FOUT_CPLL 3 -#define CLK_FOUT_MPLL 4 -#define CLK_FOUT_BPLL 5 -#define CLK_FOUT_KPLL 6 +#define CLK_FIN_PLL 1 +#define CLK_FOUT_APLL 2 +#define CLK_FOUT_CPLL 3 +#define CLK_FOUT_MPLL 4 +#define CLK_FOUT_BPLL 5 +#define CLK_FOUT_KPLL 6 /* gate for special clocks (sclk) */ -#define CLK_SCLK_UART0 128 -#define CLK_SCLK_UART1 129 -#define CLK_SCLK_UART2 130 -#define CLK_SCLK_UART3 131 -#define CLK_SCLK_MMC0 132 -#define CLK_SCLK_MMC1 133 -#define CLK_SCLK_MMC2 134 +#define CLK_SCLK_UART0 128 +#define CLK_SCLK_UART1 129 +#define CLK_SCLK_UART2 130 +#define CLK_SCLK_UART3 131 +#define CLK_SCLK_MMC0 132 +#define CLK_SCLK_MMC1 133 +#define CLK_SCLK_MMC2 134 /* gate clocks */ -#define CLK_UART0 257 -#define CLK_UART1 258 -#define CLK_UART2 259 -#define CLK_UART3 260 -#define CLK_MCT 315 -#define CLK_MMC0 351 -#define CLK_MMC1 352 -#define CLK_MMC2 353 +#define CLK_UART0 257 +#define CLK_UART1 258 +#define CLK_UART2 259 +#define CLK_UART3 260 +#define CLK_MCT 315 +#define CLK_MMC0 351 +#define CLK_MMC1 352 +#define CLK_MMC2 353 -#define CLK_NR_CLKS 512 +#define CLK_NR_CLKS 512 #endif /* _DT_BINDINGS_CLOCK_EXYNOS_5410_H */ From 5cd3535a27a7cf8fc4070b499d66e419e7e72b61 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 28 May 2016 11:54:13 +0200 Subject: [PATCH 2/3] dt-bindings: clock: Add PWM and USB clock IDs to Exynos5410 Add IDs for PWM and USB clocks to Exynos5410. Use the same number as for Exynos5420 just in case in future these drivers were merged. Signed-off-by: Krzysztof Kozlowski Acked-by: Stephen Boyd Reviewed-by: Javier Martinez Canillas Signed-off-by: Sylwester Nawrocki --- include/dt-bindings/clock/exynos5410.h | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/include/dt-bindings/clock/exynos5410.h b/include/dt-bindings/clock/exynos5410.h index 213f19e02870..34c8e96987a1 100644 --- a/include/dt-bindings/clock/exynos5410.h +++ b/include/dt-bindings/clock/exynos5410.h @@ -1,5 +1,6 @@ /* * Copyright (c) 2014 Samsung Electronics Co., Ltd. + * Copyright (c) 2016 Krzysztof Kozlowski * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -27,16 +28,25 @@ #define CLK_SCLK_MMC0 132 #define CLK_SCLK_MMC1 133 #define CLK_SCLK_MMC2 134 +#define CLK_SCLK_USBD300 150 +#define CLK_SCLK_USBD301 151 +#define CLK_SCLK_USBPHY300 152 +#define CLK_SCLK_USBPHY301 153 +#define CLK_SCLK_PWM 155 /* gate clocks */ #define CLK_UART0 257 #define CLK_UART1 258 #define CLK_UART2 259 #define CLK_UART3 260 +#define CLK_PWM 279 #define CLK_MCT 315 #define CLK_MMC0 351 #define CLK_MMC1 352 #define CLK_MMC2 353 +#define CLK_USBH20 365 +#define CLK_USBD300 366 +#define CLK_USBD301 367 #define CLK_NR_CLKS 512 From ed1e1505db0c116affdfab01e650c44a9c459c65 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 28 May 2016 11:54:29 +0200 Subject: [PATCH 3/3] dt-bindings: clock: Add I2C, HSI2C and RTC clock IDs to Exynos5410 Add IDs for I2C, USI (HSI2C) and RTC clocks to Exynos5410. Use the same number as for Exynos5420 just in case in future these drivers are merged. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Javier Martinez Canillas Signed-off-by: Sylwester Nawrocki --- include/dt-bindings/clock/exynos5410.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/include/dt-bindings/clock/exynos5410.h b/include/dt-bindings/clock/exynos5410.h index 34c8e96987a1..e94b7bbfd6af 100644 --- a/include/dt-bindings/clock/exynos5410.h +++ b/include/dt-bindings/clock/exynos5410.h @@ -38,9 +38,18 @@ #define CLK_UART0 257 #define CLK_UART1 258 #define CLK_UART2 259 +#define CLK_I2C0 261 +#define CLK_I2C1 262 +#define CLK_I2C2 263 +#define CLK_I2C3 264 +#define CLK_USI0 265 +#define CLK_USI1 266 +#define CLK_USI2 267 +#define CLK_USI3 268 #define CLK_UART3 260 #define CLK_PWM 279 #define CLK_MCT 315 +#define CLK_RTC 317 #define CLK_MMC0 351 #define CLK_MMC1 352 #define CLK_MMC2 353