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[ARM] 3673/1: lpd270: parse lcd= command line parameter 

Patch from Lennert Buytenhek

The bootloader on the LogicPD PXA270 platform informs the kernel of
which type of TFT screen is connected via an lcd=$FOO kernel command
line parameter.

Before this patch, we ignored this parameter and just hardcoded the use
of the Sharp lq64d343 display kit.  This patch implement parsing of the
command line option, and chooses the right pxafb_mach_info to use (six
choices) based on this command line option.

Also fix the fb settings to correspond with those of the bootloader.

Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Lennert Buytenhek 2006-06-29 16:06:30 +01:00 committed by Russell King
parent 264edb35ce
commit 656602978e
1 changed files with 102 additions and 24 deletions
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126
arch/arm/mach-pxa/lpd270.c
View File

@ -248,58 +248,137 @@ static void lpd270_backlight_power(int on)
/* 5.7" TFT QVGA (LoLo display number 1) */ /* 5.7" TFT QVGA (LoLo display number 1) */
static struct pxafb_mach_info sharp_lq057q3dc02 __initdata = { static struct pxafb_mach_info sharp_lq057q3dc02 __initdata = {
.pixclock = 100000, .pixclock = 150000,
.xres = 240, .xres = 320,
.yres = 320, .yres = 240,
.bpp = 16, .bpp = 16,
.hsync_len = 64, .hsync_len = 0x14,
.left_margin = 0x27, .left_margin = 0x28,
.right_margin = 0x09, .right_margin = 0x0a,
.vsync_len = 0x04, .vsync_len = 0x02,
.upper_margin = 0x08, .upper_margin = 0x08,
.lower_margin = 0x14, .lower_margin = 0x14,
.sync = 0, .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
.lccr0 = 0x07800080, .lccr0 = 0x07800080,
.lccr3 = 0x04400007, .lccr3 = 0x00400000,
.pxafb_backlight_power = lpd270_backlight_power,
};
/* 12.1" TFT SVGA (LoLo display number 2) */
static struct pxafb_mach_info sharp_lq121s1dg31 __initdata = {
.pixclock = 50000,
.xres = 800,
.yres = 600,
.bpp = 16,
.hsync_len = 0x05,
.left_margin = 0x52,
.right_margin = 0x05,
.vsync_len = 0x04,
.upper_margin = 0x14,
.lower_margin = 0x0a,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
.lccr0 = 0x07800080,
.lccr3 = 0x00400000,
.pxafb_backlight_power = lpd270_backlight_power,
};
/* 3.6" TFT QVGA (LoLo display number 3) */
static struct pxafb_mach_info sharp_lq036q1da01 __initdata = {
.pixclock = 150000,
.xres = 320,
.yres = 240,
.bpp = 16,
.hsync_len = 0x0e,
.left_margin = 0x04,
.right_margin = 0x0a,
.vsync_len = 0x03,
.upper_margin = 0x03,
.lower_margin = 0x03,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
.lccr0 = 0x07800080,
.lccr3 = 0x00400000,
.pxafb_backlight_power = lpd270_backlight_power, .pxafb_backlight_power = lpd270_backlight_power,
}; };
/* 6.4" TFT VGA (LoLo display number 5) */ /* 6.4" TFT VGA (LoLo display number 5) */
static struct pxafb_mach_info sharp_lq64d343 __initdata = { static struct pxafb_mach_info sharp_lq64d343 __initdata = {
.pixclock = 20000, .pixclock = 25000,
.xres = 640, .xres = 640,
.yres = 480, .yres = 480,
.bpp = 16, .bpp = 16,
.hsync_len = 49, .hsync_len = 0x31,
.left_margin = 0x89, .left_margin = 0x89,
.right_margin = 0x19, .right_margin = 0x19,
.vsync_len = 18, .vsync_len = 0x12,
.upper_margin = 0x22, .upper_margin = 0x22,
.lower_margin = 0, .lower_margin = 0x00,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
.lccr0 = 0x07800080, .lccr0 = 0x07800080,
.lccr3 = 0x04400001, .lccr3 = 0x00400000,
.pxafb_backlight_power = lpd270_backlight_power,
};
/* 10.4" TFT VGA (LoLo display number 7) */
static struct pxafb_mach_info sharp_lq10d368 __initdata = {
.pixclock = 25000,
.xres = 640,
.yres = 480,
.bpp = 16,
.hsync_len = 0x31,
.left_margin = 0x89,
.right_margin = 0x19,
.vsync_len = 0x12,
.upper_margin = 0x22,
.lower_margin = 0x00,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
.lccr0 = 0x07800080,
.lccr3 = 0x00400000,
.pxafb_backlight_power = lpd270_backlight_power, .pxafb_backlight_power = lpd270_backlight_power,
}; };
/* 3.5" TFT QVGA (LoLo display number 8) */ /* 3.5" TFT QVGA (LoLo display number 8) */
static struct pxafb_mach_info sharp_lq035q7db02_20 __initdata = { static struct pxafb_mach_info sharp_lq035q7db02_20 __initdata = {
.pixclock = 100000, .pixclock = 150000,
.xres = 240, .xres = 240,
.yres = 320, .yres = 320,
.bpp = 16, .bpp = 16,
.hsync_len = 0x34, .hsync_len = 0x0e,
.left_margin = 0x09, .left_margin = 0x0a,
.right_margin = 0x09, .right_margin = 0x0a,
.vsync_len = 0x08, .vsync_len = 0x03,
.upper_margin = 0x05, .upper_margin = 0x05,
.lower_margin = 0x14, .lower_margin = 0x14,
.sync = 0, .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
.lccr0 = 0x07800080, .lccr0 = 0x07800080,
.lccr3 = 0x04400007, .lccr3 = 0x00400000,
.pxafb_backlight_power = lpd270_backlight_power, .pxafb_backlight_power = lpd270_backlight_power,
}; };
static struct pxafb_mach_info *lpd270_lcd_to_use;
static int __init lpd270_set_lcd(char *str)
{
if (!strnicmp(str, "lq057q3dc02", 11)) {
lpd270_lcd_to_use = &sharp_lq057q3dc02;
} else if (!strnicmp(str, "lq121s1dg31", 11)) {
lpd270_lcd_to_use = &sharp_lq121s1dg31;
} else if (!strnicmp(str, "lq036q1da01", 11)) {
lpd270_lcd_to_use = &sharp_lq036q1da01;
} else if (!strnicmp(str, "lq64d343", 8)) {
lpd270_lcd_to_use = &sharp_lq64d343;
} else if (!strnicmp(str, "lq10d368", 8)) {
lpd270_lcd_to_use = &sharp_lq10d368;
} else if (!strnicmp(str, "lq035q7db02-20", 14)) {
lpd270_lcd_to_use = &sharp_lq035q7db02_20;
} else {
printk(KERN_INFO "lpd270: unknown lcd panel [%s]\n", str);
}
return 1;
}
__setup("lcd=", lpd270_set_lcd);
static struct platform_device *platform_devices[] __initdata = { static struct platform_device *platform_devices[] __initdata = {
&smc91x_device, &smc91x_device,
&lpd270_audio_device, &lpd270_audio_device,
@ -345,9 +424,8 @@ static void __init lpd270_init(void)
platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
// set_pxa_fb_info(&sharp_lq057q3dc02); if (lpd270_lcd_to_use != NULL)
set_pxa_fb_info(&sharp_lq64d343); set_pxa_fb_info(lpd270_lcd_to_use);
// set_pxa_fb_info(&sharp_lq035q7db02_20);
pxa_set_ohci_info(&lpd270_ohci_platform_data); pxa_set_ohci_info(&lpd270_ohci_platform_data);
} }