arm64 fixes:
- Update the linker script to use L1_CACHE_BYTES instead of hard-coded 64. We recently changed L1_CACHE_BYTES to 128 - Improve race condition reporting on set_pte_at() and change the BUG to WARN_ONCE. With hardware update of the accessed/dirty state, we need to ensure that set_pte_at() does not inadvertently override hardware updated state. The patch also makes the checks ignore !pte_valid() new entries -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJWaw39AAoJEGvWsS0AyF7xfg0P/3wOZ2geccc480/sJmjBvx4d gSJQHkXXvlOgf1SgQd05148M9Xcv+nfZqBuDctDrQCJx0IXne46a5dlaJ3GfMzzU 8ZzlrIW8GVGFgScpUuAgc/M6Bx8HBc5pZgDW8FqmlX7xeZ+T1MGvC4jDMUz7oUH0 ERN6yAasgLVew8mvEPvKPB3tQHEADyiEx09X61pkos8p4m45kVH4FCBu3INnQQ8W pOBGvrQ1QjEX66DPJfLgRxOSozjDEs8sNdbznoLvXVO39lmC1yJFarGaK6jstLih 90oIo4gSxtEicEE6w6mCd54uzNzFygFv2FZ22NjYcgSoxWVeX0N37IHaP4AgMtl0 FMkyTfzaTdq9thx5gO0aP90mvxnZ/sHCytEnkFwsEYftDn7ncHppCJxAKroSldfv N/MaVtxR6KLU38ZJCE2as9ufNPeATzfiyd69VE0fKyjV4gmWGXakkSiNTsSj3Nz6 4UGZ2WKOJjR0DNwi+4W64wvkhYCQQBDZElil7hxUIcjiy5fOtXANJy73BeqeSu+Y h0x+iy5KlqR8ZpabwmruV5aYB/qcBa1ZFTB6zshBfA4fDyUSjQ59Pi3RlUh78ZxE d4aRHbmiwKcA+DPQYgl9q9eul4DCEZX5AG3r2m7bly9q4dzv6luF2Q7NrH55nCZh QaB8lhdsUF4y0clDShvr =L6aC -----END PGP SIGNATURE----- Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 fixes from Catalin Marinas: - Update the linker script to use L1_CACHE_BYTES instead of hard-coded 64. We recently changed L1_CACHE_BYTES to 128 - Improve race condition reporting on set_pte_at() and change the BUG to WARN_ONCE. With hardware update of the accessed/dirty state, we need to ensure that set_pte_at() does not inadvertently override hardware updated state. The patch also makes the checks ignore !pte_valid() new entries * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: Improve error reporting on set_pte_at() checks arm64: update linker script to increased L1_CACHE_BYTES value
This commit is contained in:
commit
6539756e68
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@ -276,10 +276,14 @@ static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
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* hardware updates of the pte (ptep_set_access_flags safely changes
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* valid ptes without going through an invalid entry).
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*/
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if (IS_ENABLED(CONFIG_DEBUG_VM) && IS_ENABLED(CONFIG_ARM64_HW_AFDBM) &&
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pte_valid(*ptep)) {
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BUG_ON(!pte_young(pte));
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BUG_ON(pte_write(*ptep) && !pte_dirty(pte));
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if (IS_ENABLED(CONFIG_ARM64_HW_AFDBM) &&
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pte_valid(*ptep) && pte_valid(pte)) {
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VM_WARN_ONCE(!pte_young(pte),
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"%s: racy access flag clearing: 0x%016llx -> 0x%016llx",
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__func__, pte_val(*ptep), pte_val(pte));
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VM_WARN_ONCE(pte_write(*ptep) && !pte_dirty(pte),
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"%s: racy dirty state clearing: 0x%016llx -> 0x%016llx",
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__func__, pte_val(*ptep), pte_val(pte));
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}
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set_pte(ptep, pte);
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@ -5,6 +5,7 @@
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*/
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#include <asm-generic/vmlinux.lds.h>
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#include <asm/cache.h>
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#include <asm/kernel-pgtable.h>
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#include <asm/thread_info.h>
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#include <asm/memory.h>
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@ -140,7 +141,7 @@ SECTIONS
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ARM_EXIT_KEEP(EXIT_DATA)
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}
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PERCPU_SECTION(64)
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PERCPU_SECTION(L1_CACHE_BYTES)
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. = ALIGN(PAGE_SIZE);
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__init_end = .;
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@ -158,7 +159,7 @@ SECTIONS
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. = ALIGN(PAGE_SIZE);
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_data = .;
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_sdata = .;
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RW_DATA_SECTION(64, PAGE_SIZE, THREAD_SIZE)
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RW_DATA_SECTION(L1_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE)
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PECOFF_EDATA_PADDING
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_edata = .;
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