Merge branch 'axxia/soc' into next/soc
Patches from Anders Berg applied individually: Here is version 4 of platform support for AXM5516 SoC. The clk driver is now applied to clk-next. The rest should be ready for arm-soc. Haven't got any response from the power/reset maintainers... I hope this driver can be taken via arm-soc as well. The AXM55xx family consists of devices that may contain up to 16 ARM Cortex-A15 cores (in a 4x4 cluster configuration). The cores within each cluster share an L2 cache, and the clusters are connected to each other via a CCN-504 cache coherent interconnect. This machine requires CONFIG_ARM_LPAE enabled as all peripherals are located above 4GB in the memory map. * axxia/soc: ARM: dts: axxia: Add reset controller power: reset: Add Axxia system reset driver ARM: axxia: Adding defconfig for AXM55xx ARM: dts: Device tree for AXM55xx. ARM: Add platform support for LSI AXM55xx SoC Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
650052b141
|
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@ -0,0 +1,12 @@
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|||
Axxia AXM55xx device tree bindings
|
||||
|
||||
Boards using the AXM55xx SoC need to have the following properties:
|
||||
|
||||
Required root node property:
|
||||
|
||||
- compatible = "lsi,axm5516"
|
||||
|
||||
Boards:
|
||||
|
||||
LSI AXM5516 Validation board (Amarillo)
|
||||
compatible = "lsi,axm5516-amarillo", "lsi,axm5516"
|
||||
|
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@ -0,0 +1,20 @@
|
|||
Axxia Restart Driver
|
||||
|
||||
This driver can do reset of the Axxia SoC. It uses the registers in the syscon
|
||||
block to initiate a chip reset.
|
||||
|
||||
Required Properties:
|
||||
-compatible: "lsi,axm55xx-reset"
|
||||
-syscon: phandle to the syscon node.
|
||||
|
||||
Example:
|
||||
|
||||
syscon: syscon@2010030000 {
|
||||
compatible = "lsi,axxia-syscon", "syscon";
|
||||
reg = <0x20 0x10030000 0 0x2000>;
|
||||
};
|
||||
|
||||
reset: reset@2010031000 {
|
||||
compatible = "lsi,axm55xx-reset";
|
||||
syscon = <&syscon>;
|
||||
};
|
||||
|
|
@ -950,6 +950,8 @@ source "arch/arm/mach-mvebu/Kconfig"
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|||
|
||||
source "arch/arm/mach-at91/Kconfig"
|
||||
|
||||
source "arch/arm/mach-axxia/Kconfig"
|
||||
|
||||
source "arch/arm/mach-bcm/Kconfig"
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||||
|
||||
source "arch/arm/mach-berlin/Kconfig"
|
||||
|
|
|
|||
|
|
@ -138,10 +138,12 @@ endif
|
|||
textofs-$(CONFIG_ARCH_MSM7X30) := 0x00208000
|
||||
textofs-$(CONFIG_ARCH_MSM8X60) := 0x00208000
|
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textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000
|
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textofs-$(CONFIG_ARCH_AXXIA) := 0x00308000
|
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|
||||
# Machine directory name. This list is sorted alphanumerically
|
||||
# by CONFIG_* macro name.
|
||||
machine-$(CONFIG_ARCH_AT91) += at91
|
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machine-$(CONFIG_ARCH_AXXIA) += axxia
|
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machine-$(CONFIG_ARCH_BCM) += bcm
|
||||
machine-$(CONFIG_ARCH_BERLIN) += berlin
|
||||
machine-$(CONFIG_ARCH_CLPS711X) += clps711x
|
||||
|
|
|
|||
|
|
@ -50,6 +50,7 @@ dtb-$(CONFIG_ARCH_AT91) += sama5d35ek.dtb
|
|||
dtb-$(CONFIG_ARCH_AT91) += sama5d36ek.dtb
|
||||
|
||||
dtb-$(CONFIG_ARCH_ATLAS6) += atlas6-evb.dtb
|
||||
dtb-$(CONFIG_ARCH_AXXIA) += axm5516-amarillo.dtb
|
||||
dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
|
||||
dtb-$(CONFIG_ARCH_BCM_5301X) += bcm4708-netgear-r6250.dtb
|
||||
dtb-$(CONFIG_ARCH_BCM_MOBILE) += bcm28155-ap.dtb \
|
||||
|
|
|
|||
|
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@ -0,0 +1,51 @@
|
|||
/*
|
||||
* arch/arm/boot/dts/axm5516-amarillo.dts
|
||||
*
|
||||
* Copyright (C) 2013 LSI
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/memreserve/ 0x00000000 0x00400000;
|
||||
|
||||
#include "axm55xx.dtsi"
|
||||
#include "axm5516-cpus.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Amarillo AXM5516";
|
||||
compatible = "lsi,axm5516-amarillo", "lsi,axm5516";
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0 0x00000000 0x02 0x00000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&serial0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&serial1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&serial2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&serial3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpio0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpio1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -0,0 +1,204 @@
|
|||
/*
|
||||
* arch/arm/boot/dts/axm5516-cpus.dtsi
|
||||
*
|
||||
* Copyright (C) 2013 LSI
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*/
|
||||
|
||||
/ {
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu-map {
|
||||
cluster0 {
|
||||
core0 {
|
||||
cpu = <&CPU0>;
|
||||
};
|
||||
core1 {
|
||||
cpu = <&CPU1>;
|
||||
};
|
||||
core2 {
|
||||
cpu = <&CPU2>;
|
||||
};
|
||||
core3 {
|
||||
cpu = <&CPU3>;
|
||||
};
|
||||
};
|
||||
cluster1 {
|
||||
core0 {
|
||||
cpu = <&CPU4>;
|
||||
};
|
||||
core1 {
|
||||
cpu = <&CPU5>;
|
||||
};
|
||||
core2 {
|
||||
cpu = <&CPU6>;
|
||||
};
|
||||
core3 {
|
||||
cpu = <&CPU7>;
|
||||
};
|
||||
};
|
||||
cluster2 {
|
||||
core0 {
|
||||
cpu = <&CPU8>;
|
||||
};
|
||||
core1 {
|
||||
cpu = <&CPU9>;
|
||||
};
|
||||
core2 {
|
||||
cpu = <&CPU10>;
|
||||
};
|
||||
core3 {
|
||||
cpu = <&CPU11>;
|
||||
};
|
||||
};
|
||||
cluster3 {
|
||||
core0 {
|
||||
cpu = <&CPU12>;
|
||||
};
|
||||
core1 {
|
||||
cpu = <&CPU13>;
|
||||
};
|
||||
core2 {
|
||||
cpu = <&CPU14>;
|
||||
};
|
||||
core3 {
|
||||
cpu = <&CPU15>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
CPU0: cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <0x00>;
|
||||
clock-frequency= <1400000000>;
|
||||
cpu-release-addr = <0>; // Fixed by the boot loader
|
||||
};
|
||||
|
||||
CPU1: cpu@1 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <0x01>;
|
||||
clock-frequency= <1400000000>;
|
||||
cpu-release-addr = <0>; // Fixed by the boot loader
|
||||
};
|
||||
|
||||
CPU2: cpu@2 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <0x02>;
|
||||
clock-frequency= <1400000000>;
|
||||
cpu-release-addr = <0>; // Fixed by the boot loader
|
||||
};
|
||||
|
||||
CPU3: cpu@3 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <0x03>;
|
||||
clock-frequency= <1400000000>;
|
||||
cpu-release-addr = <0>; // Fixed by the boot loader
|
||||
};
|
||||
|
||||
CPU4: cpu@100 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <0x100>;
|
||||
clock-frequency= <1400000000>;
|
||||
cpu-release-addr = <0>; // Fixed by the boot loader
|
||||
};
|
||||
|
||||
CPU5: cpu@101 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <0x101>;
|
||||
clock-frequency= <1400000000>;
|
||||
cpu-release-addr = <0>; // Fixed by the boot loader
|
||||
};
|
||||
|
||||
CPU6: cpu@102 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <0x102>;
|
||||
clock-frequency= <1400000000>;
|
||||
cpu-release-addr = <0>; // Fixed by the boot loader
|
||||
};
|
||||
|
||||
CPU7: cpu@103 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <0x103>;
|
||||
clock-frequency= <1400000000>;
|
||||
cpu-release-addr = <0>; // Fixed by the boot loader
|
||||
};
|
||||
|
||||
CPU8: cpu@200 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <0x200>;
|
||||
clock-frequency= <1400000000>;
|
||||
cpu-release-addr = <0>; // Fixed by the boot loader
|
||||
};
|
||||
|
||||
CPU9: cpu@201 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <0x201>;
|
||||
clock-frequency= <1400000000>;
|
||||
cpu-release-addr = <0>; // Fixed by the boot loader
|
||||
};
|
||||
|
||||
CPU10: cpu@202 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <0x202>;
|
||||
clock-frequency= <1400000000>;
|
||||
cpu-release-addr = <0>; // Fixed by the boot loader
|
||||
};
|
||||
|
||||
CPU11: cpu@203 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <0x203>;
|
||||
clock-frequency= <1400000000>;
|
||||
cpu-release-addr = <0>; // Fixed by the boot loader
|
||||
};
|
||||
|
||||
CPU12: cpu@300 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <0x300>;
|
||||
clock-frequency= <1400000000>;
|
||||
cpu-release-addr = <0>; // Fixed by the boot loader
|
||||
};
|
||||
|
||||
CPU13: cpu@301 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <0x301>;
|
||||
clock-frequency= <1400000000>;
|
||||
cpu-release-addr = <0>; // Fixed by the boot loader
|
||||
};
|
||||
|
||||
CPU14: cpu@302 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <0x302>;
|
||||
clock-frequency= <1400000000>;
|
||||
cpu-release-addr = <0>; // Fixed by the boot loader
|
||||
};
|
||||
|
||||
CPU15: cpu@303 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <0x303>;
|
||||
clock-frequency= <1400000000>;
|
||||
cpu-release-addr = <0>; // Fixed by the boot loader
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,204 @@
|
|||
/*
|
||||
* arch/arm/boot/dts/axm55xx.dtsi
|
||||
*
|
||||
* Copyright (C) 2013 LSI
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/lsi,axm5516-clks.h>
|
||||
|
||||
#include "skeleton64.dtsi"
|
||||
|
||||
/ {
|
||||
interrupt-parent = <&gic>;
|
||||
|
||||
aliases {
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
serial2 = &serial2;
|
||||
serial3 = &serial3;
|
||||
timer = &timer0;
|
||||
};
|
||||
|
||||
clocks {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
clk_ref0: clk_ref0 {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <125000000>;
|
||||
};
|
||||
|
||||
clk_ref1: clk_ref1 {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <125000000>;
|
||||
};
|
||||
|
||||
clk_ref2: clk_ref2 {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <125000000>;
|
||||
};
|
||||
|
||||
clks: clock-controller@2010020000 {
|
||||
compatible = "lsi,axm5516-clks";
|
||||
#clock-cells = <1>;
|
||||
reg = <0x20 0x10020000 0 0x20000>;
|
||||
};
|
||||
};
|
||||
|
||||
gic: interrupt-controller@2001001000 {
|
||||
compatible = "arm,cortex-a15-gic";
|
||||
#interrupt-cells = <3>;
|
||||
#address-cells = <0>;
|
||||
interrupt-controller;
|
||||
reg = <0x20 0x01001000 0 0x1000>,
|
||||
<0x20 0x01002000 0 0x1000>,
|
||||
<0x20 0x01004000 0 0x2000>,
|
||||
<0x20 0x01006000 0 0x2000>;
|
||||
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
|
||||
IRQ_TYPE_LEVEL_HIGH)>;
|
||||
};
|
||||
|
||||
timer {
|
||||
compatible = "arm,armv7-timer";
|
||||
interrupts =
|
||||
<GIC_PPI 13
|
||||
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<GIC_PPI 14
|
||||
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<GIC_PPI 11
|
||||
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<GIC_PPI 10
|
||||
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
|
||||
};
|
||||
|
||||
|
||||
pmu {
|
||||
compatible = "arm,cortex-a15-pmu";
|
||||
interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
soc {
|
||||
compatible = "simple-bus";
|
||||
device_type = "soc";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
interrupt-parent = <&gic>;
|
||||
ranges;
|
||||
|
||||
syscon: syscon@2010030000 {
|
||||
compatible = "lsi,axxia-syscon", "syscon";
|
||||
reg = <0x20 0x10030000 0 0x2000>;
|
||||
};
|
||||
|
||||
reset: reset@2010031000 {
|
||||
compatible = "lsi,axm55xx-reset";
|
||||
syscon = <&syscon>;
|
||||
};
|
||||
|
||||
amba {
|
||||
compatible = "arm,amba-bus";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
serial0: uart@2010080000 {
|
||||
compatible = "arm,pl011", "arm,primecell";
|
||||
reg = <0x20 0x10080000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks AXXIA_CLK_PER>;
|
||||
clock-names = "apb_pclk";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
serial1: uart@2010081000 {
|
||||
compatible = "arm,pl011", "arm,primecell";
|
||||
reg = <0x20 0x10081000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks AXXIA_CLK_PER>;
|
||||
clock-names = "apb_pclk";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
serial2: uart@2010082000 {
|
||||
compatible = "arm,pl011", "arm,primecell";
|
||||
reg = <0x20 0x10082000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks AXXIA_CLK_PER>;
|
||||
clock-names = "apb_pclk";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
serial3: uart@2010083000 {
|
||||
compatible = "arm,pl011", "arm,primecell";
|
||||
reg = <0x20 0x10083000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks AXXIA_CLK_PER>;
|
||||
clock-names = "apb_pclk";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
timer0: timer@2010091000 {
|
||||
compatible = "arm,sp804", "arm,primecell";
|
||||
reg = <0x20 0x10091000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks AXXIA_CLK_PER>;
|
||||
clock-names = "apb_pclk";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
gpio0: gpio@2010092000 {
|
||||
#gpio-cells = <2>;
|
||||
compatible = "arm,pl061", "arm,primecell";
|
||||
gpio-controller;
|
||||
reg = <0x20 0x10092000 0x00 0x1000>;
|
||||
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks AXXIA_CLK_PER>;
|
||||
clock-names = "apb_pclk";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gpio1: gpio@2010093000 {
|
||||
#gpio-cells = <2>;
|
||||
compatible = "arm,pl061", "arm,primecell";
|
||||
gpio-controller;
|
||||
reg = <0x20 0x10093000 0x00 0x1000>;
|
||||
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks AXXIA_CLK_PER>;
|
||||
clock-names = "apb_pclk";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/*
|
||||
Local Variables:
|
||||
mode: C
|
||||
End:
|
||||
*/
|
||||
|
|
@ -0,0 +1,248 @@
|
|||
CONFIG_SYSVIPC=y
|
||||
CONFIG_POSIX_MQUEUE=y
|
||||
CONFIG_FHANDLE=y
|
||||
CONFIG_AUDIT=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_BSD_PROCESS_ACCT=y
|
||||
CONFIG_BSD_PROCESS_ACCT_V3=y
|
||||
CONFIG_TASKSTATS=y
|
||||
CONFIG_TASK_DELAY_ACCT=y
|
||||
CONFIG_TASK_XACCT=y
|
||||
CONFIG_TASK_IO_ACCOUNTING=y
|
||||
CONFIG_IKCONFIG=y
|
||||
CONFIG_IKCONFIG_PROC=y
|
||||
CONFIG_LOG_BUF_SHIFT=16
|
||||
CONFIG_NAMESPACES=y
|
||||
# CONFIG_UTS_NS is not set
|
||||
# CONFIG_IPC_NS is not set
|
||||
# CONFIG_PID_NS is not set
|
||||
# CONFIG_NET_NS is not set
|
||||
CONFIG_SCHED_AUTOGROUP=y
|
||||
CONFIG_RELAY=y
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_SYSCTL_SYSCALL=y
|
||||
CONFIG_EMBEDDED=y
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
CONFIG_PROFILING=y
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
CONFIG_ARCH_AXXIA=y
|
||||
CONFIG_GPIO_PCA953X=y
|
||||
CONFIG_ARM_LPAE=y
|
||||
CONFIG_ARM_THUMBEE=y
|
||||
CONFIG_ARM_ERRATA_430973=y
|
||||
CONFIG_ARM_ERRATA_643719=y
|
||||
CONFIG_ARM_ERRATA_720789=y
|
||||
CONFIG_ARM_ERRATA_754322=y
|
||||
CONFIG_ARM_ERRATA_754327=y
|
||||
CONFIG_ARM_ERRATA_764369=y
|
||||
CONFIG_ARM_ERRATA_775420=y
|
||||
CONFIG_ARM_ERRATA_798181=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCI_MSI=y
|
||||
CONFIG_PCIE_AXXIA=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_NR_CPUS=16
|
||||
CONFIG_HOTPLUG_CPU=y
|
||||
CONFIG_PREEMPT=y
|
||||
CONFIG_AEABI=y
|
||||
CONFIG_OABI_COMPAT=y
|
||||
CONFIG_HIGHMEM=y
|
||||
CONFIG_KSM=y
|
||||
CONFIG_ZBOOT_ROM_TEXT=0x0
|
||||
CONFIG_ZBOOT_ROM_BSS=0x0
|
||||
CONFIG_ARM_APPENDED_DTB=y
|
||||
CONFIG_ARM_ATAG_DTB_COMPAT=y
|
||||
CONFIG_VFP=y
|
||||
CONFIG_NEON=y
|
||||
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
|
||||
CONFIG_BINFMT_MISC=y
|
||||
# CONFIG_SUSPEND is not set
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_XFRM_USER=y
|
||||
CONFIG_XFRM_SUB_POLICY=y
|
||||
CONFIG_XFRM_MIGRATE=y
|
||||
CONFIG_XFRM_STATISTICS=y
|
||||
CONFIG_NET_KEY=y
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_PNP=y
|
||||
CONFIG_IP_PNP_DHCP=y
|
||||
CONFIG_IP_PNP_BOOTP=y
|
||||
CONFIG_INET_AH=y
|
||||
CONFIG_INET_ESP=y
|
||||
CONFIG_INET_IPCOMP=y
|
||||
# CONFIG_INET_LRO is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
CONFIG_NETWORK_PHY_TIMESTAMPING=y
|
||||
CONFIG_BRIDGE=y
|
||||
# CONFIG_WIRELESS is not set
|
||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
CONFIG_DEVTMPFS=y
|
||||
CONFIG_DEVTMPFS_MOUNT=y
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_AFS_PARTS=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_CFI=y
|
||||
CONFIG_MTD_CFI_INTELEXT=y
|
||||
CONFIG_MTD_CFI_AMDSTD=y
|
||||
CONFIG_MTD_CFI_STAA=y
|
||||
CONFIG_MTD_PHYSMAP=y
|
||||
CONFIG_MTD_PHYSMAP_OF=y
|
||||
CONFIG_MTD_M25P80=y
|
||||
CONFIG_PROC_DEVICETREE=y
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_EEPROM_AT24=y
|
||||
CONFIG_EEPROM_AT25=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_CHR_DEV_SG=y
|
||||
CONFIG_ATA=y
|
||||
CONFIG_PATA_PLATFORM=y
|
||||
CONFIG_PATA_OF_PLATFORM=y
|
||||
CONFIG_MD=y
|
||||
CONFIG_BLK_DEV_DM=y
|
||||
CONFIG_DM_UEVENT=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_TUN=y
|
||||
CONFIG_VETH=y
|
||||
CONFIG_VIRTIO_NET=y
|
||||
# CONFIG_NET_CADENCE is not set
|
||||
# CONFIG_NET_VENDOR_BROADCOM is not set
|
||||
# CONFIG_NET_VENDOR_CIRRUS is not set
|
||||
# CONFIG_NET_VENDOR_FARADAY is not set
|
||||
# CONFIG_NET_VENDOR_INTEL is not set
|
||||
# CONFIG_NET_VENDOR_MARVELL is not set
|
||||
# CONFIG_NET_VENDOR_MICREL is not set
|
||||
# CONFIG_NET_VENDOR_NATSEMI is not set
|
||||
# CONFIG_NET_VENDOR_SEEQ is not set
|
||||
# CONFIG_NET_VENDOR_SMSC is not set
|
||||
# CONFIG_NET_VENDOR_STMICRO is not set
|
||||
# CONFIG_NET_VENDOR_VIA is not set
|
||||
# CONFIG_NET_VENDOR_WIZNET is not set
|
||||
CONFIG_BROADCOM_PHY=y
|
||||
# CONFIG_WLAN is not set
|
||||
# CONFIG_MOUSE_PS2_ALPS is not set
|
||||
# CONFIG_MOUSE_PS2_LOGIPS2PP is not set
|
||||
# CONFIG_MOUSE_PS2_SYNAPTICS is not set
|
||||
# CONFIG_MOUSE_PS2_TRACKPOINT is not set
|
||||
# CONFIG_SERIO_SERPORT is not set
|
||||
CONFIG_SERIO_AMBAKMI=y
|
||||
CONFIG_LEGACY_PTY_COUNT=16
|
||||
CONFIG_SERIAL_AMBA_PL011=y
|
||||
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
|
||||
CONFIG_VIRTIO_CONSOLE=y
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
CONFIG_I2C_MUX=y
|
||||
CONFIG_I2C_AXXIA=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_PL022=y
|
||||
CONFIG_DP83640_PHY=y
|
||||
CONFIG_GPIOLIB=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
CONFIG_GPIO_PL061=y
|
||||
CONFIG_POWER_SUPPLY=y
|
||||
CONFIG_POWER_RESET=y
|
||||
CONFIG_POWER_RESET_AXXIA=y
|
||||
CONFIG_SENSORS_ADT7475=y
|
||||
CONFIG_SENSORS_JC42=y
|
||||
CONFIG_SENSORS_LM75=y
|
||||
CONFIG_PMBUS=y
|
||||
CONFIG_SENSORS_LTC2978=y
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_ARM_SP805_WATCHDOG=y
|
||||
CONFIG_FB=y
|
||||
CONFIG_FB_ARMCLCD=y
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
CONFIG_LOGO=y
|
||||
# CONFIG_LOGO_LINUX_MONO is not set
|
||||
# CONFIG_LOGO_LINUX_VGA16 is not set
|
||||
CONFIG_HID_A4TECH=y
|
||||
CONFIG_HID_APPLE=y
|
||||
CONFIG_HID_BELKIN=y
|
||||
CONFIG_HID_CHERRY=y
|
||||
CONFIG_HID_CHICONY=y
|
||||
CONFIG_HID_CYPRESS=y
|
||||
CONFIG_HID_DRAGONRISE=y
|
||||
CONFIG_HID_EZKEY=y
|
||||
CONFIG_HID_KYE=y
|
||||
CONFIG_HID_GYRATION=y
|
||||
CONFIG_HID_TWINHAN=y
|
||||
CONFIG_HID_KENSINGTON=y
|
||||
CONFIG_HID_LOGITECH=y
|
||||
CONFIG_HID_MICROSOFT=y
|
||||
CONFIG_HID_MONTEREY=y
|
||||
CONFIG_HID_NTRIG=y
|
||||
CONFIG_HID_ORTEK=y
|
||||
CONFIG_HID_PANTHERLORD=y
|
||||
CONFIG_HID_PETALYNX=y
|
||||
CONFIG_HID_SAMSUNG=y
|
||||
CONFIG_HID_SUNPLUS=y
|
||||
CONFIG_HID_GREENASIA=y
|
||||
CONFIG_HID_SMARTJOYPLUS=y
|
||||
CONFIG_HID_TOPSEED=y
|
||||
CONFIG_HID_THRUSTMASTER=y
|
||||
CONFIG_HID_ZEROPLUS=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
# CONFIG_USB_EHCI_TT_NEWSCHED is not set
|
||||
CONFIG_USB_EHCI_HCD_AXXIA=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_ARMMMCI=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_PL330_DMA=y
|
||||
CONFIG_VIRT_DRIVERS=y
|
||||
CONFIG_VIRTIO_MMIO=y
|
||||
CONFIG_MAILBOX=y
|
||||
CONFIG_PL320_MBOX=y
|
||||
# CONFIG_IOMMU_SUPPORT is not set
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT3_FS=y
|
||||
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_FUSE_FS=y
|
||||
CONFIG_CUSE=y
|
||||
CONFIG_FSCACHE=y
|
||||
CONFIG_FSCACHE_STATS=y
|
||||
CONFIG_FSCACHE_HISTOGRAM=y
|
||||
CONFIG_FSCACHE_DEBUG=y
|
||||
CONFIG_FSCACHE_OBJECT_LIST=y
|
||||
CONFIG_CACHEFILES=y
|
||||
CONFIG_CACHEFILES_HISTOGRAM=y
|
||||
CONFIG_ISO9660_FS=y
|
||||
CONFIG_UDF_FS=y
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_NTFS_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_JFFS2_FS=y
|
||||
CONFIG_CRAMFS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V4=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_NFS_FSCACHE=y
|
||||
CONFIG_SUNRPC_DEBUG=y
|
||||
CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NLS_ISO8859_1=y
|
||||
CONFIG_PRINTK_TIME=y
|
||||
CONFIG_DEBUG_INFO=y
|
||||
CONFIG_DEBUG_FS=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
# CONFIG_SCHED_DEBUG is not set
|
||||
CONFIG_RCU_CPU_STALL_TIMEOUT=60
|
||||
# CONFIG_FTRACE is not set
|
||||
CONFIG_DEBUG_USER=y
|
||||
CONFIG_CRYPTO_GCM=y
|
||||
CONFIG_CRYPTO_XCBC=y
|
||||
CONFIG_CRYPTO_SHA256=y
|
||||
# CONFIG_CRYPTO_ANSI_CPRNG is not set
|
||||
CONFIG_VIRTUALIZATION=y
|
||||
CONFIG_KVM=y
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
config ARCH_AXXIA
|
||||
bool "LSI Axxia platforms" if (ARCH_MULTI_V7 && ARM_LPAE)
|
||||
select ARCH_DMA_ADDR_T_64BIT
|
||||
select ARM_AMBA
|
||||
select ARM_GIC
|
||||
select ARM_TIMER_SP804
|
||||
select HAVE_ARM_ARCH_TIMER
|
||||
select MFD_SYSCON
|
||||
select MIGHT_HAVE_PCI
|
||||
select PCI_DOMAINS if PCI
|
||||
select ZONE_DMA
|
||||
help
|
||||
This enables support for the LSI Axxia devices.
|
||||
|
||||
The LSI Axxia platforms require a Flattened Device Tree to be passed
|
||||
to the kernel.
|
||||
|
|
@ -0,0 +1,2 @@
|
|||
obj-y += axxia.o
|
||||
obj-$(CONFIG_SMP) += platsmp.o
|
||||
|
|
@ -0,0 +1,28 @@
|
|||
/*
|
||||
* Support for the LSI Axxia SoC devices based on ARM cores.
|
||||
*
|
||||
* Copyright (C) 2012 LSI
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <asm/mach/arch.h>
|
||||
|
||||
static const char *axxia_dt_match[] __initconst = {
|
||||
"lsi,axm5516",
|
||||
"lsi,axm5516-sim",
|
||||
"lsi,axm5516-emu",
|
||||
NULL
|
||||
};
|
||||
|
||||
DT_MACHINE_START(AXXIA_DT, "LSI Axxia AXM55XX")
|
||||
.dt_compat = axxia_dt_match,
|
||||
MACHINE_END
|
||||
|
|
@ -0,0 +1,89 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-axxia/platsmp.c
|
||||
*
|
||||
* Copyright (C) 2012 LSI Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/smp.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <asm/cacheflush.h>
|
||||
|
||||
/* Syscon register offsets for releasing cores from reset */
|
||||
#define SC_CRIT_WRITE_KEY 0x1000
|
||||
#define SC_RST_CPU_HOLD 0x1010
|
||||
|
||||
/*
|
||||
* Write the kernel entry point for secondary CPUs to the specified address
|
||||
*/
|
||||
static void write_release_addr(u32 release_phys)
|
||||
{
|
||||
u32 *virt = (u32 *) phys_to_virt(release_phys);
|
||||
writel_relaxed(virt_to_phys(secondary_startup), virt);
|
||||
/* Make sure this store is visible to other CPUs */
|
||||
smp_wmb();
|
||||
__cpuc_flush_dcache_area(virt, sizeof(u32));
|
||||
}
|
||||
|
||||
static int axxia_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
||||
{
|
||||
struct device_node *syscon_np;
|
||||
void __iomem *syscon;
|
||||
u32 tmp;
|
||||
|
||||
syscon_np = of_find_compatible_node(NULL, NULL, "lsi,axxia-syscon");
|
||||
if (!syscon_np)
|
||||
return -ENOENT;
|
||||
|
||||
syscon = of_iomap(syscon_np, 0);
|
||||
if (!syscon)
|
||||
return -ENOMEM;
|
||||
|
||||
tmp = readl(syscon + SC_RST_CPU_HOLD);
|
||||
writel(0xab, syscon + SC_CRIT_WRITE_KEY);
|
||||
tmp &= ~(1 << cpu);
|
||||
writel(tmp, syscon + SC_RST_CPU_HOLD);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void __init axxia_smp_prepare_cpus(unsigned int max_cpus)
|
||||
{
|
||||
int cpu_count = 0;
|
||||
int cpu;
|
||||
|
||||
/*
|
||||
* Initialise the present map, which describes the set of CPUs actually
|
||||
* populated at the present time.
|
||||
*/
|
||||
for_each_possible_cpu(cpu) {
|
||||
struct device_node *np;
|
||||
u32 release_phys;
|
||||
|
||||
np = of_get_cpu_node(cpu, NULL);
|
||||
if (!np)
|
||||
continue;
|
||||
if (of_property_read_u32(np, "cpu-release-addr", &release_phys))
|
||||
continue;
|
||||
|
||||
if (cpu_count < max_cpus) {
|
||||
set_cpu_present(cpu, true);
|
||||
cpu_count++;
|
||||
}
|
||||
|
||||
if (release_phys != 0)
|
||||
write_release_addr(release_phys);
|
||||
}
|
||||
}
|
||||
|
||||
static struct smp_operations axxia_smp_ops __initdata = {
|
||||
.smp_prepare_cpus = axxia_smp_prepare_cpus,
|
||||
.smp_boot_secondary = axxia_boot_secondary,
|
||||
};
|
||||
CPU_METHOD_OF_DECLARE(axxia_smp, "lsi,syscon-release", &axxia_smp_ops);
|
||||
|
|
@ -12,6 +12,14 @@ config POWER_RESET_AS3722
|
|||
help
|
||||
This driver supports turning off board via a ams AS3722 power-off.
|
||||
|
||||
config POWER_RESET_AXXIA
|
||||
bool "LSI Axxia reset driver"
|
||||
depends on POWER_RESET && ARCH_AXXIA
|
||||
help
|
||||
This driver supports restart for Axxia SoC.
|
||||
|
||||
Say Y if you have an Axxia family SoC.
|
||||
|
||||
config POWER_RESET_GPIO
|
||||
bool "GPIO power-off driver"
|
||||
depends on OF_GPIO && POWER_RESET
|
||||
|
|
|
|||
|
|
@ -1,4 +1,5 @@
|
|||
obj-$(CONFIG_POWER_RESET_AS3722) += as3722-poweroff.o
|
||||
obj-$(CONFIG_POWER_RESET_AXXIA) += axxia-reset.o
|
||||
obj-$(CONFIG_POWER_RESET_GPIO) += gpio-poweroff.o
|
||||
obj-$(CONFIG_POWER_RESET_MSM) += msm-poweroff.o
|
||||
obj-$(CONFIG_POWER_RESET_QNAP) += qnap-poweroff.o
|
||||
|
|
|
|||
|
|
@ -0,0 +1,88 @@
|
|||
/*
|
||||
* Reset driver for Axxia devices
|
||||
*
|
||||
* Copyright (C) 2014 LSI
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 and
|
||||
* only version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/mfd/syscon.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/reboot.h>
|
||||
#include <linux/regmap.h>
|
||||
|
||||
#include <asm/system_misc.h>
|
||||
|
||||
|
||||
#define SC_CRIT_WRITE_KEY 0x1000
|
||||
#define SC_LATCH_ON_RESET 0x1004
|
||||
#define SC_RESET_CONTROL 0x1008
|
||||
#define RSTCTL_RST_ZERO (1<<3)
|
||||
#define RSTCTL_RST_FAB (1<<2)
|
||||
#define RSTCTL_RST_CHIP (1<<1)
|
||||
#define RSTCTL_RST_SYS (1<<0)
|
||||
#define SC_EFUSE_INT_STATUS 0x180c
|
||||
#define EFUSE_READ_DONE (1<<31)
|
||||
|
||||
static struct regmap *syscon;
|
||||
|
||||
static void do_axxia_restart(enum reboot_mode reboot_mode, const char *cmd)
|
||||
{
|
||||
/* Access Key (0xab) */
|
||||
regmap_write(syscon, SC_CRIT_WRITE_KEY, 0xab);
|
||||
/* Select internal boot from 0xffff0000 */
|
||||
regmap_write(syscon, SC_LATCH_ON_RESET, 0x00000040);
|
||||
/* Assert ResetReadDone (to avoid hanging in boot ROM) */
|
||||
regmap_write(syscon, SC_EFUSE_INT_STATUS, EFUSE_READ_DONE);
|
||||
/* Assert chip reset */
|
||||
regmap_update_bits(syscon, SC_RESET_CONTROL,
|
||||
RSTCTL_RST_CHIP, RSTCTL_RST_CHIP);
|
||||
}
|
||||
|
||||
static int axxia_reset_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct device *dev = &pdev->dev;
|
||||
|
||||
syscon = syscon_regmap_lookup_by_phandle(dev->of_node, "syscon");
|
||||
if (IS_ERR(syscon)) {
|
||||
pr_err("%s: syscon lookup failed\n", dev->of_node->name);
|
||||
return PTR_ERR(syscon);
|
||||
}
|
||||
|
||||
arm_pm_restart = do_axxia_restart;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id of_axxia_reset_match[] = {
|
||||
{ .compatible = "lsi,axm55xx-reset", },
|
||||
{},
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, of_axxia_reset_match);
|
||||
|
||||
static struct platform_driver axxia_reset_driver = {
|
||||
.probe = axxia_reset_probe,
|
||||
.driver = {
|
||||
.name = "axxia-reset",
|
||||
.of_match_table = of_match_ptr(of_axxia_reset_match),
|
||||
},
|
||||
};
|
||||
|
||||
static int __init axxia_reset_init(void)
|
||||
{
|
||||
return platform_driver_register(&axxia_reset_driver);
|
||||
}
|
||||
device_initcall(axxia_reset_init);
|
||||
|
|
@ -0,0 +1,36 @@
|
|||
/*
|
||||
* Copyright (c) 2014 LSI Corporation
|
||||
*
|
||||
* This software is licensed under the terms of the GNU General Public
|
||||
* License version 2, as published by the Free Software Foundation, and
|
||||
* may be copied, distributed, and modified under those terms.
|
||||
*/
|
||||
|
||||
#ifndef _DT_BINDINGS_CLK_AXM5516_H
|
||||
#define _DT_BINDINGS_CLK_AXM5516_H
|
||||
|
||||
#define AXXIA_CLK_FAB_PLL 0
|
||||
#define AXXIA_CLK_CPU_PLL 1
|
||||
#define AXXIA_CLK_SYS_PLL 2
|
||||
#define AXXIA_CLK_SM0_PLL 3
|
||||
#define AXXIA_CLK_SM1_PLL 4
|
||||
#define AXXIA_CLK_FAB_DIV 5
|
||||
#define AXXIA_CLK_SYS_DIV 6
|
||||
#define AXXIA_CLK_NRCP_DIV 7
|
||||
#define AXXIA_CLK_CPU0_DIV 8
|
||||
#define AXXIA_CLK_CPU1_DIV 9
|
||||
#define AXXIA_CLK_CPU2_DIV 10
|
||||
#define AXXIA_CLK_CPU3_DIV 11
|
||||
#define AXXIA_CLK_PER_DIV 12
|
||||
#define AXXIA_CLK_MMC_DIV 13
|
||||
#define AXXIA_CLK_FAB 14
|
||||
#define AXXIA_CLK_SYS 15
|
||||
#define AXXIA_CLK_NRCP 16
|
||||
#define AXXIA_CLK_CPU0 17
|
||||
#define AXXIA_CLK_CPU1 18
|
||||
#define AXXIA_CLK_CPU2 19
|
||||
#define AXXIA_CLK_CPU3 20
|
||||
#define AXXIA_CLK_PER 21
|
||||
#define AXXIA_CLK_MMC 22
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue