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drm/nouveau/gr/gf100-: abstract fetching rop count 

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs 2016-04-14 14:26:18 +10:00
parent 5ec3def735
commit 64cb5a31f4
15 changed files with 25 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c
View File

@ -702,6 +702,13 @@ gf100_gr_pack_mmio[] = {
* PGRAPH engine/subdev functions
******************************************************************************/
int
gf100_gr_rops(struct gf100_gr *gr)
{
struct nvkm_device *device = gr->base.engine.subdev.device;
return (nvkm_rd32(device, 0x409604) & 0x001f0000) >> 16;
}
void
gf100_gr_zbc_init(struct gf100_gr *gr)
{
@ -1633,7 +1640,7 @@ gf100_gr_oneinit(struct nvkm_gr *base)
nvkm_wo32(gr->unk4188b8, i, 0x00000010);
nvkm_done(gr->unk4188b8);
gr->rop_nr = (nvkm_rd32(device, 0x409604) & 0x001f0000) >> 16;
gr->rop_nr = gr->func->rops(gr);
gr->gpc_nr = nvkm_rd32(device, 0x409604) & 0x0000001f;
for (i = 0; i < gr->gpc_nr; i++) {
gr->tpc_nr[i] = nvkm_rd32(device, GPC_UNIT(i, 0x2608));
@ -1946,6 +1953,7 @@ gf100_gr = {
.mmio = gf100_gr_pack_mmio,
.fecs.ucode = &gf100_gr_fecs_ucode,
.gpccs.ucode = &gf100_gr_gpccs_ucode,
.rops = gf100_gr_rops,
.grctx = &gf100_grctx,
.sclass = {
{ -1, -1, FERMI_TWOD_A },

2
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h
View File

@ -129,12 +129,14 @@ struct gf100_gr_func {
struct {
struct gf100_gr_ucode *ucode;
} gpccs;
int (*rops)(struct gf100_gr *);
int ppc_nr;
const struct gf100_grctx_func *grctx;
struct nvkm_sclass sclass[];
};
int gf100_gr_init(struct gf100_gr *);
int gf100_gr_rops(struct gf100_gr *);
int gk104_gr_init(struct gf100_gr *);

1
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf104.c
View File

@ -118,6 +118,7 @@ gf104_gr = {
.mmio = gf104_gr_pack_mmio,
.fecs.ucode = &gf100_gr_fecs_ucode,
.gpccs.ucode = &gf100_gr_gpccs_ucode,
.rops = gf100_gr_rops,
.grctx = &gf104_grctx,
.sclass = {
{ -1, -1, FERMI_TWOD_A },

1
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf108.c
View File

@ -109,6 +109,7 @@ gf108_gr = {
.mmio = gf108_gr_pack_mmio,
.fecs.ucode = &gf100_gr_fecs_ucode,
.gpccs.ucode = &gf100_gr_gpccs_ucode,
.rops = gf100_gr_rops,
.grctx = &gf108_grctx,
.sclass = {
{ -1, -1, FERMI_TWOD_A },

1
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf110.c
View File

@ -90,6 +90,7 @@ gf110_gr = {
.mmio = gf110_gr_pack_mmio,
.fecs.ucode = &gf100_gr_fecs_ucode,
.gpccs.ucode = &gf100_gr_gpccs_ucode,
.rops = gf100_gr_rops,
.grctx = &gf110_grctx,
.sclass = {
{ -1, -1, FERMI_TWOD_A },

1
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf117.c
View File

@ -126,6 +126,7 @@ gf117_gr = {
.mmio = gf117_gr_pack_mmio,
.fecs.ucode = &gf117_gr_fecs_ucode,
.gpccs.ucode = &gf117_gr_gpccs_ucode,
.rops = gf100_gr_rops,
.ppc_nr = 1,
.grctx = &gf117_grctx,
.sclass = {

1
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf119.c
View File

@ -181,6 +181,7 @@ gf119_gr = {
.mmio = gf119_gr_pack_mmio,
.fecs.ucode = &gf100_gr_fecs_ucode,
.gpccs.ucode = &gf100_gr_gpccs_ucode,
.rops = gf100_gr_rops,
.grctx = &gf119_grctx,
.sclass = {
{ -1, -1, FERMI_TWOD_A },

1
drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c
View File

@ -312,6 +312,7 @@ gk104_gr = {
.mmio = gk104_gr_pack_mmio,
.fecs.ucode = &gk104_gr_fecs_ucode,
.gpccs.ucode = &gk104_gr_gpccs_ucode,
.rops = gf100_gr_rops,
.ppc_nr = 1,
.grctx = &gk104_grctx,
.sclass = {

1
drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110.c
View File

@ -186,6 +186,7 @@ gk110_gr = {
.mmio = gk110_gr_pack_mmio,
.fecs.ucode = &gk110_gr_fecs_ucode,
.gpccs.ucode = &gk110_gr_gpccs_ucode,
.rops = gf100_gr_rops,
.ppc_nr = 2,
.grctx = &gk110_grctx,
.sclass = {

1
drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110b.c
View File

@ -106,6 +106,7 @@ gk110b_gr = {
.mmio = gk110b_gr_pack_mmio,
.fecs.ucode = &gk110_gr_fecs_ucode,
.gpccs.ucode = &gk110_gr_gpccs_ucode,
.rops = gf100_gr_rops,
.ppc_nr = 2,
.grctx = &gk110b_grctx,
.sclass = {

1
drivers/gpu/drm/nouveau/nvkm/engine/gr/gk208.c
View File

@ -165,6 +165,7 @@ gk208_gr = {
.mmio = gk208_gr_pack_mmio,
.fecs.ucode = &gk208_gr_fecs_ucode,
.gpccs.ucode = &gk208_gr_gpccs_ucode,
.rops = gf100_gr_rops,
.ppc_nr = 1,
.grctx = &gk208_grctx,
.sclass = {

1
drivers/gpu/drm/nouveau/nvkm/engine/gr/gk20a.c
View File

@ -313,6 +313,7 @@ static const struct gf100_gr_func
gk20a_gr = {
.init = gk20a_gr_init,
.set_hww_esr_report_mask = gk20a_gr_set_hww_esr_report_mask,
.rops = gf100_gr_rops,
.ppc_nr = 1,
.grctx = &gk20a_grctx,
.sclass = {

1
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.c
View File

@ -441,6 +441,7 @@ gm107_gr = {
.mmio = gm107_gr_pack_mmio,
.fecs.ucode = &gm107_gr_fecs_ucode,
.gpccs.ucode = &gm107_gr_gpccs_ucode,
.rops = gf100_gr_rops,
.ppc_nr = 2,
.grctx = &gm107_grctx,
.sclass = {

1
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c
View File

@ -189,6 +189,7 @@ gm200_gr_new_(const struct gf100_gr_func *func, struct nvkm_device *device,
static const struct gf100_gr_func
gm200_gr = {
.init = gm200_gr_init,
.rops = gf100_gr_rops,
.ppc_nr = 2,
.grctx = &gm200_grctx,
.sclass = {

1
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm20b.c
View File

@ -67,6 +67,7 @@ gm20b_gr = {
.init = gk20a_gr_init,
.init_gpc_mmu = gm20b_gr_init_gpc_mmu,
.set_hww_esr_report_mask = gm20b_gr_set_hww_esr_report_mask,
.rops = gf100_gr_rops,
.ppc_nr = 1,
.grctx = &gm20b_grctx,
.sclass = {