ASoC: samsung: i2s: Ensure the RCLK rate is properly determined
If the RCLK mux clock configuration is specified in DT and no set_sysclk() callback is used in the sound card driver the sclk_srcrate field will remain set to 0, leading to an incorrect PSR divider setting. To fix this the frequency value is retrieved from the CLK_I2S_RCLK_SRC clock, so the actual RCLK mux selection is taken into account. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -656,8 +656,12 @@ static int i2s_set_fmt(struct snd_soc_dai *dai,
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tmp |= mod_slave;
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break;
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case SND_SOC_DAIFMT_CBS_CFS:
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/* Set default source clock in Master mode */
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if (i2s->rclk_srcrate == 0)
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/*
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* Set default source clock in Master mode, only when the
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* CLK_I2S_RCLK_SRC clock is not exposed so we ensure any
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* clock configuration assigned in DT is not overwritten.
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*/
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if (i2s->rclk_srcrate == 0 && i2s->clk_data.clks == NULL)
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i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
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0, SND_SOC_CLOCK_IN);
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break;
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@ -881,6 +885,11 @@ static int config_setup(struct i2s_dai *i2s)
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return 0;
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if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
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struct clk *rclksrc = i2s->clk_table[CLK_I2S_RCLK_SRC];
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if (i2s->rclk_srcrate == 0 && rclksrc && !IS_ERR(rclksrc))
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i2s->rclk_srcrate = clk_get_rate(rclksrc);
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psr = i2s->rclk_srcrate / i2s->frmclk / rfs;
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writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR);
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dev_dbg(&i2s->pdev->dev,
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