powerpc/powernv: Remove powernv RTAS support
The powernv code has some conditional support for running on bare metal machines that have no OPAL firmware, but provide RTAS. No released machines ever supported that, and even in the lab it was just a transitional hack in the days when OPAL was still being developed. So remove the code. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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@ -19,10 +19,3 @@ config PPC_POWERNV
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select CPU_FREQ_GOV_CONSERVATIVE
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select PPC_DOORBELL
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default y
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config PPC_POWERNV_RTAS
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depends on PPC_POWERNV
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bool "Support for RTAS based PowerNV platforms such as BML"
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default y
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select PPC_ICS_RTAS
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select PPC_RTAS
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@ -662,66 +662,13 @@ void pnv_pci_setup_iommu_table(struct iommu_table *tbl,
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tbl->it_type = TCE_PCI;
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}
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static struct iommu_table *pnv_pci_setup_bml_iommu(struct pci_controller *hose)
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{
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struct iommu_table *tbl;
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const __be64 *basep, *swinvp;
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const __be32 *sizep;
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basep = of_get_property(hose->dn, "linux,tce-base", NULL);
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sizep = of_get_property(hose->dn, "linux,tce-size", NULL);
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if (basep == NULL || sizep == NULL) {
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pr_err("PCI: %s has missing tce entries !\n",
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hose->dn->full_name);
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return NULL;
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}
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tbl = kzalloc_node(sizeof(struct iommu_table), GFP_KERNEL, hose->node);
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if (WARN_ON(!tbl))
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return NULL;
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pnv_pci_setup_iommu_table(tbl, __va(be64_to_cpup(basep)),
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be32_to_cpup(sizep), 0, IOMMU_PAGE_SHIFT_4K);
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iommu_init_table(tbl, hose->node);
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iommu_register_group(tbl, pci_domain_nr(hose->bus), 0);
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/* Deal with SW invalidated TCEs when needed (BML way) */
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swinvp = of_get_property(hose->dn, "linux,tce-sw-invalidate-info",
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NULL);
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if (swinvp) {
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tbl->it_busno = be64_to_cpu(swinvp[1]);
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tbl->it_index = (unsigned long)ioremap(be64_to_cpup(swinvp), 8);
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tbl->it_type = TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE;
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}
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return tbl;
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}
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static void pnv_pci_dma_fallback_setup(struct pci_controller *hose,
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struct pci_dev *pdev)
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{
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struct device_node *np = pci_bus_to_OF_node(hose->bus);
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struct pci_dn *pdn;
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if (np == NULL)
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return;
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pdn = PCI_DN(np);
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if (!pdn->iommu_table)
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pdn->iommu_table = pnv_pci_setup_bml_iommu(hose);
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if (!pdn->iommu_table)
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return;
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set_iommu_table_base_and_group(&pdev->dev, pdn->iommu_table);
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}
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static void pnv_pci_dma_dev_setup(struct pci_dev *pdev)
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{
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struct pci_controller *hose = pci_bus_to_host(pdev->bus);
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struct pnv_phb *phb = hose->private_data;
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/* If we have no phb structure, try to setup a fallback based on
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* the device-tree (RTAS PCI for example)
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*/
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if (phb && phb->dma_dev_setup)
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phb->dma_dev_setup(phb, pdev);
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else
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pnv_pci_dma_fallback_setup(hose, pdev);
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}
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int pnv_pci_dma_set_mask(struct pci_dev *pdev, u64 dma_mask)
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@ -767,38 +714,31 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_IBM, 0x3b9, pnv_p7ioc_rc_quirk);
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void __init pnv_pci_init(void)
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{
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struct device_node *np;
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bool found_ioda = false;
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pci_add_flags(PCI_CAN_SKIP_ISA_ALIGN);
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/* OPAL absent, try POPAL first then RTAS detection of PHBs */
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if (!firmware_has_feature(FW_FEATURE_OPAL)) {
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#ifdef CONFIG_PPC_POWERNV_RTAS
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init_pci_config_tokens();
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find_and_init_phbs();
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#endif /* CONFIG_PPC_POWERNV_RTAS */
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/* If we don't have OPAL, eg. in sim, just skip PCI probe */
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if (!firmware_has_feature(FW_FEATURE_OPAL))
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return;
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/* Look for IODA IO-Hubs. We don't support mixing IODA
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* and p5ioc2 due to the need to change some global
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* probing flags
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*/
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for_each_compatible_node(np, NULL, "ibm,ioda-hub") {
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pnv_pci_init_ioda_hub(np);
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found_ioda = true;
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}
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/* OPAL is here, do our normal stuff */
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else {
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int found_ioda = 0;
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/* Look for IODA IO-Hubs. We don't support mixing IODA
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* and p5ioc2 due to the need to change some global
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* probing flags
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*/
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for_each_compatible_node(np, NULL, "ibm,ioda-hub") {
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pnv_pci_init_ioda_hub(np);
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found_ioda = 1;
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}
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/* Look for p5ioc2 IO-Hubs */
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if (!found_ioda)
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for_each_compatible_node(np, NULL, "ibm,p5ioc2")
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pnv_pci_init_p5ioc2_hub(np);
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/* Look for p5ioc2 IO-Hubs */
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if (!found_ioda)
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for_each_compatible_node(np, NULL, "ibm,p5ioc2")
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pnv_pci_init_p5ioc2_hub(np);
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/* Look for ioda2 built-in PHB3's */
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for_each_compatible_node(np, NULL, "ibm,ioda2-phb")
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pnv_pci_init_ioda2_phb(np);
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}
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/* Look for ioda2 built-in PHB3's */
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for_each_compatible_node(np, NULL, "ibm,ioda2-phb")
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pnv_pci_init_ioda2_phb(np);
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/* Setup the linkage between OF nodes and PHBs */
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pci_devs_phb_init();
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@ -32,7 +32,6 @@
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#include <asm/machdep.h>
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#include <asm/firmware.h>
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#include <asm/xics.h>
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#include <asm/rtas.h>
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#include <asm/opal.h>
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#include <asm/kexec.h>
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#include <asm/smp.h>
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@ -278,20 +277,6 @@ static void __init pnv_setup_machdep_opal(void)
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ppc_md.handle_hmi_exception = opal_handle_hmi_exception;
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}
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#ifdef CONFIG_PPC_POWERNV_RTAS
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static void __init pnv_setup_machdep_rtas(void)
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{
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if (rtas_token("get-time-of-day") != RTAS_UNKNOWN_SERVICE) {
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ppc_md.get_boot_time = rtas_get_boot_time;
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ppc_md.get_rtc_time = rtas_get_rtc_time;
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ppc_md.set_rtc_time = rtas_set_rtc_time;
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}
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ppc_md.restart = rtas_restart;
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pm_power_off = rtas_power_off;
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ppc_md.halt = rtas_halt;
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}
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#endif /* CONFIG_PPC_POWERNV_RTAS */
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static u32 supported_cpuidle_states;
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int pnv_save_sprs_for_winkle(void)
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@ -470,10 +455,6 @@ static int __init pnv_probe(void)
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if (firmware_has_feature(FW_FEATURE_OPAL))
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pnv_setup_machdep_opal();
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#ifdef CONFIG_PPC_POWERNV_RTAS
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else if (rtas.base)
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pnv_setup_machdep_rtas();
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#endif /* CONFIG_PPC_POWERNV_RTAS */
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pr_debug("PowerNV detected !\n");
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@ -25,7 +25,6 @@
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#include <asm/machdep.h>
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#include <asm/cputable.h>
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#include <asm/firmware.h>
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#include <asm/rtas.h>
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#include <asm/vdso_datapage.h>
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#include <asm/cputhreads.h>
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#include <asm/xics.h>
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@ -241,18 +240,6 @@ void __init pnv_smp_init(void)
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{
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smp_ops = &pnv_smp_ops;
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/* XXX We don't yet have a proper entry point from HAL, for
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* now we rely on kexec-style entry from BML
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*/
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#ifdef CONFIG_PPC_RTAS
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/* Non-lpar has additional take/give timebase */
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if (rtas_token("freeze-time-base") != RTAS_UNKNOWN_SERVICE) {
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smp_ops->give_timebase = rtas_give_timebase;
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smp_ops->take_timebase = rtas_take_timebase;
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}
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#endif /* CONFIG_PPC_RTAS */
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#ifdef CONFIG_HOTPLUG_CPU
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ppc_md.cpu_die = pnv_smp_cpu_kill_self;
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#endif
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