One fix for a bad revert in ingenic-drm, and one fix for panfrost to increase a timeout at power up.
-----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCX4VPpAAKCRDj7w1vZxhR xWX9AQCl1ePD7dbcLVMTcZYKVaQk55rFayqkscxuiSbCfbaNEgEAj03vDvkQdJ7O dZrCcQTBnsvVJt6B2e82Pnax0rwWkgI= =wqMd -----END PGP SIGNATURE----- Merge tag 'drm-misc-next-fixes-2020-10-13' of git://anongit.freedesktop.org/drm/drm-misc into drm-next One fix for a bad revert in ingenic-drm, and one fix for panfrost to increase a timeout at power up. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Maxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/20201013065709.lwjw3fthoxwsbqsl@gilmour.lan
This commit is contained in:
commit
640eee067d
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@ -5594,12 +5594,13 @@ S: Maintained
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F: Documentation/devicetree/bindings/display/panel/raydium,rm67191.yaml
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F: drivers/gpu/drm/panel/panel-raydium-rm67191.c
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DRM DRIVER FOR ROCKTECH JH057N00900 PANELS
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DRM DRIVER FOR SITRONIX ST7703 PANELS
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M: Guido Günther <agx@sigxcpu.org>
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R: Purism Kernel Team <kernel@puri.sm>
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R: Ondrej Jirman <megous@megous.com>
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S: Maintained
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F: Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.txt
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F: drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c
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F: Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml
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F: drivers/gpu/drm/panel/panel-sitronix-st7703.c
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DRM DRIVER FOR SAVAGE VIDEO CARDS
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S: Orphan / Obsolete
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@ -9,8 +9,6 @@
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#include <linux/component.h>
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#include <linux/clk.h>
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#include <linux/dma-mapping.h>
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#include <linux/dma-noncoherent.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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@ -21,7 +19,6 @@
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#include <drm/drm_bridge.h>
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#include <drm/drm_crtc.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_damage_helper.h>
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#include <drm/drm_drv.h>
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#include <drm/drm_gem_cma_helper.h>
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#include <drm/drm_fb_cma_helper.h>
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@ -79,11 +76,6 @@ static const u32 ingenic_drm_primary_formats[] = {
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DRM_FORMAT_XRGB8888,
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};
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static bool ingenic_drm_cached_gem_buf;
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module_param_named(cached_gem_buffers, ingenic_drm_cached_gem_buf, bool, 0400);
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MODULE_PARM_DESC(cached_gem_buffers,
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"Enable fully cached GEM buffers [default=false]");
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static bool ingenic_drm_writeable_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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@ -346,8 +338,6 @@ static int ingenic_drm_plane_atomic_check(struct drm_plane *plane,
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plane->state->fb->format->format != state->fb->format->format))
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crtc_state->mode_changed = true;
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drm_atomic_helper_check_plane_damage(state->state, state);
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return 0;
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}
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@ -450,38 +440,6 @@ void ingenic_drm_plane_config(struct device *dev,
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}
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}
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void ingenic_drm_sync_data(struct device *dev,
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struct drm_plane_state *old_state,
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struct drm_plane_state *state)
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{
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const struct drm_format_info *finfo = state->fb->format;
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struct ingenic_drm *priv = dev_get_drvdata(dev);
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struct drm_atomic_helper_damage_iter iter;
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unsigned int offset, i;
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struct drm_rect clip;
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dma_addr_t paddr;
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void *addr;
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if (!ingenic_drm_cached_gem_buf)
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return;
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drm_atomic_helper_damage_iter_init(&iter, old_state, state);
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drm_atomic_for_each_plane_damage(&iter, &clip) {
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for (i = 0; i < finfo->num_planes; i++) {
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paddr = drm_fb_cma_get_gem_addr(state->fb, state, i);
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addr = phys_to_virt(paddr);
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/* Ignore x1/x2 values, invalidate complete lines */
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offset = clip.y1 * state->fb->pitches[i];
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dma_cache_sync(priv->dev, addr + offset,
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(clip.y2 - clip.y1) * state->fb->pitches[i],
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DMA_TO_DEVICE);
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}
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}
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}
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static void ingenic_drm_plane_atomic_update(struct drm_plane *plane,
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struct drm_plane_state *oldstate)
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{
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@ -492,8 +450,6 @@ static void ingenic_drm_plane_atomic_update(struct drm_plane *plane,
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dma_addr_t addr;
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if (state && state->fb) {
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ingenic_drm_sync_data(priv->dev, oldstate, state);
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addr = drm_fb_cma_get_gem_addr(state->fb, state, 0);
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width = state->src_w >> 16;
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height = state->src_h >> 16;
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@ -649,69 +605,7 @@ static void ingenic_drm_disable_vblank(struct drm_crtc *crtc)
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regmap_update_bits(priv->map, JZ_REG_LCD_CTRL, JZ_LCD_CTRL_EOF_IRQ, 0);
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}
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static struct drm_framebuffer *
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ingenic_drm_gem_fb_create(struct drm_device *dev, struct drm_file *file,
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const struct drm_mode_fb_cmd2 *mode_cmd)
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{
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if (ingenic_drm_cached_gem_buf)
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return drm_gem_fb_create_with_dirty(dev, file, mode_cmd);
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return drm_gem_fb_create(dev, file, mode_cmd);
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}
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static int ingenic_drm_gem_mmap(struct drm_gem_object *obj,
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struct vm_area_struct *vma)
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{
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struct drm_gem_cma_object *cma_obj = to_drm_gem_cma_obj(obj);
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struct device *dev = cma_obj->base.dev->dev;
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unsigned long attrs;
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int ret;
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if (ingenic_drm_cached_gem_buf)
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attrs = DMA_ATTR_NON_CONSISTENT;
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else
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attrs = DMA_ATTR_WRITE_COMBINE;
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/*
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* Clear the VM_PFNMAP flag that was set by drm_gem_mmap(), and set the
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* vm_pgoff (used as a fake buffer offset by DRM) to 0 as we want to map
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* the whole buffer.
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*/
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vma->vm_flags &= ~VM_PFNMAP;
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vma->vm_pgoff = 0;
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vma->vm_page_prot = vm_get_page_prot(vma->vm_flags);
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ret = dma_mmap_attrs(dev, vma, cma_obj->vaddr, cma_obj->paddr,
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vma->vm_end - vma->vm_start, attrs);
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if (ret)
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drm_gem_vm_close(vma);
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return ret;
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}
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static int ingenic_drm_gem_cma_mmap(struct file *filp,
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struct vm_area_struct *vma)
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{
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int ret;
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ret = drm_gem_mmap(filp, vma);
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if (ret)
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return ret;
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return ingenic_drm_gem_mmap(vma->vm_private_data, vma);
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}
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static const struct file_operations ingenic_drm_fops = {
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.owner = THIS_MODULE,
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.open = drm_open,
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.release = drm_release,
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.unlocked_ioctl = drm_ioctl,
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.compat_ioctl = drm_compat_ioctl,
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.poll = drm_poll,
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.read = drm_read,
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.llseek = noop_llseek,
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.mmap = ingenic_drm_gem_cma_mmap,
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};
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DEFINE_DRM_GEM_CMA_FOPS(ingenic_drm_fops);
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static struct drm_driver ingenic_drm_driver_data = {
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.driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_ATOMIC,
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@ -775,7 +669,7 @@ static const struct drm_encoder_helper_funcs ingenic_drm_encoder_helper_funcs =
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};
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static const struct drm_mode_config_funcs ingenic_drm_mode_config_funcs = {
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.fb_create = ingenic_drm_gem_fb_create,
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.fb_create = drm_gem_fb_create,
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.output_poll_changed = drm_fb_helper_output_poll_changed,
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.atomic_check = drm_atomic_helper_check,
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.atomic_commit = drm_atomic_helper_commit,
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@ -902,8 +796,6 @@ static int ingenic_drm_bind(struct device *dev, bool has_components)
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return ret;
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}
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drm_plane_enable_fb_damage_clips(&priv->f1);
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drm_crtc_helper_add(&priv->crtc, &ingenic_drm_crtc_helper_funcs);
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ret = drm_crtc_init_with_planes(drm, &priv->crtc, &priv->f1,
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@ -929,8 +821,6 @@ static int ingenic_drm_bind(struct device *dev, bool has_components)
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return ret;
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}
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drm_plane_enable_fb_damage_clips(&priv->f0);
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if (IS_ENABLED(CONFIG_DRM_INGENIC_IPU) && has_components) {
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ret = component_bind_all(dev, drm);
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if (ret) {
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@ -168,10 +168,6 @@ void ingenic_drm_plane_config(struct device *dev,
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struct drm_plane *plane, u32 fourcc);
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void ingenic_drm_plane_disable(struct device *dev, struct drm_plane *plane);
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void ingenic_drm_sync_data(struct device *dev,
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struct drm_plane_state *old_state,
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struct drm_plane_state *state);
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extern struct platform_driver *ingenic_ipu_driver_ptr;
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#endif /* DRIVERS_GPU_DRM_INGENIC_INGENIC_DRM_H */
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@ -20,7 +20,6 @@
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_damage_helper.h>
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#include <drm/drm_drv.h>
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#include <drm/drm_fb_cma_helper.h>
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#include <drm/drm_fourcc.h>
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JZ_IPU_CTRL_CHIP_EN | JZ_IPU_CTRL_LCDC_SEL);
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}
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ingenic_drm_sync_data(ipu->master, oldstate, state);
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/* New addresses will be committed in vblank handler... */
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ipu->addr_y = drm_fb_cma_get_gem_addr(state->fb, state, 0);
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if (finfo->num_planes > 1)
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if (!state->crtc ||
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!crtc_state->mode.hdisplay || !crtc_state->mode.vdisplay)
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goto out_check_damage;
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return 0;
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/* Plane must be fully visible */
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if (state->crtc_x < 0 || state->crtc_y < 0 ||
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return -EINVAL;
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if (!osd_changed(state, plane->state))
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goto out_check_damage;
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return 0;
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crtc_state->mode_changed = true;
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ipu->denom_w = denom_w;
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ipu->denom_h = denom_h;
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out_check_damage:
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drm_atomic_helper_check_plane_damage(state->state, state);
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return 0;
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}
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return err;
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}
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drm_plane_enable_fb_damage_clips(plane);
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/*
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* Sharpness settings range is [0,32]
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* 0 : nearest-neighbor
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@ -325,13 +325,13 @@ void panfrost_gpu_power_on(struct panfrost_device *pfdev)
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/* Just turn on everything for now */
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gpu_write(pfdev, L2_PWRON_LO, pfdev->features.l2_present);
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ret = readl_relaxed_poll_timeout(pfdev->iomem + L2_READY_LO,
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val, val == pfdev->features.l2_present, 100, 1000);
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val, val == pfdev->features.l2_present, 100, 20000);
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if (ret)
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dev_err(pfdev->dev, "error powering up gpu L2");
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gpu_write(pfdev, SHADER_PWRON_LO, pfdev->features.shader_present);
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ret = readl_relaxed_poll_timeout(pfdev->iomem + SHADER_READY_LO,
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val, val == pfdev->features.shader_present, 100, 1000);
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val, val == pfdev->features.shader_present, 100, 20000);
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if (ret)
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dev_err(pfdev->dev, "error powering up gpu shader");
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