sh-pfc: Add support for sparse pin numbers
The PFC driver assumes that the value of the GPIO_PORTxxx enumeration names are equal to the port number. This isn't true when the port number space is sparse, as with the SH73A0. Fix the issue by adding support for pin numbers ranges specified through SoC data. When no range is specified the driver considers that the PFC implements a single contiguous range for all pins. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
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247127f90b
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@ -80,7 +80,24 @@ static void __iomem *sh_pfc_phys_to_virt(struct sh_pfc *pfc,
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struct sh_pfc_pin *sh_pfc_get_pin(struct sh_pfc *pfc, unsigned int pin)
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{
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return &pfc->info->pins[pin];
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unsigned int offset;
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unsigned int i;
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if (pfc->info->ranges == NULL)
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return &pfc->info->pins[pin];
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for (i = 0, offset = 0; i < pfc->info->nr_ranges; ++i) {
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const struct pinmux_range *range = &pfc->info->ranges[i];
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if (pin <= range->end)
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return pin >= range->begin
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? &pfc->info->pins[offset + pin - range->begin]
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: NULL;
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offset += range->end - range->begin + 1;
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}
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return NULL;
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}
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static int sh_pfc_enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r)
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@ -32,6 +32,8 @@ struct sh_pfc {
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unsigned int num_windows;
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struct sh_pfc_window *window;
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unsigned int nr_pins;
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struct sh_pfc_chip *gpio;
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struct sh_pfc_chip *func;
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@ -45,7 +45,7 @@ static int gpio_pin_request(struct gpio_chip *gc, unsigned offset)
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struct sh_pfc *pfc = gpio_to_pfc(gc);
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struct sh_pfc_pin *pin = sh_pfc_get_pin(pfc, offset);
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if (pin->enum_id == 0)
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if (pin == NULL || pin->enum_id == 0)
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return -EINVAL;
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return pinctrl_request_gpio(offset);
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@ -127,7 +127,7 @@ static void gpio_pin_setup(struct sh_pfc_chip *chip)
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gc->dev = pfc->dev;
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gc->owner = THIS_MODULE;
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gc->base = 0;
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gc->ngpio = pfc->info->nr_pins;
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gc->ngpio = pfc->nr_pins;
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}
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/* -----------------------------------------------------------------------------
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@ -184,7 +184,7 @@ static void gpio_function_setup(struct sh_pfc_chip *chip)
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gc->label = pfc->info->name;
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gc->owner = THIS_MODULE;
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gc->base = pfc->info->nr_pins;
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gc->base = pfc->nr_pins;
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gc->ngpio = pfc->info->nr_func_gpios;
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}
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@ -219,20 +219,43 @@ sh_pfc_add_gpiochip(struct sh_pfc *pfc, void(*setup)(struct sh_pfc_chip *))
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int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
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{
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const struct pinmux_range *ranges;
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struct pinmux_range def_range;
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struct sh_pfc_chip *chip;
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unsigned int nr_ranges;
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unsigned int i;
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int ret;
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/* Register the real GPIOs chip. */
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chip = sh_pfc_add_gpiochip(pfc, gpio_pin_setup);
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if (IS_ERR(chip))
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return PTR_ERR(chip);
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pfc->gpio = chip;
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ret = gpiochip_add_pin_range(&chip->gpio_chip, dev_name(pfc->dev), 0, 0,
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chip->gpio_chip.ngpio);
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if (ret < 0)
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return ret;
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/* Register the GPIO to pin mappings. */
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if (pfc->info->ranges == NULL) {
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def_range.begin = 0;
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def_range.end = pfc->info->nr_pins - 1;
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ranges = &def_range;
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nr_ranges = 1;
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} else {
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ranges = pfc->info->ranges;
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nr_ranges = pfc->info->nr_ranges;
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}
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for (i = 0; i < nr_ranges; ++i) {
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const struct pinmux_range *range = &ranges[i];
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ret = gpiochip_add_pin_range(&chip->gpio_chip,
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dev_name(pfc->dev),
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range->begin, range->begin,
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range->end - range->begin + 1);
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if (ret < 0)
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return ret;
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}
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/* Register the function GPIOs chip. */
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chip = sh_pfc_add_gpiochip(pfc, gpio_function_setup);
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if (IS_ERR(chip))
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return PTR_ERR(chip);
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@ -293,29 +293,48 @@ static const struct pinconf_ops sh_pfc_pinconf_ops = {
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.pin_config_dbg_show = sh_pfc_pinconf_dbg_show,
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};
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/* pinmux ranges -> pinctrl pin descs */
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static int sh_pfc_map_gpios(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
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/* PFC ranges -> pinctrl pin descs */
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static int sh_pfc_map_pins(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
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{
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int i;
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const struct pinmux_range *ranges;
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struct pinmux_range def_range;
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unsigned int nr_ranges;
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unsigned int nr_pins;
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unsigned int i;
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pmx->nr_pads = pfc->info->nr_pins;
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if (pfc->info->ranges == NULL) {
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def_range.begin = 0;
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def_range.end = pfc->info->nr_pins - 1;
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ranges = &def_range;
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nr_ranges = 1;
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} else {
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ranges = pfc->info->ranges;
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nr_ranges = pfc->info->nr_ranges;
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}
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pmx->pads = devm_kzalloc(pfc->dev, sizeof(*pmx->pads) * pmx->nr_pads,
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pmx->pads = devm_kzalloc(pfc->dev,
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sizeof(*pmx->pads) * pfc->info->nr_pins,
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GFP_KERNEL);
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if (unlikely(!pmx->pads)) {
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pmx->nr_pads = 0;
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if (unlikely(!pmx->pads))
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return -ENOMEM;
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for (i = 0, nr_pins = 0; i < nr_ranges; ++i) {
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const struct pinmux_range *range = &ranges[i];
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unsigned int number;
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for (number = range->begin; number <= range->end;
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number++, nr_pins++) {
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struct pinctrl_pin_desc *pin = &pmx->pads[nr_pins];
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struct sh_pfc_pin *info = &pfc->info->pins[nr_pins];
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pin->number = number;
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pin->name = info->name;
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}
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}
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for (i = 0; i < pmx->nr_pads; i++) {
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struct pinctrl_pin_desc *pin = pmx->pads + i;
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struct sh_pfc_pin *gpio = pfc->info->pins + i;
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pfc->nr_pins = ranges[nr_ranges-1].end + 1;
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pin->number = i;
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pin->name = gpio->name;
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}
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return 0;
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return nr_ranges;
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}
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static int sh_pfc_map_functions(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
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@ -347,6 +366,7 @@ static int sh_pfc_map_functions(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
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int sh_pfc_register_pinctrl(struct sh_pfc *pfc)
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{
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struct sh_pfc_pinctrl *pmx;
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int nr_ranges;
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int ret;
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pmx = devm_kzalloc(pfc->dev, sizeof(*pmx), GFP_KERNEL);
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@ -356,9 +376,9 @@ int sh_pfc_register_pinctrl(struct sh_pfc *pfc)
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pmx->pfc = pfc;
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pfc->pinctrl = pmx;
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ret = sh_pfc_map_gpios(pfc, pmx);
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if (unlikely(ret != 0))
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return ret;
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nr_ranges = sh_pfc_map_pins(pfc, pmx);
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if (unlikely(nr_ranges < 0))
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return nr_ranges;
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ret = sh_pfc_map_functions(pfc, pmx);
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if (unlikely(ret != 0))
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@ -370,7 +390,7 @@ int sh_pfc_register_pinctrl(struct sh_pfc *pfc)
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pmx->pctl_desc.pmxops = &sh_pfc_pinmux_ops;
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pmx->pctl_desc.confops = &sh_pfc_pinconf_ops;
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pmx->pctl_desc.pins = pmx->pads;
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pmx->pctl_desc.npins = pmx->nr_pads;
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pmx->pctl_desc.npins = pfc->info->nr_pins;
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pmx->pctl = pinctrl_register(&pmx->pctl_desc, pfc->dev, pmx);
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if (IS_ERR(pmx->pctl))
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@ -111,6 +111,8 @@ struct sh_pfc_soc_info {
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struct sh_pfc_pin *pins;
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unsigned int nr_pins;
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const struct pinmux_range *ranges;
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unsigned int nr_ranges;
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struct pinmux_func *func_gpios;
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unsigned int nr_func_gpios;
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