media: atomisp: reorganize the code under gmin_subdev_add()
The gmin_subdev_add() currently doesn't use ACPI device power management. In order to prepare for adding support for it, let's shift some things, placing the PM-related stuff at the end of the probing logic. Let's also store the current gs on a temporary var, in order to simplify the source code. Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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@ -447,6 +447,7 @@ static struct gmin_subdev *gmin_subdev_add(struct v4l2_subdev *subdev)
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{
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struct i2c_client *power = NULL, *client = v4l2_get_subdevdata(subdev);
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struct acpi_device *adev;
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struct gmin_subdev *gs;
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acpi_handle handle;
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struct device *dev;
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int i, ret, clock_num;
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@ -457,16 +458,39 @@ static struct gmin_subdev *gmin_subdev_add(struct v4l2_subdev *subdev)
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dev = &client->dev;
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handle = ACPI_HANDLE(dev);
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// FIXME: may need to release resources allocated by acpi_bus_get_device()
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if (!handle || acpi_bus_get_device(handle, &adev)) {
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dev_err(dev, "Error could not get ACPI device\n");
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return NULL;
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}
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adev = ACPI_COMPANION(&client->dev);
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dev_info(&client->dev, "%s: ACPI detected it on bus ID=%s, HID=%s\n",
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__func__, acpi_device_bid(adev), acpi_device_hid(adev));
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for (i = 0; i < MAX_SUBDEVS && gmin_subdevs[i].subdev; i++)
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;
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if (i >= MAX_SUBDEVS)
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return NULL;
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gs = &gmin_subdevs[i];
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gs->subdev = subdev;
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/*WA:CHT requires XTAL clock as PLL is not stable.*/
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gmin_subdevs[i].clock_src = gmin_get_var_int(dev, false, "ClkSrc",
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VLV2_CLK_PLL_19P2MHZ);
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gs->csi_port = gmin_get_var_int(dev, false, "CsiPort", 0);
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gs->csi_lanes = gmin_get_var_int(dev, false, "CsiLanes", 1);
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gs->gpio0 = gpiod_get_index(dev, NULL, 0, GPIOD_OUT_LOW);
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if (IS_ERR(gs->gpio0))
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gs->gpio0 = NULL;
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gs->gpio1 = gpiod_get_index(dev, NULL, 1, GPIOD_OUT_LOW);
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if (IS_ERR(gs->gpio1))
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gs->gpio1 = NULL;
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/*
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* FIXME: the code below doesn't rely on ACPI device_pm.c code to
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* set clocks and do power management.
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*/
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if (!pmic_id) {
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if (gmin_i2c_dev_exists(dev, PMIC_ACPI_TI, &power))
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pmic_id = PMIC_TI;
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@ -478,13 +502,8 @@ static struct gmin_subdev *gmin_subdev_add(struct v4l2_subdev *subdev)
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pmic_id = PMIC_REGULATOR;
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}
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for (i = 0; i < MAX_SUBDEVS && gmin_subdevs[i].subdev; i++)
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;
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if (i >= MAX_SUBDEVS)
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return NULL;
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if (power) {
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gmin_subdevs[i].pwm_i2c_addr = power->addr;
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gs->pwm_i2c_addr = power->addr;
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dev_info(dev,
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"gmin: power management provided via %s (i2c addr 0x%02x)\n",
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pmic_name[pmic_id], power->addr);
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@ -493,17 +512,7 @@ static struct gmin_subdev *gmin_subdev_add(struct v4l2_subdev *subdev)
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pmic_name[pmic_id]);
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}
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gmin_subdevs[i].subdev = subdev;
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/*WA:CHT requires XTAL clock as PLL is not stable.*/
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gmin_subdevs[i].clock_src = gmin_get_var_int(dev, false, "ClkSrc",
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VLV2_CLK_PLL_19P2MHZ);
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gmin_subdevs[i].csi_port = gmin_get_var_int(dev, false, "CsiPort", 0);
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gmin_subdevs[i].csi_lanes = gmin_get_var_int(dev, false, "CsiLanes", 1);
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/*
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* FIXME:
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*
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* According with :
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* https://github.com/projectceladon/hardware-intel-kernelflinger/blob/master/doc/fastboot.md
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*
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@ -526,9 +535,9 @@ static struct gmin_subdev *gmin_subdev_add(struct v4l2_subdev *subdev)
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snprintf(gmin_pmc_clk_name, sizeof(gmin_pmc_clk_name),
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"%s_%d", "pmc_plt_clk", clock_num);
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gmin_subdevs[i].pmc_clk = devm_clk_get(dev, gmin_pmc_clk_name);
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if (IS_ERR(gmin_subdevs[i].pmc_clk)) {
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ret = PTR_ERR(gmin_subdevs[i].pmc_clk);
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gs->pmc_clk = devm_clk_get(dev, gmin_pmc_clk_name);
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if (IS_ERR(gs->pmc_clk)) {
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ret = PTR_ERR(gs->pmc_clk);
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dev_err(dev,
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"Failed to get clk from %s : %d\n",
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@ -549,25 +558,17 @@ static struct gmin_subdev *gmin_subdev_add(struct v4l2_subdev *subdev)
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* to disable a clock that has not been enabled,
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* we need to enable the clock first.
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*/
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ret = clk_prepare_enable(gmin_subdevs[i].pmc_clk);
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ret = clk_prepare_enable(gs->pmc_clk);
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if (!ret)
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clk_disable_unprepare(gmin_subdevs[i].pmc_clk);
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gmin_subdevs[i].gpio0 = gpiod_get_index(dev, NULL, 0, GPIOD_OUT_LOW);
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if (IS_ERR(gmin_subdevs[i].gpio0))
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gmin_subdevs[i].gpio0 = NULL;
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gmin_subdevs[i].gpio1 = gpiod_get_index(dev, NULL, 1, GPIOD_OUT_LOW);
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if (IS_ERR(gmin_subdevs[i].gpio1))
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gmin_subdevs[i].gpio1 = NULL;
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clk_disable_unprepare(gs->pmc_clk);
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switch (pmic_id) {
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case PMIC_REGULATOR:
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gmin_subdevs[i].v1p8_reg = regulator_get(dev, "V1P8SX");
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gmin_subdevs[i].v2p8_reg = regulator_get(dev, "V2P8SX");
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gs->v1p8_reg = regulator_get(dev, "V1P8SX");
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gs->v2p8_reg = regulator_get(dev, "V2P8SX");
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gmin_subdevs[i].v1p2_reg = regulator_get(dev, "V1P2A");
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gmin_subdevs[i].v2p8_vcm_reg = regulator_get(dev, "VPROG4B");
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gs->v1p2_reg = regulator_get(dev, "V1P2A");
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gs->v2p8_vcm_reg = regulator_get(dev, "VPROG4B");
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/* Note: ideally we would initialize v[12]p8_on to the
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* output of regulator_is_enabled(), but sadly that
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@ -579,32 +580,32 @@ static struct gmin_subdev *gmin_subdev_add(struct v4l2_subdev *subdev)
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break;
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case PMIC_AXP:
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gmin_subdevs[i].eldo1_1p8v = gmin_get_var_int(dev, false,
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"eldo1_1p8v",
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ELDO1_1P8V);
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gmin_subdevs[i].eldo1_sel_reg = gmin_get_var_int(dev, false,
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"eldo1_sel_reg",
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ELDO1_SEL_REG);
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gmin_subdevs[i].eldo1_ctrl_shift = gmin_get_var_int(dev, false,
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"eldo1_ctrl_shift",
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ELDO1_CTRL_SHIFT);
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gmin_subdevs[i].eldo2_1p8v = gmin_get_var_int(dev, false,
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"eldo2_1p8v",
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ELDO2_1P8V);
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gmin_subdevs[i].eldo2_sel_reg = gmin_get_var_int(dev, false,
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"eldo2_sel_reg",
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ELDO2_SEL_REG);
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gmin_subdevs[i].eldo2_ctrl_shift = gmin_get_var_int(dev, false,
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"eldo2_ctrl_shift",
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ELDO2_CTRL_SHIFT);
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gmin_subdevs[i].pwm_i2c_addr = power->addr;
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gs->eldo1_1p8v = gmin_get_var_int(dev, false,
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"eldo1_1p8v",
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ELDO1_1P8V);
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gs->eldo1_sel_reg = gmin_get_var_int(dev, false,
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"eldo1_sel_reg",
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ELDO1_SEL_REG);
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gs->eldo1_ctrl_shift = gmin_get_var_int(dev, false,
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"eldo1_ctrl_shift",
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ELDO1_CTRL_SHIFT);
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gs->eldo2_1p8v = gmin_get_var_int(dev, false,
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"eldo2_1p8v",
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ELDO2_1P8V);
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gs->eldo2_sel_reg = gmin_get_var_int(dev, false,
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"eldo2_sel_reg",
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ELDO2_SEL_REG);
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gs->eldo2_ctrl_shift = gmin_get_var_int(dev, false,
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"eldo2_ctrl_shift",
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ELDO2_CTRL_SHIFT);
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gs->pwm_i2c_addr = power->addr;
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break;
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default:
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break;
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}
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return &gmin_subdevs[i];
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return gs;
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}
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static struct gmin_subdev *find_gmin_subdev(struct v4l2_subdev *subdev)
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