MIPS: JZ4740: register an irq_domain for the interrupt controller
When probing the interrupt controller, register an IRQ domain such that the interrupts can be translated by devicetree code & thus used from devicetree. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: Brian Norris <computersforpeace@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/10140/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -85,6 +85,7 @@ static int __init jz4740_intc_of_init(struct device_node *node,
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{
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struct irq_chip_generic *gc;
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struct irq_chip_type *ct;
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struct irq_domain *domain;
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int parent_irq;
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parent_irq = irq_of_parse_and_map(node, 0);
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@ -113,6 +114,11 @@ static int __init jz4740_intc_of_init(struct device_node *node,
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irq_setup_generic_chip(gc, IRQ_MSK(32), 0, 0, IRQ_NOPROBE | IRQ_LEVEL);
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domain = irq_domain_add_legacy(node, num_chips * 32, JZ4740_IRQ_BASE, 0,
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&irq_domain_simple_ops, NULL);
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if (!domain)
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pr_warn("unable to register IRQ domain\n");
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setup_irq(parent_irq, &jz4740_cascade_action);
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return 0;
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}
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