ARM: EXYNOS4: Add support PPI in external GIC
To support PPI in external GIC of EXYNOS4 SoCs, gic_arch_extn.irq_eoi, irq_unmask and irq_mask are fixed. This patch is necessary because external GIC of EXYNOS4 cannot support register banking. Signed-off-by: Changhwan Youn <chaos.youn@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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@ -198,20 +198,25 @@ void __init exynos4_init_clocks(int xtal)
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exynos4_setup_clocks();
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}
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static void exynos4_gic_irq_eoi(struct irq_data *d)
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static void exynos4_gic_irq_fix_base(struct irq_data *d)
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{
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struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d);
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gic_data->cpu_base = S5P_VA_GIC_CPU +
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(EXYNOS4_GIC_BANK_OFFSET * smp_processor_id());
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gic_data->dist_base = S5P_VA_GIC_DIST +
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(EXYNOS4_GIC_BANK_OFFSET * smp_processor_id());
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}
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void __init exynos4_init_irq(void)
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{
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int irq;
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gic_init(0, IRQ_SPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU);
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gic_arch_extn.irq_eoi = exynos4_gic_irq_eoi;
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gic_init(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU);
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gic_arch_extn.irq_eoi = exynos4_gic_irq_fix_base;
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gic_arch_extn.irq_unmask = exynos4_gic_irq_fix_base;
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gic_arch_extn.irq_mask = exynos4_gic_irq_fix_base;
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for (irq = 0; irq < MAX_COMBINER_NR; irq++) {
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