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ARM: SoC fixes for v5.8 

This time there are a number of actual code fixes, plus
 a small set of device tree issues getting addressed:
 
   - Renesas:
     - one defconfig cleanup to allow a later Kconfig change
 
   - Intel socfpga:
     - enable QSPI devices on some machines
     - fix DTC validation warnings
 
   - TI OMAP:
     - Two DEBUG_ATOMIC_SLEEP fixes for ti-sysc interconnect target module
       driver
 
     - A regression fix for ti-sysc no-idle handling that caused issues
       compared to earlier platform data based booting
 
     - A fix for memory leak for omap_hwmod_allocate_module
 
     - Fix d_can driver probe for am437x
 
   - NXP i.MX
     - A couple of fixes on i.MX platform device registration code to stop
       the use of invalid IRQ 0.
     - Fix a regression seen on ls1021a platform, caused by commit
       52102a3ba6 ("soc: imx: move cpu code to drivers/soc/imx").
     - Fix a misconfiguration of audio SSI on imx6qdl-gw551x board.
 
   - Amlogic Meson
     - misc DT fixes
     - SoC ID fixes to detect all chips correctly
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'arm-fixes-5.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc into master

Pull ARM SoC fixes from Arnd Bergmann:
 "This time there are a number of actual code fixes, plus a small set of
  device tree issues getting addressed:

  Renesas:

    - one defconfig cleanup to allow a later Kconfig change

  Intel socfpga:

    - enable QSPI devices on some machines

    - fix DTC validation warnings

  TI OMAP:

    - Two DEBUG_ATOMIC_SLEEP fixes for ti-sysc interconnect target
      module driver

    - A regression fix for ti-sysc no-idle handling that caused issues
      compared to earlier platform data based booting

    - A fix for memory leak for omap_hwmod_allocate_module

    - Fix d_can driver probe for am437x

  NXP i.MX:

    - A couple of fixes on i.MX platform device registration code to
      stop the use of invalid IRQ 0.

    - Fix a regression seen on ls1021a platform, caused by commit
      52102a3ba6 ("soc: imx: move cpu code to drivers/soc/imx").

    - Fix a misconfiguration of audio SSI on imx6qdl-gw551x board.

  Amlogic Meson:

    - misc DT fixes

    - SoC ID fixes to detect all chips correctly"

* tag 'arm-fixes-5.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  arm64: dts: spcfpga: Align GIC, NAND and UART nodenames with dtschema
  ARM: dts: socfpga: Align L2 cache-controller nodename with dtschema
  arm64: dts: stratix10: increase QSPI reg address in nand dts file
  arm64: dts: stratix10: add status to qspi dts node
  arm64: dts: agilex: add status to qspi dts node
  ARM: dts: Fix dcan driver probe failed on am437x platform
  ARM: OMAP2+: Fix possible memory leak in omap_hwmod_allocate_module
  arm64: defconfig: Enable CONFIG_PCIE_RCAR_HOST
  soc: imx: check ls1021a
  ARM: imx: Remove imx_add_imx_dma() unused irq_err argument
  ARM: imx: Provide correct number of resources when registering gpio devices
  ARM: dts: imx6qdl-gw551x: fix audio SSI
  bus: ti-sysc: Do not disable on suspend for no-idle
  bus: ti-sysc: Fix sleeping function called from invalid context for RTC quirk
  bus: ti-sysc: Fix wakeirq sleeping function called from invalid context
  ARM: dts: meson: Align L2 cache-controller nodename with dtschema
  arm64: dts: meson-gxl-s805x: reduce initial Mali450 core frequency
  arm64: dts: meson: add missing gxl rng clock
  soc: amlogic: meson-gx-socinfo: Fix S905X3 and S905D3 ID's
This commit is contained in:
Linus Torvalds 2020-07-17 15:38:22 -07:00
parent a570f41989 2648298a06
commit 630c183b2d
23 changed files with 94 additions and 47 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
arch/arm/boot/dts/am437x-l4.dtsi
View File

@ -1540,8 +1540,9 @@
reg = <0xcc020 0x4>;
reg-names = "rev";
/* Domains (P, C): per_pwrdm, l4ls_clkdm */
clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN0_CLKCTRL 0>;
clock-names = "fck";
clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN0_CLKCTRL 0>,
<&dcan0_fck>;
clock-names = "fck", "osc";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0xcc000 0x2000>;
@ -1549,6 +1550,8 @@
dcan0: can@0 {
compatible = "ti,am4372-d_can", "ti,am3352-d_can";
reg = <0x0 0x2000>;
clocks = <&dcan0_fck>;
clock-names = "fck";
syscon-raminit = <&scm_conf 0x644 0>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
@ -1560,8 +1563,9 @@
reg = <0xd0020 0x4>;
reg-names = "rev";
/* Domains (P, C): per_pwrdm, l4ls_clkdm */
clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN1_CLKCTRL 0>;
clock-names = "fck";
clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN1_CLKCTRL 0>,
<&dcan1_fck>;
clock-names = "fck", "osc";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0xd0000 0x2000>;
@ -1569,6 +1573,8 @@
dcan1: can@0 {
compatible = "ti,am4372-d_can", "ti,am3352-d_can";
reg = <0x0 0x2000>;
clocks = <&dcan1_fck>;
clock-name = "fck";
syscon-raminit = <&scm_conf 0x644 1>;
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";

2
arch/arm/boot/dts/imx6qdl-gw551x.dtsi
View File

@ -110,7 +110,7 @@
simple-audio-card,frame-master = <&sound_codec>;
sound_cpu: simple-audio-card,cpu {
sound-dai = <&ssi2>;
sound-dai = <&ssi1>;
};
sound_codec: simple-audio-card,codec {

2
arch/arm/boot/dts/meson.dtsi
View File

@ -11,7 +11,7 @@
#size-cells = <1>;
interrupt-parent = <&gic>;
L2: l2-cache-controller@c4200000 {
L2: cache-controller@c4200000 {
compatible = "arm,pl310-cache";
reg = <0xc4200000 0x1000>;
cache-unified;

2
arch/arm/boot/dts/socfpga.dtsi
View File

@ -726,7 +726,7 @@
};
};
L2: l2-cache@fffef000 {
L2: cache-controller@fffef000 {
compatible = "arm,pl310-cache";
reg = <0xfffef000 0x1000>;
interrupts = <0 38 0x04>;

2
arch/arm/boot/dts/socfpga_arria10.dtsi
View File

@ -636,7 +636,7 @@
reg = <0xffcfb100 0x80>;
};
L2: l2-cache@fffff000 {
L2: cache-controller@fffff000 {
compatible = "arm,pl310-cache";
reg = <0xfffff000 0x1000>;
interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;

2
arch/arm/mach-imx/devices/devices-common.h
View File

@ -289,6 +289,6 @@ struct platform_device *__init imx_add_spi_imx(
const struct spi_imx_master *pdata);
struct platform_device *imx_add_imx_dma(char *name, resource_size_t iobase,
int irq, int irq_err);
int irq);
struct platform_device *imx_add_imx_sdma(char *name,
resource_size_t iobase, int irq, struct sdma_platform_data *pdata);

5
arch/arm/mach-imx/devices/platform-gpio-mxc.c
View File

@ -24,7 +24,8 @@ struct platform_device *__init mxc_register_gpio(char *name, int id,
.flags = IORESOURCE_IRQ,
},
};
unsigned int nres;
return platform_device_register_resndata(&mxc_aips_bus,
name, id, res, ARRAY_SIZE(res), NULL, 0);
nres = irq_high ? ARRAY_SIZE(res) : ARRAY_SIZE(res) - 1;
return platform_device_register_resndata(&mxc_aips_bus, name, id, res, nres, NULL, 0);
}

6
arch/arm/mach-imx/devices/platform-imx-dma.c
View File

@ -6,7 +6,7 @@
#include "devices-common.h"
struct platform_device __init __maybe_unused *imx_add_imx_dma(char *name,
resource_size_t iobase, int irq, int irq_err)
resource_size_t iobase, int irq)
{
struct resource res[] = {
{
@ -17,10 +17,6 @@ struct platform_device __init __maybe_unused *imx_add_imx_dma(char *name,
.start = irq,
.end = irq,
.flags = IORESOURCE_IRQ,
}, {
.start = irq_err,
.end = irq_err,
.flags = IORESOURCE_IRQ,
},
};

3
arch/arm/mach-imx/mm-imx21.c
View File

@ -78,8 +78,7 @@ void __init imx21_soc_init(void)
mxc_register_gpio("imx21-gpio", 5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
pinctrl_provide_dummies();
imx_add_imx_dma("imx21-dma", MX21_DMA_BASE_ADDR,
MX21_INT_DMACH0, 0); /* No ERR irq */
imx_add_imx_dma("imx21-dma", MX21_DMA_BASE_ADDR, MX21_INT_DMACH0);
platform_device_register_simple("imx21-audmux", 0, imx21_audmux_res,
ARRAY_SIZE(imx21_audmux_res));
}

3
arch/arm/mach-imx/mm-imx27.c
View File

@ -79,8 +79,7 @@ void __init imx27_soc_init(void)
mxc_register_gpio("imx21-gpio", 5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
pinctrl_provide_dummies();
imx_add_imx_dma("imx27-dma", MX27_DMA_BASE_ADDR,
MX27_INT_DMACH0, 0); /* No ERR irq */
imx_add_imx_dma("imx27-dma", MX27_DMA_BASE_ADDR, MX27_INT_DMACH0);
/* imx27 has the imx21 type audmux */
platform_device_register_simple("imx21-audmux", 0, imx27_audmux_res,
ARRAY_SIZE(imx27_audmux_res));

14
arch/arm/mach-omap2/omap_hwmod.c
View File

@ -3435,7 +3435,7 @@ static int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh,
regs = ioremap(data->module_pa,
data->module_size);
if (!regs)
return -ENOMEM;
goto out_free_sysc;
}
/*
@ -3445,13 +3445,13 @@ static int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh,
if (oh->class->name && strcmp(oh->class->name, data->name)) {
class = kmemdup(oh->class, sizeof(*oh->class), GFP_KERNEL);
if (!class)
return -ENOMEM;
goto out_unmap;
}
if (list_empty(&oh->slave_ports)) {
oi = kcalloc(1, sizeof(*oi), GFP_KERNEL);
if (!oi)
return -ENOMEM;
goto out_free_class;
/*
* Note that we assume interconnect interface clocks will be
@ -3478,6 +3478,14 @@ static int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh,
spin_unlock_irqrestore(&oh->_lock, flags);
return 0;
out_free_class:
kfree(class);
out_unmap:
iounmap(regs);
out_free_sysc:
kfree(sysc);
return -ENOMEM;
}
static const struct omap_hwmod_reset omap24xx_reset_quirks[] = {

8
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
View File

@ -77,7 +77,7 @@
method = "smc";
};
intc: intc@fffc1000 {
intc: interrupt-controller@fffc1000 {
compatible = "arm,gic-400", "arm,cortex-a15-gic";
#interrupt-cells = <3>;
interrupt-controller;
@ -302,7 +302,7 @@
status = "disabled";
};
nand: nand@ffb90000 {
nand: nand-controller@ffb90000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "altr,socfpga-denali-nand";
@ -445,7 +445,7 @@
clock-names = "timer";
};
uart0: serial0@ffc02000 {
uart0: serial@ffc02000 {
compatible = "snps,dw-apb-uart";
reg = <0xffc02000 0x100>;
interrupts = <0 108 4>;
@ -456,7 +456,7 @@
status = "disabled";
};
uart1: serial1@ffc02100 {
uart1: serial@ffc02100 {
compatible = "snps,dw-apb-uart";
reg = <0xffc02100 0x100>;
interrupts = <0 109 4>;

1
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
View File

@ -155,6 +155,7 @@
};
&qspi {
status = "okay";
flash@0 {
#address-cells = <1>;
#size-cells = <1>;

7
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts
View File

@ -188,6 +188,7 @@
};
&qspi {
status = "okay";
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
@ -211,12 +212,12 @@
qspi_boot: partition@0 {
label = "Boot and fpga data";
reg = <0x0 0x034B0000>;
reg = <0x0 0x03FE0000>;
};
qspi_rootfs: partition@4000000 {
qspi_rootfs: partition@3FE0000 {
label = "Root Filesystem - JFFS2";
reg = <0x034B0000 0x0EB50000>;
reg = <0x03FE0000 0x0C020000>;
};
};
};

2
arch/arm64/boot/dts/amlogic/meson-gxl-s805x-libretech-ac.dts
View File

@ -10,7 +10,7 @@
#include <dt-bindings/input/input.h>
#include <dt-bindings/sound/meson-aiu.h>
#include "meson-gxl-s905x.dtsi"
#include "meson-gxl-s805x.dtsi"
/ {
compatible = "libretech,aml-s805x-ac", "amlogic,s805x",

2
arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts
View File

@ -9,7 +9,7 @@
#include <dt-bindings/input/input.h>
#include "meson-gxl-s905x.dtsi"
#include "meson-gxl-s805x.dtsi"
/ {
compatible = "amlogic,p241", "amlogic,s805x", "amlogic,meson-gxl";

24
arch/arm64/boot/dts/amlogic/meson-gxl-s805x.dtsi Normal file
View File

@ -0,0 +1,24 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2020 BayLibre SAS
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
#include "meson-gxl-s905x.dtsi"
/ {
compatible = "amlogic,s805x", "amlogic,meson-gxl";
};
/* The S805X Package doesn't seem to handle the 744MHz OPP correctly */
&mali {
assigned-clocks = <&clkc CLKID_MALI_0_SEL>,
<&clkc CLKID_MALI_0>,
<&clkc CLKID_MALI>; /* Glitch free mux */
assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
<0>, /* Do Nothing */
<&clkc CLKID_MALI_0>;
assigned-clock-rates = <0>, /* Do Nothing */
<666666666>,
<0>; /* Do Nothing */
};

5
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
View File

@ -337,6 +337,11 @@
};
};
&hwrng {
clocks = <&clkc CLKID_RNG0>;
clock-names = "core";
};
&i2c_A {
clocks = <&clkc CLKID_I2C>;
};

1
arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
View File

@ -98,6 +98,7 @@
};
&qspi {
status = "okay";
flash@0 {
#address-cells = <1>;
#size-cells = <1>;

2
arch/arm64/configs/defconfig
View File

@ -194,7 +194,7 @@ CONFIG_HOTPLUG_PCI=y
CONFIG_HOTPLUG_PCI_ACPI=y
CONFIG_PCI_AARDVARK=y
CONFIG_PCI_TEGRA=y
CONFIG_PCIE_RCAR=y
CONFIG_PCIE_RCAR_HOST=y
CONFIG_PCI_HOST_GENERIC=y
CONFIG_PCI_XGENE=y
CONFIG_PCIE_ALTERA=y

23
drivers/bus/ti-sysc.c
View File

@ -236,15 +236,14 @@ static int sysc_wait_softreset(struct sysc *ddata)
syss_done = ddata->cfg.syss_mask;
if (syss_offset >= 0) {
error = readx_poll_timeout(sysc_read_sysstatus, ddata, rstval,
(rstval & ddata->cfg.syss_mask) ==
syss_done,
100, MAX_MODULE_SOFTRESET_WAIT);
error = readx_poll_timeout_atomic(sysc_read_sysstatus, ddata,
rstval, (rstval & ddata->cfg.syss_mask) ==
syss_done, 100, MAX_MODULE_SOFTRESET_WAIT);
} else if (ddata->cfg.quirks & SYSC_QUIRK_RESET_STATUS) {
error = readx_poll_timeout(sysc_read_sysconfig, ddata, rstval,
!(rstval & sysc_mask),
100, MAX_MODULE_SOFTRESET_WAIT);
error = readx_poll_timeout_atomic(sysc_read_sysconfig, ddata,
rstval, !(rstval & sysc_mask),
100, MAX_MODULE_SOFTRESET_WAIT);
}
return error;
@ -1279,7 +1278,8 @@ static int __maybe_unused sysc_noirq_suspend(struct device *dev)
ddata = dev_get_drvdata(dev);
if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)
if (ddata->cfg.quirks &
(SYSC_QUIRK_LEGACY_IDLE | SYSC_QUIRK_NO_IDLE))
return 0;
return pm_runtime_force_suspend(dev);
@ -1291,7 +1291,8 @@ static int __maybe_unused sysc_noirq_resume(struct device *dev)
ddata = dev_get_drvdata(dev);
if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)
if (ddata->cfg.quirks &
(SYSC_QUIRK_LEGACY_IDLE | SYSC_QUIRK_NO_IDLE))
return 0;
return pm_runtime_force_resume(dev);
@ -1728,8 +1729,8 @@ static void sysc_quirk_rtc(struct sysc *ddata, bool lock)
local_irq_save(flags);
/* RTC_STATUS BUSY bit may stay active for 1/32768 seconds (~30 usec) */
error = readl_poll_timeout(ddata->module_va + 0x44, val,
!(val & BIT(0)), 100, 50);
error = readl_poll_timeout_atomic(ddata->module_va + 0x44, val,
!(val & BIT(0)), 100, 50);
if (error)
dev_warn(ddata->dev, "rtc busy timeout\n");
/* Now we have ~15 microseconds to read/write various registers */

8
drivers/soc/amlogic/meson-gx-socinfo.c
View File

@ -66,10 +66,12 @@ static const struct meson_gx_package_id {
{ "A113D", 0x25, 0x22, 0xff },
{ "S905D2", 0x28, 0x10, 0xf0 },
{ "S905X2", 0x28, 0x40, 0xf0 },
{ "S922X", 0x29, 0x40, 0xf0 },
{ "A311D", 0x29, 0x10, 0xf0 },
{ "S905X3", 0x2b, 0x5, 0xf },
{ "S905D3", 0x2b, 0xb0, 0xf0 },
{ "S922X", 0x29, 0x40, 0xf0 },
{ "S905D3", 0x2b, 0x4, 0xf5 },
{ "S905X3", 0x2b, 0x5, 0xf5 },
{ "S905X3", 0x2b, 0x10, 0x3f },
{ "S905D3", 0x2b, 0x30, 0x3f },
{ "A113L", 0x2c, 0x0, 0xf8 },
};

3
drivers/soc/imx/soc-imx.c
View File

@ -33,6 +33,9 @@ static int __init imx_soc_device_init(void)
u32 val;
int ret;
if (of_machine_is_compatible("fsl,ls1021a"))
return 0;
soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
if (!soc_dev_attr)
return -ENOMEM;