[media] exynos4-is: Remove "sysreg" clock handling
The "sysreg" clock is required by multiple subsystems and none of the other drivers handles this clock explicitly. It is currently assumed that this clock is always on, left in its default state after system reset. Remove handling of this clock from the FIMC-IS driver to avoid breaking other subsystems. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
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@ -48,7 +48,6 @@ static char *fimc_is_clocks[ISS_CLKS_MAX] = {
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[ISS_CLK_LITE0] = "lite0",
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[ISS_CLK_LITE1] = "lite1",
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[ISS_CLK_MPLL] = "mpll",
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[ISS_CLK_SYSREG] = "sysreg",
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[ISS_CLK_ISP] = "isp",
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[ISS_CLK_DRC] = "drc",
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[ISS_CLK_FD] = "fd",
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@ -73,7 +73,6 @@ enum {
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ISS_CLK_LITE0,
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ISS_CLK_LITE1,
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ISS_CLK_MPLL,
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ISS_CLK_SYSREG,
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ISS_CLK_ISP,
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ISS_CLK_DRC,
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ISS_CLK_FD,
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