ASoC: rsnd: add Gen2 SRC and DMAEngine support
Renesas sound Gen2 has SRC (= Sampling Rate Converter) which needs 2 DMAC. The data path image when you use SRC on Gen2 is [mem] -> Audio-DMAC -> SRC -> Audio-DMAC-peri-peri -> SSIU -> SSI This patch support SRC and DMAEnine. It is tested on R-Car H2 Lager board Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Mark Brown <broonie@linaro.org>
This commit is contained in:
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eb854f6dff
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629509c5bc
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@ -56,9 +56,15 @@ struct rsnd_ssi_platform_info {
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*/
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*/
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#define RSND_SCU_USE_HPBIF (1 << 31) /* it needs RSND_SSI_DEPENDENT */
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#define RSND_SCU_USE_HPBIF (1 << 31) /* it needs RSND_SSI_DEPENDENT */
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#define RSND_SCU_SET(rate, _dma_id) \
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{ .flags = RSND_SCU_USE_HPBIF, .convert_rate = rate, .dma_id = _dma_id, }
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#define RSND_SCU_UNUSED \
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{ .flags = 0, .convert_rate = 0, .dma_id = 0, }
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struct rsnd_scu_platform_info {
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struct rsnd_scu_platform_info {
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u32 flags;
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u32 flags;
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u32 convert_rate; /* sampling rate convert */
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u32 convert_rate; /* sampling rate convert */
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int dma_id; /* for Gen2 SCU */
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};
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};
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/*
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/*
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@ -30,6 +30,144 @@ struct rsnd_adg {
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i++, (pos) = adg->clk[i])
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i++, (pos) = adg->clk[i])
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#define rsnd_priv_to_adg(priv) ((struct rsnd_adg *)(priv)->adg)
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#define rsnd_priv_to_adg(priv) ((struct rsnd_adg *)(priv)->adg)
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static u32 rsnd_adg_ssi_ws_timing_gen2(struct rsnd_mod *mod)
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{
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struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
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int id = rsnd_mod_id(mod);
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int ws = id;
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if (rsnd_ssi_is_pin_sharing(rsnd_ssi_mod_get(priv, id))) {
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switch (id) {
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case 1:
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case 2:
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ws = 0;
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break;
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case 4:
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ws = 3;
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break;
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case 8:
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ws = 7;
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break;
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}
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}
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return (0x6 + ws) << 8;
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}
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static int rsnd_adg_set_src_timsel_gen2(struct rsnd_dai *rdai,
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struct rsnd_mod *mod,
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struct rsnd_dai_stream *io,
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u32 timsel)
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{
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int is_play = rsnd_dai_is_play(rdai, io);
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int id = rsnd_mod_id(mod);
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int shift = (id % 2) ? 16 : 0;
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u32 mask, ws;
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u32 in, out;
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ws = rsnd_adg_ssi_ws_timing_gen2(mod);
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in = (is_play) ? timsel : ws;
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out = (is_play) ? ws : timsel;
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in = in << shift;
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out = out << shift;
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mask = 0xffff << shift;
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switch (id / 2) {
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case 0:
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rsnd_mod_bset(mod, SRCIN_TIMSEL0, mask, in);
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rsnd_mod_bset(mod, SRCOUT_TIMSEL0, mask, out);
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break;
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case 1:
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rsnd_mod_bset(mod, SRCIN_TIMSEL1, mask, in);
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rsnd_mod_bset(mod, SRCOUT_TIMSEL1, mask, out);
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break;
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case 2:
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rsnd_mod_bset(mod, SRCIN_TIMSEL2, mask, in);
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rsnd_mod_bset(mod, SRCOUT_TIMSEL2, mask, out);
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break;
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case 3:
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rsnd_mod_bset(mod, SRCIN_TIMSEL3, mask, in);
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rsnd_mod_bset(mod, SRCOUT_TIMSEL3, mask, out);
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break;
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case 4:
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rsnd_mod_bset(mod, SRCIN_TIMSEL4, mask, in);
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rsnd_mod_bset(mod, SRCOUT_TIMSEL4, mask, out);
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break;
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}
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return 0;
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}
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int rsnd_adg_set_convert_clk_gen2(struct rsnd_mod *mod,
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struct rsnd_dai *rdai,
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struct rsnd_dai_stream *io,
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unsigned int src_rate,
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unsigned int dst_rate)
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{
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struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
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struct rsnd_adg *adg = rsnd_priv_to_adg(priv);
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struct device *dev = rsnd_priv_to_dev(priv);
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int idx, sel, div, step;
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u32 val;
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unsigned int min, diff;
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unsigned int sel_rate [] = {
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clk_get_rate(adg->clk[CLKA]), /* 0000: CLKA */
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clk_get_rate(adg->clk[CLKB]), /* 0001: CLKB */
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clk_get_rate(adg->clk[CLKC]), /* 0010: CLKC */
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adg->rbga_rate_for_441khz_div_6,/* 0011: RBGA */
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adg->rbgb_rate_for_48khz_div_6, /* 0100: RBGB */
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};
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min = ~0;
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val = 0;
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for (sel = 0; sel < ARRAY_SIZE(sel_rate); sel++) {
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idx = 0;
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step = 2;
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if (!sel_rate[sel])
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continue;
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for (div = 2; div <= 98304; div += step) {
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diff = abs(src_rate - sel_rate[sel] / div);
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if (min > diff) {
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val = (sel << 8) | idx;
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min = diff;
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}
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/*
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* step of 0_0000 / 0_0001 / 0_1101
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* are out of order
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*/
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if ((idx > 2) && (idx % 2))
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step *= 2;
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if (idx == 0x1c) {
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div += step;
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step *= 2;
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}
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idx++;
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}
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}
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if (min == ~0) {
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dev_err(dev, "no Input clock\n");
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return -EIO;
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}
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return rsnd_adg_set_src_timsel_gen2(rdai, mod, io, val);
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}
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int rsnd_adg_set_convert_timing_gen2(struct rsnd_mod *mod,
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struct rsnd_dai *rdai,
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struct rsnd_dai_stream *io)
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{
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u32 val = rsnd_adg_ssi_ws_timing_gen2(mod);
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return rsnd_adg_set_src_timsel_gen2(rdai, mod, io, val);
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}
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int rsnd_adg_set_convert_clk_gen1(struct rsnd_priv *priv,
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int rsnd_adg_set_convert_clk_gen1(struct rsnd_priv *priv,
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struct rsnd_mod *mod,
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struct rsnd_mod *mod,
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unsigned int src_rate,
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unsigned int src_rate,
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@ -229,14 +229,40 @@ static int rsnd_gen2_regmap_init(struct rsnd_priv *priv, struct rsnd_gen *gen)
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RSND_GEN2_S_REG(gen, SSIU, SSI_MODE0, 0x800),
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RSND_GEN2_S_REG(gen, SSIU, SSI_MODE0, 0x800),
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RSND_GEN2_S_REG(gen, SSIU, SSI_MODE1, 0x804),
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RSND_GEN2_S_REG(gen, SSIU, SSI_MODE1, 0x804),
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/* FIXME: it needs SSI_MODE2/3 in the future */
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/* FIXME: it needs SSI_MODE2/3 in the future */
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RSND_GEN2_S_REG(gen, SSIU, SSI_CONTROL, 0x810),
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RSND_GEN2_M_REG(gen, SSIU, SSI_BUSIF_MODE, 0x0, 0x80),
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RSND_GEN2_M_REG(gen, SSIU, SSI_BUSIF_ADINR,0x4, 0x80),
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RSND_GEN2_M_REG(gen, SSIU, SSI_CTRL, 0x10, 0x80),
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RSND_GEN2_M_REG(gen, SSIU, INT_ENABLE, 0x18, 0x80),
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RSND_GEN2_M_REG(gen, SSIU, INT_ENABLE, 0x18, 0x80),
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RSND_GEN2_M_REG(gen, SCU, SRC_BUSIF_MODE, 0x0, 0x20),
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RSND_GEN2_M_REG(gen, SCU, SRC_ROUTE_MODE0,0xc, 0x20),
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RSND_GEN2_M_REG(gen, SCU, SRC_CTRL, 0x10, 0x20),
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RSND_GEN2_M_REG(gen, SCU, SRC_SWRSR, 0x200, 0x40),
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RSND_GEN2_M_REG(gen, SCU, SRC_SRCIR, 0x204, 0x40),
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RSND_GEN2_M_REG(gen, SCU, SRC_ADINR, 0x214, 0x40),
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RSND_GEN2_M_REG(gen, SCU, SRC_IFSCR, 0x21c, 0x40),
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RSND_GEN2_M_REG(gen, SCU, SRC_IFSVR, 0x220, 0x40),
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RSND_GEN2_M_REG(gen, SCU, SRC_SRCCR, 0x224, 0x40),
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RSND_GEN2_M_REG(gen, SCU, SRC_BSDSR, 0x22c, 0x40),
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RSND_GEN2_M_REG(gen, SCU, SRC_BSISR, 0x238, 0x40),
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RSND_GEN2_S_REG(gen, ADG, BRRA, 0x00),
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RSND_GEN2_S_REG(gen, ADG, BRRA, 0x00),
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RSND_GEN2_S_REG(gen, ADG, BRRB, 0x04),
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RSND_GEN2_S_REG(gen, ADG, BRRB, 0x04),
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RSND_GEN2_S_REG(gen, ADG, SSICKR, 0x08),
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RSND_GEN2_S_REG(gen, ADG, SSICKR, 0x08),
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RSND_GEN2_S_REG(gen, ADG, AUDIO_CLK_SEL0, 0x0c),
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RSND_GEN2_S_REG(gen, ADG, AUDIO_CLK_SEL0, 0x0c),
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RSND_GEN2_S_REG(gen, ADG, AUDIO_CLK_SEL1, 0x10),
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RSND_GEN2_S_REG(gen, ADG, AUDIO_CLK_SEL1, 0x10),
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RSND_GEN2_S_REG(gen, ADG, AUDIO_CLK_SEL2, 0x14),
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RSND_GEN2_S_REG(gen, ADG, AUDIO_CLK_SEL2, 0x14),
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RSND_GEN2_S_REG(gen, ADG, SRCIN_TIMSEL0, 0x34),
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RSND_GEN2_S_REG(gen, ADG, SRCIN_TIMSEL1, 0x38),
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RSND_GEN2_S_REG(gen, ADG, SRCIN_TIMSEL2, 0x3c),
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RSND_GEN2_S_REG(gen, ADG, SRCIN_TIMSEL3, 0x40),
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RSND_GEN2_S_REG(gen, ADG, SRCIN_TIMSEL4, 0x44),
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RSND_GEN2_S_REG(gen, ADG, SRCOUT_TIMSEL0, 0x48),
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RSND_GEN2_S_REG(gen, ADG, SRCOUT_TIMSEL1, 0x4c),
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RSND_GEN2_S_REG(gen, ADG, SRCOUT_TIMSEL2, 0x50),
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RSND_GEN2_S_REG(gen, ADG, SRCOUT_TIMSEL3, 0x54),
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RSND_GEN2_S_REG(gen, ADG, SRCOUT_TIMSEL4, 0x58),
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RSND_GEN2_M_REG(gen, SSI, SSICR, 0x00, 0x40),
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RSND_GEN2_M_REG(gen, SSI, SSICR, 0x00, 0x40),
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RSND_GEN2_M_REG(gen, SSI, SSISR, 0x04, 0x40),
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RSND_GEN2_M_REG(gen, SSI, SSISR, 0x04, 0x40),
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@ -37,6 +37,11 @@ enum rsnd_reg {
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RSND_REG_SRC_TMG_SEL1, /* for Gen1 */
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RSND_REG_SRC_TMG_SEL1, /* for Gen1 */
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RSND_REG_SRC_TMG_SEL2, /* for Gen1 */
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RSND_REG_SRC_TMG_SEL2, /* for Gen1 */
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RSND_REG_SRC_ROUTE_CTRL, /* for Gen1 */
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RSND_REG_SRC_ROUTE_CTRL, /* for Gen1 */
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RSND_REG_SRC_CTRL, /* for Gen2 */
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RSND_REG_SSI_CTRL, /* for Gen2 */
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RSND_REG_SSI_CONTROL,
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RSND_REG_SSI_BUSIF_MODE, /* for Gen2 */
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RSND_REG_SSI_BUSIF_ADINR, /* for Gen2 */
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RSND_REG_SSI_MODE0,
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RSND_REG_SSI_MODE0,
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RSND_REG_SSI_MODE1,
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RSND_REG_SSI_MODE1,
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RSND_REG_INT_ENABLE, /* for Gen2 */
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RSND_REG_INT_ENABLE, /* for Gen2 */
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@ -49,6 +54,8 @@ enum rsnd_reg {
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RSND_REG_SRC_IFSVR,
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RSND_REG_SRC_IFSVR,
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RSND_REG_SRC_SRCCR,
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RSND_REG_SRC_SRCCR,
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RSND_REG_SRC_MNFSR, /* for Gen1 */
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RSND_REG_SRC_MNFSR, /* for Gen1 */
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RSND_REG_SRC_BSDSR, /* for Gen2 */
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RSND_REG_SRC_BSISR, /* for Gen2 */
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/* ADG */
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/* ADG */
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RSND_REG_BRRA,
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RSND_REG_BRRA,
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@ -60,6 +67,16 @@ enum rsnd_reg {
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RSND_REG_AUDIO_CLK_SEL3, /* for Gen1 */
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RSND_REG_AUDIO_CLK_SEL3, /* for Gen1 */
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RSND_REG_AUDIO_CLK_SEL4, /* for Gen1 */
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RSND_REG_AUDIO_CLK_SEL4, /* for Gen1 */
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RSND_REG_AUDIO_CLK_SEL5, /* for Gen1 */
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RSND_REG_AUDIO_CLK_SEL5, /* for Gen1 */
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RSND_REG_SRCIN_TIMSEL0, /* for Gen2 */
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RSND_REG_SRCIN_TIMSEL1, /* for Gen2 */
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RSND_REG_SRCIN_TIMSEL2, /* for Gen2 */
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RSND_REG_SRCIN_TIMSEL3, /* for Gen2 */
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RSND_REG_SRCIN_TIMSEL4, /* for Gen2 */
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RSND_REG_SRCOUT_TIMSEL0, /* for Gen2 */
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RSND_REG_SRCOUT_TIMSEL1, /* for Gen2 */
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RSND_REG_SRCOUT_TIMSEL2, /* for Gen2 */
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RSND_REG_SRCOUT_TIMSEL3, /* for Gen2 */
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RSND_REG_SRCOUT_TIMSEL4, /* for Gen2 */
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/* SSI */
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/* SSI */
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RSND_REG_SSICR,
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RSND_REG_SSICR,
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@ -250,6 +267,14 @@ int rsnd_adg_set_convert_clk_gen1(struct rsnd_priv *priv,
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struct rsnd_mod *mod,
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struct rsnd_mod *mod,
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unsigned int src_rate,
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unsigned int src_rate,
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unsigned int dst_rate);
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unsigned int dst_rate);
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int rsnd_adg_set_convert_clk_gen2(struct rsnd_mod *mod,
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struct rsnd_dai *rdai,
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struct rsnd_dai_stream *io,
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unsigned int src_rate,
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unsigned int dst_rate);
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int rsnd_adg_set_convert_timing_gen2(struct rsnd_mod *mod,
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struct rsnd_dai *rdai,
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struct rsnd_dai_stream *io);
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/*
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/*
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* R-Car sound priv
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* R-Car sound priv
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@ -33,6 +33,8 @@ struct rsnd_scu {
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container_of((_mod), struct rsnd_scu, mod)
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container_of((_mod), struct rsnd_scu, mod)
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#define rsnd_scu_hpbif_is_enable(scu) \
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#define rsnd_scu_hpbif_is_enable(scu) \
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(rsnd_scu_mode_flags(scu) & RSND_SCU_USE_HPBIF)
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(rsnd_scu_mode_flags(scu) & RSND_SCU_USE_HPBIF)
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#define rsnd_scu_dma_available(scu) \
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rsnd_dma_available(rsnd_mod_to_dma(&(scu)->mod))
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#define for_each_rsnd_scu(pos, priv, i) \
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#define for_each_rsnd_scu(pos, priv, i) \
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for ((i) = 0; \
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for ((i) = 0; \
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@ -472,6 +474,103 @@ static struct rsnd_mod_ops rsnd_scu_non_gen1_ops = {
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/*
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/*
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* Gen2 functions
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* Gen2 functions
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*/
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*/
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static int rsnd_scu_set_convert_rate_gen2(struct rsnd_mod *mod,
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struct rsnd_dai *rdai,
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struct rsnd_dai_stream *io)
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{
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int ret;
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ret = rsnd_scu_set_convert_rate(mod, rdai, io);
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if (ret < 0)
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return ret;
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rsnd_mod_write(mod, SSI_BUSIF_ADINR, rsnd_mod_read(mod, SRC_ADINR));
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rsnd_mod_write(mod, SSI_BUSIF_MODE, rsnd_mod_read(mod, SRC_BUSIF_MODE));
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||||||
|
rsnd_mod_write(mod, SRC_SRCCR, 0x00011110);
|
||||||
|
|
||||||
|
rsnd_mod_write(mod, SRC_BSDSR, 0x01800000);
|
||||||
|
rsnd_mod_write(mod, SRC_BSISR, 0x00100060);
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
static int rsnd_scu_set_convert_timing_gen2(struct rsnd_mod *mod,
|
||||||
|
struct rsnd_dai *rdai,
|
||||||
|
struct rsnd_dai_stream *io)
|
||||||
|
{
|
||||||
|
struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
|
||||||
|
struct rsnd_scu *scu = rsnd_mod_to_scu(mod);
|
||||||
|
u32 convert_rate = rsnd_scu_convert_rate(scu);
|
||||||
|
int ret;
|
||||||
|
|
||||||
|
if (convert_rate)
|
||||||
|
ret = rsnd_adg_set_convert_clk_gen2(mod, rdai, io,
|
||||||
|
runtime->rate,
|
||||||
|
convert_rate);
|
||||||
|
else
|
||||||
|
ret = rsnd_adg_set_convert_timing_gen2(mod, rdai, io);
|
||||||
|
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
static int rsnd_scu_init_gen2(struct rsnd_mod *mod,
|
||||||
|
struct rsnd_dai *rdai,
|
||||||
|
struct rsnd_dai_stream *io)
|
||||||
|
{
|
||||||
|
int ret;
|
||||||
|
|
||||||
|
ret = rsnd_scu_init(mod, rdai, io);
|
||||||
|
if (ret < 0)
|
||||||
|
return ret;
|
||||||
|
|
||||||
|
ret = rsnd_scu_set_convert_rate_gen2(mod, rdai, io);
|
||||||
|
if (ret < 0)
|
||||||
|
return ret;
|
||||||
|
|
||||||
|
ret = rsnd_scu_set_convert_timing_gen2(mod, rdai, io);
|
||||||
|
if (ret < 0)
|
||||||
|
return ret;
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
static int rsnd_scu_start_gen2(struct rsnd_mod *mod,
|
||||||
|
struct rsnd_dai *rdai,
|
||||||
|
struct rsnd_dai_stream *io)
|
||||||
|
{
|
||||||
|
struct rsnd_scu *scu = rsnd_mod_to_scu(mod);
|
||||||
|
|
||||||
|
rsnd_dma_start(rsnd_mod_to_dma(&scu->mod));
|
||||||
|
|
||||||
|
rsnd_mod_write(mod, SSI_CTRL, 0x1);
|
||||||
|
rsnd_mod_write(mod, SRC_CTRL, 0x11);
|
||||||
|
|
||||||
|
return rsnd_scu_start(mod, rdai, io);
|
||||||
|
}
|
||||||
|
|
||||||
|
static int rsnd_scu_stop_gen2(struct rsnd_mod *mod,
|
||||||
|
struct rsnd_dai *rdai,
|
||||||
|
struct rsnd_dai_stream *io)
|
||||||
|
{
|
||||||
|
struct rsnd_scu *scu = rsnd_mod_to_scu(mod);
|
||||||
|
|
||||||
|
rsnd_mod_write(mod, SSI_CTRL, 0);
|
||||||
|
rsnd_mod_write(mod, SRC_CTRL, 0);
|
||||||
|
|
||||||
|
rsnd_dma_stop(rsnd_mod_to_dma(&scu->mod));
|
||||||
|
|
||||||
|
return rsnd_scu_stop(mod, rdai, io);
|
||||||
|
}
|
||||||
|
|
||||||
|
static struct rsnd_mod_ops rsnd_scu_gen2_ops = {
|
||||||
|
.name = "scu (gen2)",
|
||||||
|
.init = rsnd_scu_init_gen2,
|
||||||
|
.quit = rsnd_scu_quit,
|
||||||
|
.start = rsnd_scu_start_gen2,
|
||||||
|
.stop = rsnd_scu_stop_gen2,
|
||||||
|
};
|
||||||
|
|
||||||
static int rsnd_scu_start_non_gen2(struct rsnd_mod *mod,
|
static int rsnd_scu_start_non_gen2(struct rsnd_mod *mod,
|
||||||
struct rsnd_dai *rdai,
|
struct rsnd_dai *rdai,
|
||||||
struct rsnd_dai_stream *io)
|
struct rsnd_dai_stream *io)
|
||||||
|
@ -534,6 +633,17 @@ int rsnd_scu_probe(struct platform_device *pdev,
|
||||||
if (rsnd_scu_hpbif_is_enable(scu)) {
|
if (rsnd_scu_hpbif_is_enable(scu)) {
|
||||||
if (rsnd_is_gen1(priv))
|
if (rsnd_is_gen1(priv))
|
||||||
ops = &rsnd_scu_gen1_ops;
|
ops = &rsnd_scu_gen1_ops;
|
||||||
|
if (rsnd_is_gen2(priv)) {
|
||||||
|
struct rsnd_mod *ssi = rsnd_ssi_mod_get(priv, i);
|
||||||
|
int ret = rsnd_dma_init(priv,
|
||||||
|
rsnd_mod_to_dma(&scu->mod),
|
||||||
|
rsnd_ssi_is_play(ssi),
|
||||||
|
scu->info->dma_id);
|
||||||
|
if (ret < 0)
|
||||||
|
return ret;
|
||||||
|
|
||||||
|
ops = &rsnd_scu_gen2_ops;
|
||||||
|
}
|
||||||
} else {
|
} else {
|
||||||
if (rsnd_is_gen1(priv))
|
if (rsnd_is_gen1(priv))
|
||||||
ops = &rsnd_scu_non_gen1_ops;
|
ops = &rsnd_scu_non_gen1_ops;
|
||||||
|
@ -553,4 +663,11 @@ int rsnd_scu_probe(struct platform_device *pdev,
|
||||||
void rsnd_scu_remove(struct platform_device *pdev,
|
void rsnd_scu_remove(struct platform_device *pdev,
|
||||||
struct rsnd_priv *priv)
|
struct rsnd_priv *priv)
|
||||||
{
|
{
|
||||||
|
struct rsnd_scu *scu;
|
||||||
|
int i;
|
||||||
|
|
||||||
|
for_each_rsnd_scu(scu, priv, i) {
|
||||||
|
if (rsnd_scu_dma_available(scu))
|
||||||
|
rsnd_dma_quit(priv, rsnd_mod_to_dma(&scu->mod));
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
Loading…
Reference in New Issue