spi: sirf: set SPI controller in RISC IO chipselect mode

SPI bitbang supply "chipselect" interface for change chip-select line
, in the SiRFSoC SPI controller, we need to enable "SPI_CS_IO_MODE",
otherwise, spi_sirfsoc_chipselect() has no effect.
now the driver is working is because SPI controller will control CS
automatically without SPI_CS_IO_MODE. this patch makes the CS controller
really controlled by software.

Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
This commit is contained in:
Qipan Li 2014-04-14 14:29:58 +08:00 committed by Mark Brown
parent 818e91625a
commit 625227a4e9
1 changed files with 5 additions and 0 deletions

View File

@ -559,6 +559,11 @@ spi_sirfsoc_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
regval &= ~SIRFSOC_SPI_CMD_MODE; regval &= ~SIRFSOC_SPI_CMD_MODE;
sspi->tx_by_cmd = false; sspi->tx_by_cmd = false;
} }
/*
* set spi controller in RISC chipselect mode, we are controlling CS by
* software BITBANG_CS_ACTIVE and BITBANG_CS_INACTIVE.
*/
regval |= SIRFSOC_SPI_CS_IO_MODE;
writel(regval, sspi->base + SIRFSOC_SPI_CTRL); writel(regval, sspi->base + SIRFSOC_SPI_CTRL);
if (IS_DMA_VALID(t)) { if (IS_DMA_VALID(t)) {