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m68k: apollo, q40, sun3, sun3x: Remove arch_gettimeoffset implementations 

These dummy implementations are no better than
default_arch_gettimeoffset() so remove them.

Signed-off-by: Finn Thain <fthain@telegraphics.com.au>
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
This commit is contained in:
Finn Thain 2018-12-01 11:53:10 +11:00 committed by Geert Uytterhoeven
parent 0ca7ce7db7
commit 6242c94d14
7 changed files with 0 additions and 32 deletions
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7
arch/m68k/apollo/config.c
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@ -29,7 +29,6 @@ u_long apollo_model;
extern void dn_sched_init(irq_handler_t handler); extern void dn_sched_init(irq_handler_t handler);
extern void dn_init_IRQ(void); extern void dn_init_IRQ(void);
extern u32 dn_gettimeoffset(void);
extern int dn_dummy_hwclk(int, struct rtc_time *); extern int dn_dummy_hwclk(int, struct rtc_time *);
extern void dn_dummy_reset(void); extern void dn_dummy_reset(void);
#ifdef CONFIG_HEARTBEAT #ifdef CONFIG_HEARTBEAT
@ -152,7 +151,6 @@ void __init config_apollo(void)
mach_sched_init=dn_sched_init; /* */ mach_sched_init=dn_sched_init; /* */
mach_init_IRQ=dn_init_IRQ; mach_init_IRQ=dn_init_IRQ;
arch_gettimeoffset = dn_gettimeoffset;
mach_max_dma_address = 0xffffffff; mach_max_dma_address = 0xffffffff;
mach_hwclk = dn_dummy_hwclk; /* */ mach_hwclk = dn_dummy_hwclk; /* */
mach_reset = dn_dummy_reset; /* */ mach_reset = dn_dummy_reset; /* */
@ -205,11 +203,6 @@ void dn_sched_init(irq_handler_t timer_routine)
pr_err("Couldn't register timer interrupt\n"); pr_err("Couldn't register timer interrupt\n");
} }
u32 dn_gettimeoffset(void)
{
return 0xdeadbeef;
}
int dn_dummy_hwclk(int op, struct rtc_time *t) { int dn_dummy_hwclk(int op, struct rtc_time *t) {

9
arch/m68k/q40/config.c
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@ -40,7 +40,6 @@ extern void q40_init_IRQ(void);
static void q40_get_model(char *model); static void q40_get_model(char *model);
extern void q40_sched_init(irq_handler_t handler); extern void q40_sched_init(irq_handler_t handler);
static u32 q40_gettimeoffset(void);
static int q40_hwclk(int, struct rtc_time *); static int q40_hwclk(int, struct rtc_time *);
static unsigned int q40_get_ss(void); static unsigned int q40_get_ss(void);
static int q40_get_rtc_pll(struct rtc_pll_info *pll); static int q40_get_rtc_pll(struct rtc_pll_info *pll);
@ -169,7 +168,6 @@ void __init config_q40(void)
mach_sched_init = q40_sched_init; mach_sched_init = q40_sched_init;
mach_init_IRQ = q40_init_IRQ; mach_init_IRQ = q40_init_IRQ;
arch_gettimeoffset = q40_gettimeoffset;
mach_hwclk = q40_hwclk; mach_hwclk = q40_hwclk;
mach_get_ss = q40_get_ss; mach_get_ss = q40_get_ss;
mach_get_rtc_pll = q40_get_rtc_pll; mach_get_rtc_pll = q40_get_rtc_pll;
@ -201,13 +199,6 @@ int __init q40_parse_bootinfo(const struct bi_record *rec)
return 1; return 1;
} }
static u32 q40_gettimeoffset(void)
{
return 5000 * (ql_ticks != 0) * 1000;
}
/* /*
* Looks like op is non-zero for setting the clock, and zero for * Looks like op is non-zero for setting the clock, and zero for
* reading the clock. * reading the clock.

2
arch/m68k/sun3/config.c
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@ -37,7 +37,6 @@
char sun3_reserved_pmeg[SUN3_PMEGS_NUM]; char sun3_reserved_pmeg[SUN3_PMEGS_NUM];
extern u32 sun3_gettimeoffset(void);
static void sun3_sched_init(irq_handler_t handler); static void sun3_sched_init(irq_handler_t handler);
extern void sun3_get_model (char* model); extern void sun3_get_model (char* model);
extern int sun3_hwclk(int set, struct rtc_time *t); extern int sun3_hwclk(int set, struct rtc_time *t);
@ -138,7 +137,6 @@ void __init config_sun3(void)
mach_sched_init = sun3_sched_init; mach_sched_init = sun3_sched_init;
mach_init_IRQ = sun3_init_IRQ; mach_init_IRQ = sun3_init_IRQ;
mach_reset = sun3_reboot; mach_reset = sun3_reboot;
arch_gettimeoffset = sun3_gettimeoffset;
mach_get_model = sun3_get_model; mach_get_model = sun3_get_model;
mach_hwclk = sun3_hwclk; mach_hwclk = sun3_hwclk;
mach_halt = sun3_halt; mach_halt = sun3_halt;

7
arch/m68k/sun3/intersil.c
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@ -22,13 +22,6 @@
#define STOP_VAL (INTERSIL_STOP | INTERSIL_INT_ENABLE | INTERSIL_24H_MODE) #define STOP_VAL (INTERSIL_STOP | INTERSIL_INT_ENABLE | INTERSIL_24H_MODE)
#define START_VAL (INTERSIL_RUN | INTERSIL_INT_ENABLE | INTERSIL_24H_MODE) #define START_VAL (INTERSIL_RUN | INTERSIL_INT_ENABLE | INTERSIL_24H_MODE)
/* does this need to be implemented? */
u32 sun3_gettimeoffset(void)
{
return 1000;
}
/* get/set hwclock */ /* get/set hwclock */
int sun3_hwclk(int set, struct rtc_time *t) int sun3_hwclk(int set, struct rtc_time *t)

1
arch/m68k/sun3x/config.c
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@ -49,7 +49,6 @@ void __init config_sun3x(void)
mach_sched_init = sun3x_sched_init; mach_sched_init = sun3x_sched_init;
mach_init_IRQ = sun3_init_IRQ; mach_init_IRQ = sun3_init_IRQ;
arch_gettimeoffset = sun3x_gettimeoffset;
mach_reset = sun3x_reboot; mach_reset = sun3x_reboot;
mach_hwclk = sun3x_hwclk; mach_hwclk = sun3x_hwclk;

5
arch/m68k/sun3x/time.c
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@ -73,11 +73,6 @@ int sun3x_hwclk(int set, struct rtc_time *t)
return 0; return 0;
} }
/* Not much we can do here */
u32 sun3x_gettimeoffset(void)
{
return 0L;
}
#if 0 #if 0
static irqreturn_t sun3x_timer_tick(int irq, void *dev_id) static irqreturn_t sun3x_timer_tick(int irq, void *dev_id)

1
arch/m68k/sun3x/time.h
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@ -3,7 +3,6 @@
#define SUN3X_TIME_H #define SUN3X_TIME_H
extern int sun3x_hwclk(int set, struct rtc_time *t); extern int sun3x_hwclk(int set, struct rtc_time *t);
u32 sun3x_gettimeoffset(void);
void sun3x_sched_init(irq_handler_t vector); void sun3x_sched_init(irq_handler_t vector);
struct mostek_dt { struct mostek_dt {