qla2xxx: Introduce fw_dump_flag to track fw dump progress.
Signed-off-by: Hiral Patel <hiral.patel@qlogic.com> Signed-off-by: Saurav Kashyap <saurav.kashyap@qlogic.com> Signed-off-by: Christoph Hellwig <hch@lst.de>
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2f389fc472
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61f098dde1
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@ -277,9 +277,15 @@ qla24xx_dump_memory(struct qla_hw_data *ha, uint32_t *code_ram,
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if (rval != QLA_SUCCESS)
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return rval;
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set_bit(RISC_SRAM_DUMP_CMPL, &ha->fw_dump_cap_flags);
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/* External Memory. */
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return qla24xx_dump_ram(ha, 0x100000, *nxt,
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rval = qla24xx_dump_ram(ha, 0x100000, *nxt,
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ha->fw_memory_size - 0x100000 + 1, nxt);
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if (rval == QLA_SUCCESS)
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set_bit(RISC_EXT_MEM_DUMP_CMPL, &ha->fw_dump_cap_flags);
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return rval;
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}
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static uint32_t *
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@ -297,12 +303,14 @@ qla24xx_read_window(struct device_reg_24xx __iomem *reg, uint32_t iobase,
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}
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void
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qla24xx_pause_risc(struct device_reg_24xx __iomem *reg)
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qla24xx_pause_risc(struct device_reg_24xx __iomem *reg, struct qla_hw_data *ha)
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{
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WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_PAUSE);
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/* 100 usec delay is sufficient enough for hardware to pause RISC */
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udelay(100);
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if (RD_REG_DWORD(®->host_status) & HSRX_RISC_PAUSED)
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set_bit(RISC_PAUSE_CMPL, &ha->fw_dump_cap_flags);
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}
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int
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@ -325,6 +333,8 @@ qla24xx_soft_reset(struct qla_hw_data *ha)
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udelay(10);
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}
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if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE))
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set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags);
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WRT_REG_DWORD(®->ctrl_status,
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CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
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@ -340,6 +350,9 @@ qla24xx_soft_reset(struct qla_hw_data *ha)
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udelay(10);
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}
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if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_ISP_SOFT_RESET))
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set_bit(ISP_RESET_CMPL, &ha->fw_dump_cap_flags);
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WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET);
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RD_REG_DWORD(®->hccr); /* PCI Posting. */
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@ -350,6 +363,8 @@ qla24xx_soft_reset(struct qla_hw_data *ha)
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else
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rval = QLA_FUNCTION_TIMEOUT;
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}
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if (rval == QLA_SUCCESS)
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set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags);
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return rval;
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}
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@ -646,12 +661,13 @@ qla2xxx_dump_post_process(scsi_qla_host_t *vha, int rval)
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if (rval != QLA_SUCCESS) {
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ql_log(ql_log_warn, vha, 0xd000,
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"Failed to dump firmware (%x).\n", rval);
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"Failed to dump firmware (%x), dump status flags (0x%lx).\n",
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rval, ha->fw_dump_cap_flags);
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ha->fw_dumped = 0;
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} else {
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ql_log(ql_log_info, vha, 0xd001,
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"Firmware dump saved to temp buffer (%ld/%p).\n",
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vha->host_no, ha->fw_dump);
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"Firmware dump saved to temp buffer (%ld/%p), dump status flags (0x%lx).\n",
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vha->host_no, ha->fw_dump, ha->fw_dump_cap_flags);
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ha->fw_dumped = 1;
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qla2x00_post_uevent_work(vha, QLA_UEVENT_CODE_FW_DUMP);
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}
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@ -1040,6 +1056,7 @@ qla24xx_fw_dump(scsi_qla_host_t *vha, int hardware_locked)
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risc_address = ext_mem_cnt = 0;
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flags = 0;
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ha->fw_dump_cap_flags = 0;
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if (!hardware_locked)
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spin_lock_irqsave(&ha->hardware_lock, flags);
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@ -1066,7 +1083,7 @@ qla24xx_fw_dump(scsi_qla_host_t *vha, int hardware_locked)
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* Pause RISC. No need to track timeout, as resetting the chip
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* is the right approach incase of pause timeout
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*/
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qla24xx_pause_risc(reg);
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qla24xx_pause_risc(reg, ha);
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/* Host interface registers. */
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dmp_reg = ®->flash_addr;
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@ -1290,6 +1307,7 @@ qla25xx_fw_dump(scsi_qla_host_t *vha, int hardware_locked)
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risc_address = ext_mem_cnt = 0;
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flags = 0;
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ha->fw_dump_cap_flags = 0;
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if (!hardware_locked)
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spin_lock_irqsave(&ha->hardware_lock, flags);
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@ -1317,7 +1335,7 @@ qla25xx_fw_dump(scsi_qla_host_t *vha, int hardware_locked)
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* Pause RISC. No need to track timeout, as resetting the chip
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* is the right approach incase of pause timeout
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*/
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qla24xx_pause_risc(reg);
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qla24xx_pause_risc(reg, ha);
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/* Host/Risc registers. */
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iter_reg = fw->host_risc_reg;
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@ -1608,6 +1626,7 @@ qla81xx_fw_dump(scsi_qla_host_t *vha, int hardware_locked)
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risc_address = ext_mem_cnt = 0;
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flags = 0;
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ha->fw_dump_cap_flags = 0;
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if (!hardware_locked)
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spin_lock_irqsave(&ha->hardware_lock, flags);
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@ -1634,7 +1653,7 @@ qla81xx_fw_dump(scsi_qla_host_t *vha, int hardware_locked)
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* Pause RISC. No need to track timeout, as resetting the chip
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* is the right approach incase of pause timeout
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*/
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qla24xx_pause_risc(reg);
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qla24xx_pause_risc(reg, ha);
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/* Host/Risc registers. */
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iter_reg = fw->host_risc_reg;
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@ -1928,6 +1947,7 @@ qla83xx_fw_dump(scsi_qla_host_t *vha, int hardware_locked)
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risc_address = ext_mem_cnt = 0;
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flags = 0;
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ha->fw_dump_cap_flags = 0;
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if (!hardware_locked)
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spin_lock_irqsave(&ha->hardware_lock, flags);
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@ -1953,7 +1973,7 @@ qla83xx_fw_dump(scsi_qla_host_t *vha, int hardware_locked)
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* Pause RISC. No need to track timeout, as resetting the chip
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* is the right approach incase of pause timeout
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*/
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qla24xx_pause_risc(reg);
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qla24xx_pause_risc(reg, ha);
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WRT_REG_DWORD(®->iobase_addr, 0x6000);
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dmp_reg = ®->iobase_window;
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@ -2376,9 +2396,11 @@ qla83xx_fw_dump(scsi_qla_host_t *vha, int hardware_locked)
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nxt += sizeof(fw->code_ram);
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nxt += (ha->fw_memory_size - 0x100000 + 1);
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goto copy_queue;
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} else
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} else {
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set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags);
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ql_log(ql_log_warn, vha, 0xd010,
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"bigger hammer success?\n");
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}
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}
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rval = qla24xx_dump_memory(ha, fw->code_ram, sizeof(fw->code_ram),
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@ -353,5 +353,6 @@ extern int qla27xx_dump_mpi_ram(struct qla_hw_data *, uint32_t, uint32_t *,
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uint32_t, void **);
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extern int qla24xx_dump_ram(struct qla_hw_data *, uint32_t, uint32_t *,
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uint32_t, void **);
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extern void qla24xx_pause_risc(struct device_reg_24xx __iomem *);
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extern void qla24xx_pause_risc(struct device_reg_24xx __iomem *,
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struct qla_hw_data *);
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extern int qla24xx_soft_reset(struct qla_hw_data *);
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@ -3147,6 +3147,13 @@ struct qla_hw_data {
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struct qla2xxx_fw_dump *fw_dump;
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uint32_t fw_dump_len;
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int fw_dumped;
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unsigned long fw_dump_cap_flags;
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#define RISC_PAUSE_CMPL 0
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#define DMA_SHUTDOWN_CMPL 1
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#define ISP_RESET_CMPL 2
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#define RISC_RDY_AFT_RESET 3
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#define RISC_SRAM_DUMP_CMPL 4
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#define RISC_EXT_MEM_DUMP_CMPL 5
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int fw_dump_reading;
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int prev_minidump_failed;
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dma_addr_t eft_dma;
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@ -1476,6 +1476,7 @@ qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
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}
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ha->fw_dumped = 0;
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ha->fw_dump_cap_flags = 0;
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dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
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req_q_size = rsp_q_size = 0;
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@ -3654,6 +3654,7 @@ qla2x00_free_fw_dump(struct qla_hw_data *ha)
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ha->eft = NULL;
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ha->eft_dma = 0;
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ha->fw_dumped = 0;
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ha->fw_dump_cap_flags = 0;
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ha->fw_dump_reading = 0;
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ha->fw_dump = NULL;
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ha->fw_dump_len = 0;
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@ -516,7 +516,7 @@ qla27xx_fwdt_entry_t265(struct scsi_qla_host *vha,
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ql_dbg(ql_dbg_misc, vha, 0xd209,
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"%s: pause risc [%lx]\n", __func__, *len);
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if (buf)
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qla24xx_pause_risc(reg);
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qla24xx_pause_risc(reg, vha->hw);
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return false;
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}
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