ACPI: boot correctly with "nosmp" or "maxcpus=0"
In MPS mode, "nosmp" and "maxcpus=0" boot a UP kernel with IOAPIC disabled. However, in ACPI mode, these parameters didn't completely disable the IO APIC initialization code and boot failed. init/main.c: Disable the IO_APIC if "nosmp" or "maxcpus=0" undefine disable_ioapic_setup() when it doesn't apply. i386: delete ioapic_setup(), it was a duplicate of parse_noapic() delete undefinition of disable_ioapic_setup() x86_64: rename disable_ioapic_setup() to parse_noapic() to match i386 define disable_ioapic_setup() in header to match i386 http://bugzilla.kernel.org/show_bug.cgi?id=1641 Acked-by: Andi Kleen <ak@suse.de> Signed-off-by: Len Brown <len.brown@intel.com>
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@ -952,14 +952,10 @@ and is between 256 and 4096 characters. It is defined in the file
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Format: <1-256>
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maxcpus= [SMP] Maximum number of processors that an SMP kernel
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should make use of.
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Using "nosmp" or "maxcpus=0" will disable SMP
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entirely (the MPS table probe still happens, though).
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A command-line option of "maxcpus=<NUM>", where <NUM>
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is an integer greater than 0, limits the maximum number
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of CPUs activated in SMP mode to <NUM>.
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Using "maxcpus=1" on an SMP kernel is the trivial
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case of an SMP kernel with only one CPU.
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should make use of. maxcpus=n : n >= 0 limits the
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kernel to using 'n' processors. n=0 is a special case,
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it is equivalent to "nosmp", which also disables
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the IO APIC.
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max_addr=[KMG] [KNL,BOOT,ia64] All physical memory greater than or
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equal to this physical address is ignored.
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@ -1184,7 +1180,8 @@ and is between 256 and 4096 characters. It is defined in the file
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nosep [BUGS=X86-32] Disables x86 SYSENTER/SYSEXIT support.
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nosmp [SMP] Tells an SMP kernel to act as a UP kernel.
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nosmp [SMP] Tells an SMP kernel to act as a UP kernel,
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and disable the IO APIC. legacy for "maxcpus=0".
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nosoftlockup [KNL] Disable the soft-lockup detector.
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@ -754,14 +754,6 @@ static int pirq_entries [MAX_PIRQS];
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static int pirqs_enabled;
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int skip_ioapic_setup;
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static int __init ioapic_setup(char *str)
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{
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skip_ioapic_setup = 1;
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return 1;
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}
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__setup("noapic", ioapic_setup);
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static int __init ioapic_pirq_setup(char *str)
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{
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int i, max;
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@ -397,14 +397,12 @@ static void clear_IO_APIC (void)
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int skip_ioapic_setup;
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int ioapic_force;
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/* dummy parsing: see setup.c */
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static int __init disable_ioapic_setup(char *str)
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static int __init parse_noapic(char *str)
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{
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skip_ioapic_setup = 1;
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disable_ioapic_setup();
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return 0;
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}
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early_param("noapic", disable_ioapic_setup);
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early_param("noapic", parse_noapic);
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/* Actually the next is obsolete, but keep it for paranoid reasons -AK */
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static int __init disable_timer_pin_setup(char *arg)
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@ -150,7 +150,6 @@ extern int (*ioapic_renumber_irq)(int ioapic, int irq);
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#else /* !CONFIG_X86_IO_APIC */
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#define io_apic_assign_pci_irqs 0
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static inline void disable_ioapic_setup(void) { }
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#endif
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#endif
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@ -109,6 +109,12 @@ extern int mpc_default_type;
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/* 1 if "noapic" boot option passed */
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extern int skip_ioapic_setup;
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static inline void disable_ioapic_setup(void)
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{
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skip_ioapic_setup = 1;
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}
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/*
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* If we use the IO-APIC for IRQ routing, disable automatic
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* assignment of PCI IRQ's.
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12
init/main.c
12
init/main.c
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@ -146,9 +146,14 @@ static unsigned int __initdata max_cpus = NR_CPUS;
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* greater than 0, limits the maximum number of CPUs activated in
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* SMP mode to <NUM>.
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*/
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#ifndef CONFIG_X86_IO_APIC
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static inline void disable_ioapic_setup(void) {};
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#endif
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static int __init nosmp(char *str)
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{
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max_cpus = 0;
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disable_ioapic_setup();
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return 0;
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}
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@ -157,10 +162,13 @@ early_param("nosmp", nosmp);
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static int __init maxcpus(char *str)
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{
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get_option(&str, &max_cpus);
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return 1;
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if (max_cpus == 0)
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disable_ioapic_setup();
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return 0;
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}
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__setup("maxcpus=", maxcpus);
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early_param("maxcpus=", maxcpus);
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#else
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#define max_cpus NR_CPUS
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#endif
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