Merge branch 'genirq' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'genirq' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: genirq: remove extraneous checks in manage.c genirq: Expose default irq affinity mask (take 3)
This commit is contained in:
commit
61d97f4fcf
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@ -1,17 +1,26 @@
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ChangeLog:
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Started by Ingo Molnar <mingo@redhat.com>
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Update by Max Krasnyansky <maxk@qualcomm.com>
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SMP IRQ affinity, started by Ingo Molnar <mingo@redhat.com>
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SMP IRQ affinity
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/proc/irq/IRQ#/smp_affinity specifies which target CPUs are permitted
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for a given IRQ source. It's a bitmask of allowed CPUs. It's not allowed
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to turn off all CPUs, and if an IRQ controller does not support IRQ
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affinity then the value will not change from the default 0xffffffff.
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Here is an example of restricting IRQ44 (eth1) to CPU0-3 then restricting
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the IRQ to CPU4-7 (this is an 8-CPU SMP box):
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/proc/irq/default_smp_affinity specifies default affinity mask that applies
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to all non-active IRQs. Once IRQ is allocated/activated its affinity bitmask
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will be set to the default mask. It can then be changed as described above.
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Default mask is 0xffffffff.
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Here is an example of restricting IRQ44 (eth1) to CPU0-3 then restricting
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it to CPU4-7 (this is an 8-CPU SMP box):
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[root@moon 44]# cd /proc/irq/44
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[root@moon 44]# cat smp_affinity
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ffffffff
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[root@moon 44]# echo 0f > smp_affinity
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[root@moon 44]# cat smp_affinity
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0000000f
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@ -21,17 +30,27 @@ PING hell (195.4.7.3): 56 data bytes
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--- hell ping statistics ---
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6029 packets transmitted, 6027 packets received, 0% packet loss
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round-trip min/avg/max = 0.1/0.1/0.4 ms
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[root@moon 44]# cat /proc/interrupts | grep 44:
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44: 0 1785 1785 1783 1783 1
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1 0 IO-APIC-level eth1
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[root@moon 44]# cat /proc/interrupts | grep 'CPU\|44:'
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CPU0 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7
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44: 1068 1785 1785 1783 0 0 0 0 IO-APIC-level eth1
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As can be seen from the line above IRQ44 was delivered only to the first four
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processors (0-3).
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Now lets restrict that IRQ to CPU(4-7).
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[root@moon 44]# echo f0 > smp_affinity
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[root@moon 44]# cat smp_affinity
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000000f0
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[root@moon 44]# ping -f h
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PING hell (195.4.7.3): 56 data bytes
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..
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--- hell ping statistics ---
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2779 packets transmitted, 2777 packets received, 0% packet loss
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round-trip min/avg/max = 0.1/0.5/585.4 ms
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[root@moon 44]# cat /proc/interrupts | grep 44:
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44: 1068 1785 1785 1784 1784 1069 1070 1069 IO-APIC-level eth1
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[root@moon 44]#
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[root@moon 44]# cat /proc/interrupts | 'CPU\|44:'
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CPU0 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7
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44: 1068 1785 1785 1783 1784 1069 1070 1069 IO-APIC-level eth1
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This time around IRQ44 was delivered only to the last four processors.
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i.e counters for the CPU0-3 did not change.
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@ -380,28 +380,35 @@ i386 and x86_64 platforms support the new IRQ vector displays.
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Of some interest is the introduction of the /proc/irq directory to 2.4.
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It could be used to set IRQ to CPU affinity, this means that you can "hook" an
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IRQ to only one CPU, or to exclude a CPU of handling IRQs. The contents of the
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irq subdir is one subdir for each IRQ, and one file; prof_cpu_mask
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irq subdir is one subdir for each IRQ, and two files; default_smp_affinity and
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prof_cpu_mask.
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For example
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> ls /proc/irq/
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0 10 12 14 16 18 2 4 6 8 prof_cpu_mask
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1 11 13 15 17 19 3 5 7 9
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1 11 13 15 17 19 3 5 7 9 default_smp_affinity
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> ls /proc/irq/0/
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smp_affinity
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The contents of the prof_cpu_mask file and each smp_affinity file for each IRQ
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is the same by default:
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smp_affinity is a bitmask, in which you can specify which CPUs can handle the
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IRQ, you can set it by doing:
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> cat /proc/irq/0/smp_affinity
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> echo 1 > /proc/irq/10/smp_affinity
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This means that only the first CPU will handle the IRQ, but you can also echo
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5 which means that only the first and fourth CPU can handle the IRQ.
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The contents of each smp_affinity file is the same by default:
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> cat /proc/irq/0/smp_affinity
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ffffffff
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It's a bitmask, in which you can specify which CPUs can handle the IRQ, you can
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set it by doing:
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The default_smp_affinity mask applies to all non-active IRQs, which are the
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IRQs which have not yet been allocated/activated, and hence which lack a
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/proc/irq/[0-9]* directory.
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> echo 1 > /proc/irq/prof_cpu_mask
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This means that only the first CPU will handle the IRQ, but you can also echo 5
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which means that only the first and fourth CPU can handle the IRQ.
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prof_cpu_mask specifies which CPUs are to be profiled by the system wide
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profiler. Default value is ffffffff (all cpus).
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The way IRQs are routed is handled by the IO-APIC, and it's Round Robin
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between all the CPUs which are allowed to handle it. As usual the kernel has
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@ -42,8 +42,7 @@ void ack_bad_irq(unsigned int irq)
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#ifdef CONFIG_SMP
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static char irq_user_affinity[NR_IRQS];
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int
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select_smp_affinity(unsigned int irq)
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int irq_select_affinity(unsigned int irq)
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{
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static int last_cpu;
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int cpu = last_cpu + 1;
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@ -51,7 +50,7 @@ select_smp_affinity(unsigned int irq)
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if (!irq_desc[irq].chip->set_affinity || irq_user_affinity[irq])
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return 1;
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while (!cpu_possible(cpu))
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while (!cpu_possible(cpu) || !cpu_isset(cpu, irq_default_affinity))
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cpu = (cpu < (NR_CPUS-1) ? cpu + 1 : 0);
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last_cpu = cpu;
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@ -104,8 +104,11 @@ extern void enable_irq(unsigned int irq);
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#if defined(CONFIG_SMP) && defined(CONFIG_GENERIC_HARDIRQS)
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extern cpumask_t irq_default_affinity;
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extern int irq_set_affinity(unsigned int irq, cpumask_t cpumask);
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extern int irq_can_set_affinity(unsigned int irq);
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extern int irq_select_affinity(unsigned int irq);
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#else /* CONFIG_SMP */
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@ -119,6 +122,8 @@ static inline int irq_can_set_affinity(unsigned int irq)
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return 0;
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}
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static inline int irq_select_affinity(unsigned int irq) { return 0; }
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#endif /* CONFIG_SMP && CONFIG_GENERIC_HARDIRQS */
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#ifdef CONFIG_GENERIC_HARDIRQS
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@ -244,15 +244,6 @@ static inline void set_balance_irq_affinity(unsigned int irq, cpumask_t mask)
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}
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#endif
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#ifdef CONFIG_AUTO_IRQ_AFFINITY
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extern int select_smp_affinity(unsigned int irq);
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#else
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static inline int select_smp_affinity(unsigned int irq)
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{
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return 1;
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}
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#endif
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extern int no_irq_affinity;
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static inline int irq_balancing_disabled(unsigned int irq)
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@ -17,6 +17,8 @@
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#ifdef CONFIG_SMP
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cpumask_t irq_default_affinity = CPU_MASK_ALL;
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/**
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* synchronize_irq - wait for pending IRQ handlers (on other CPUs)
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* @irq: interrupt number to wait for
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return 0;
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}
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#ifndef CONFIG_AUTO_IRQ_AFFINITY
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/*
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* Generic version of the affinity autoselector.
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*/
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int irq_select_affinity(unsigned int irq)
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{
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cpumask_t mask;
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if (!irq_can_set_affinity(irq))
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return 0;
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cpus_and(mask, cpu_online_map, irq_default_affinity);
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irq_desc[irq].affinity = mask;
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irq_desc[irq].chip->set_affinity(irq, mask);
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set_balance_irq_affinity(irq, mask);
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return 0;
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}
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#endif
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#endif
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/**
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/* Setup the type (level, edge polarity) if configured: */
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if (new->flags & IRQF_TRIGGER_MASK) {
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if (desc->chip && desc->chip->set_type)
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if (desc->chip->set_type)
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desc->chip->set_type(irq,
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new->flags & IRQF_TRIGGER_MASK);
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else
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*/
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printk(KERN_WARNING "No IRQF_TRIGGER set_type "
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"function for IRQ %d (%s)\n", irq,
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desc->chip ? desc->chip->name :
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"unknown");
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desc->chip->name);
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} else
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compat_irq_chip_set_default_handler(desc);
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} else
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/* Undo nested disables: */
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desc->depth = 1;
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/* Set default affinity mask once everything is setup */
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irq_select_affinity(irq);
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}
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/* Reset broken irq detection when installing new handler */
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desc->irq_count = 0;
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action->next = NULL;
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action->dev_id = dev_id;
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select_smp_affinity(irq);
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#ifdef CONFIG_DEBUG_SHIRQ
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if (irqflags & IRQF_SHARED) {
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/*
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unsigned long count, void *data)
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{
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unsigned int irq = (int)(long)data, full_count = count, err;
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cpumask_t new_value, tmp;
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cpumask_t new_value;
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if (!irq_desc[irq].chip->set_affinity || no_irq_affinity ||
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irq_balancing_disabled(irq))
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* way to make the system unusable accidentally :-) At least
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* one online CPU still has to be targeted.
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*/
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cpus_and(tmp, new_value, cpu_online_map);
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if (cpus_empty(tmp))
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if (!cpus_intersects(new_value, cpu_online_map))
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/* Special case for empty set - allow the architecture
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code to set default SMP affinity. */
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return select_smp_affinity(irq) ? -EINVAL : full_count;
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return irq_select_affinity(irq) ? -EINVAL : full_count;
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irq_set_affinity(irq, new_value);
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return full_count;
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}
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static int default_affinity_read(char *page, char **start, off_t off,
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int count, int *eof, void *data)
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{
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int len = cpumask_scnprintf(page, count, irq_default_affinity);
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if (count - len < 2)
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return -EINVAL;
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len += sprintf(page + len, "\n");
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return len;
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}
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static int default_affinity_write(struct file *file, const char __user *buffer,
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unsigned long count, void *data)
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{
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unsigned int full_count = count, err;
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cpumask_t new_value;
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err = cpumask_parse_user(buffer, count, new_value);
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if (err)
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return err;
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if (!is_affinity_mask_valid(new_value))
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return -EINVAL;
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/*
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* Do not allow disabling IRQs completely - it's a too easy
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* way to make the system unusable accidentally :-) At least
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* one online CPU still has to be targeted.
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*/
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if (!cpus_intersects(new_value, cpu_online_map))
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return -EINVAL;
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irq_default_affinity = new_value;
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return full_count;
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}
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#endif
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static int irq_spurious_read(char *page, char **start, off_t off,
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remove_proc_entry(action->dir->name, irq_desc[irq].dir);
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}
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void register_default_affinity_proc(void)
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{
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#ifdef CONFIG_SMP
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struct proc_dir_entry *entry;
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/* create /proc/irq/default_smp_affinity */
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entry = create_proc_entry("default_smp_affinity", 0600, root_irq_dir);
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if (entry) {
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entry->data = NULL;
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entry->read_proc = default_affinity_read;
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entry->write_proc = default_affinity_write;
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}
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#endif
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}
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void init_irq_proc(void)
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{
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int i;
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@ -180,6 +229,8 @@ void init_irq_proc(void)
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if (!root_irq_dir)
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return;
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register_default_affinity_proc();
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/*
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* Create entries for all existing IRQs.
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*/
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