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ARM: zynq: Remove invalidate cache for cpu die 

As there is no Power management unit on this board, it is not possible to power
down a core, just WFI is allowed. There is no point to invalidate the cache and
exit coherency.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-and-tested-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Daniel Lezcano 2014-09-02 14:19:10 -07:00 committed by Michal Simek
parent 0beb2bd36f
commit 61ce3ed57b
1 changed files with 1 additions and 31 deletions
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32
arch/arm/mach-zynq/hotplug.c
View File

@ -10,35 +10,7 @@
* it under the terms of the GNU General Public License version 2 as * it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation. * published by the Free Software Foundation.
*/ */
#include <linux/kernel.h> #include <asm/proc-fns.h>
#include <linux/errno.h>
#include <linux/smp.h>
#include <asm/cacheflush.h>
#include <asm/cp15.h>
#include "common.h"
static inline void zynq_cpu_enter_lowpower(void)
{
unsigned int v;
flush_cache_all();
asm volatile(
" mcr p15, 0, %1, c7, c5, 0\n"
" dsb\n"
/*
* Turn off coherency
*/
" mrc p15, 0, %0, c1, c0, 1\n"
" bic %0, %0, #0x40\n"
" mcr p15, 0, %0, c1, c0, 1\n"
" mrc p15, 0, %0, c1, c0, 0\n"
" bic %0, %0, %2\n"
" mcr p15, 0, %0, c1, c0, 0\n"
: "=&r" (v)
: "r" (0), "Ir" (CR_C)
: "cc");
}
/* /*
* platform-specific code to shutdown a CPU * platform-specific code to shutdown a CPU
@ -47,8 +19,6 @@ static inline void zynq_cpu_enter_lowpower(void)
*/ */
void zynq_platform_cpu_die(unsigned int cpu) void zynq_platform_cpu_die(unsigned int cpu)
{ {
zynq_cpu_enter_lowpower();
/* /*
* there is no power-control hardware on this platform, so all * there is no power-control hardware on this platform, so all
* we can do is put the core into WFI; this is safe as the calling * we can do is put the core into WFI; this is safe as the calling