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OMAP: Rename OMAP_MPUIO_BASE to OMAP1_MPUIO_BASE 

Rename OMAP_MPUIO_BASE to OMAP1_MPUIO_BASE

Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Tony Lindgren 2009-08-28 10:50:34 -07:00
parent 941132606c
commit 6175556fdc
4 changed files with 18 additions and 18 deletions
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4
arch/arm/plat-omap/gpio.c
View File

@ -99,7 +99,7 @@
#define OMAP850_GPIO_INT_MASK 0x10 #define OMAP850_GPIO_INT_MASK 0x10
#define OMAP850_GPIO_INT_STATUS 0x14 #define OMAP850_GPIO_INT_STATUS 0x14
#define OMAP1_MPUIO_VBASE OMAP1_IO_ADDRESS(OMAP_MPUIO_BASE) #define OMAP1_MPUIO_VBASE OMAP1_IO_ADDRESS(OMAP1_MPUIO_BASE)
/* /*
* omap24xx specific GPIO registers * omap24xx specific GPIO registers
@ -224,7 +224,7 @@ static struct gpio_bank gpio_bank_730[7] = {
#ifdef CONFIG_ARCH_OMAP850 #ifdef CONFIG_ARCH_OMAP850
static struct gpio_bank gpio_bank_850[7] = { static struct gpio_bank gpio_bank_850[7] = {
{ OMAP_MPUIO_BASE, INT_850_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, { OMAP1_MPUIO_BASE, INT_850_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO },
{ OMAP850_GPIO1_BASE, INT_850_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_850 }, { OMAP850_GPIO1_BASE, INT_850_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_850 },
{ OMAP850_GPIO2_BASE, INT_850_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_850 }, { OMAP850_GPIO2_BASE, INT_850_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_850 },
{ OMAP850_GPIO3_BASE, INT_850_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_850 }, { OMAP850_GPIO3_BASE, INT_850_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_850 },

2
arch/arm/plat-omap/include/mach/gpio.h
View File

@ -29,7 +29,7 @@
#include <linux/io.h> #include <linux/io.h>
#include <mach/irqs.h> #include <mach/irqs.h>
#define OMAP_MPUIO_BASE 0xfffb5000 #define OMAP1_MPUIO_BASE 0xfffb5000
#if (defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)) #if (defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850))

22
drivers/input/keyboard/omap-keypad.c
View File

@ -116,7 +116,7 @@ static irqreturn_t omap_kp_interrupt(int irq, void *dev_id)
} }
} else } else
/* disable keyboard interrupt and schedule for handling */ /* disable keyboard interrupt and schedule for handling */
omap_writew(1, OMAP_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT); omap_writew(1, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT);
tasklet_schedule(&kp_tasklet); tasklet_schedule(&kp_tasklet);
@ -143,20 +143,20 @@ static void omap_kp_scan_keypad(struct omap_kp *omap_kp, unsigned char *state)
} else { } else {
/* disable keyboard interrupt and schedule for handling */ /* disable keyboard interrupt and schedule for handling */
omap_writew(1, OMAP_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT); omap_writew(1, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT);
/* read the keypad status */ /* read the keypad status */
omap_writew(0xff, OMAP_MPUIO_BASE + OMAP_MPUIO_KBC); omap_writew(0xff, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBC);
for (col = 0; col < omap_kp->cols; col++) { for (col = 0; col < omap_kp->cols; col++) {
omap_writew(~(1 << col) & 0xff, omap_writew(~(1 << col) & 0xff,
OMAP_MPUIO_BASE + OMAP_MPUIO_KBC); OMAP1_MPUIO_BASE + OMAP_MPUIO_KBC);
udelay(omap_kp->delay); udelay(omap_kp->delay);
state[col] = ~omap_readw(OMAP_MPUIO_BASE + state[col] = ~omap_readw(OMAP1_MPUIO_BASE +
OMAP_MPUIO_KBR_LATCH) & 0xff; OMAP_MPUIO_KBR_LATCH) & 0xff;
} }
omap_writew(0x00, OMAP_MPUIO_BASE + OMAP_MPUIO_KBC); omap_writew(0x00, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBC);
udelay(2); udelay(2);
} }
} }
@ -234,7 +234,7 @@ static void omap_kp_tasklet(unsigned long data)
for (i = 0; i < omap_kp_data->rows; i++) for (i = 0; i < omap_kp_data->rows; i++)
enable_irq(gpio_to_irq(row_gpios[i])); enable_irq(gpio_to_irq(row_gpios[i]));
} else { } else {
omap_writew(0, OMAP_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT); omap_writew(0, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT);
kp_cur_group = -1; kp_cur_group = -1;
} }
} }
@ -317,7 +317,7 @@ static int __devinit omap_kp_probe(struct platform_device *pdev)
/* Disable the interrupt for the MPUIO keyboard */ /* Disable the interrupt for the MPUIO keyboard */
if (!cpu_is_omap24xx()) if (!cpu_is_omap24xx())
omap_writew(1, OMAP_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT); omap_writew(1, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT);
keymap = pdata->keymap; keymap = pdata->keymap;
@ -391,7 +391,7 @@ static int __devinit omap_kp_probe(struct platform_device *pdev)
} }
if (pdata->dbounce) if (pdata->dbounce)
omap_writew(0xff, OMAP_MPUIO_BASE + OMAP_MPUIO_GPIO_DEBOUNCING); omap_writew(0xff, OMAP1_MPUIO_BASE + OMAP_MPUIO_GPIO_DEBOUNCING);
/* scan current status and enable interrupt */ /* scan current status and enable interrupt */
omap_kp_scan_keypad(omap_kp, keypad_state); omap_kp_scan_keypad(omap_kp, keypad_state);
@ -402,7 +402,7 @@ static int __devinit omap_kp_probe(struct platform_device *pdev)
"omap-keypad", omap_kp) < 0) "omap-keypad", omap_kp) < 0)
goto err4; goto err4;
} }
omap_writew(0, OMAP_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT); omap_writew(0, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT);
} else { } else {
for (irq_idx = 0; irq_idx < omap_kp->rows; irq_idx++) { for (irq_idx = 0; irq_idx < omap_kp->rows; irq_idx++) {
if (request_irq(gpio_to_irq(row_gpios[irq_idx]), if (request_irq(gpio_to_irq(row_gpios[irq_idx]),
@ -449,7 +449,7 @@ static int __devexit omap_kp_remove(struct platform_device *pdev)
free_irq(gpio_to_irq(row_gpios[i]), 0); free_irq(gpio_to_irq(row_gpios[i]), 0);
} }
} else { } else {
omap_writew(1, OMAP_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT); omap_writew(1, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT);
free_irq(omap_kp->irq, 0); free_irq(omap_kp->irq, 0);
} }

8
drivers/mtd/nand/ams-delta.c
View File

@ -63,7 +63,7 @@ static void ams_delta_write_byte(struct mtd_info *mtd, u_char byte)
{ {
struct nand_chip *this = mtd->priv; struct nand_chip *this = mtd->priv;
omap_writew(0, (OMAP_MPUIO_BASE + OMAP_MPUIO_IO_CNTL)); omap_writew(0, (OMAP1_MPUIO_BASE + OMAP_MPUIO_IO_CNTL));
omap_writew(byte, this->IO_ADDR_W); omap_writew(byte, this->IO_ADDR_W);
ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NWE, 0); ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NWE, 0);
ndelay(40); ndelay(40);
@ -78,7 +78,7 @@ static u_char ams_delta_read_byte(struct mtd_info *mtd)
ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NRE, 0); ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NRE, 0);
ndelay(40); ndelay(40);
omap_writew(~0, (OMAP_MPUIO_BASE + OMAP_MPUIO_IO_CNTL)); omap_writew(~0, (OMAP1_MPUIO_BASE + OMAP_MPUIO_IO_CNTL));
res = omap_readw(this->IO_ADDR_R); res = omap_readw(this->IO_ADDR_R);
ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NRE, ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NRE,
AMS_DELTA_LATCH2_NAND_NRE); AMS_DELTA_LATCH2_NAND_NRE);
@ -178,8 +178,8 @@ static int __init ams_delta_init(void)
ams_delta_mtd->priv = this; ams_delta_mtd->priv = this;
/* Set address of NAND IO lines */ /* Set address of NAND IO lines */
this->IO_ADDR_R = (OMAP_MPUIO_BASE + OMAP_MPUIO_INPUT_LATCH); this->IO_ADDR_R = (OMAP1_MPUIO_BASE + OMAP_MPUIO_INPUT_LATCH);
this->IO_ADDR_W = (OMAP_MPUIO_BASE + OMAP_MPUIO_OUTPUT); this->IO_ADDR_W = (OMAP1_MPUIO_BASE + OMAP_MPUIO_OUTPUT);
this->read_byte = ams_delta_read_byte; this->read_byte = ams_delta_read_byte;
this->write_buf = ams_delta_write_buf; this->write_buf = ams_delta_write_buf;
this->read_buf = ams_delta_read_buf; this->read_buf = ams_delta_read_buf;